stm32f3/stm32f303/tim15/
egr.rs

1#[doc = "Register `EGR` writer"]
2pub struct W(crate::W<EGR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<EGR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<EGR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<EGR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `BG` writer - Break generation"]
23pub type BG_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, bool, O>;
24#[doc = "Field `TG` writer - Trigger generation"]
25pub type TG_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, bool, O>;
26#[doc = "Field `COMG` writer - Capture/Compare control update generation"]
27pub type COMG_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, bool, O>;
28#[doc = "Field `CC2G` writer - Capture/compare 2 generation"]
29pub type CC2G_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, bool, O>;
30#[doc = "Field `CC1G` writer - Capture/compare 1 generation"]
31pub type CC1G_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, bool, O>;
32#[doc = "Update generation\n\nValue on reset: 0"]
33#[derive(Clone, Copy, Debug, PartialEq)]
34pub enum UG_AW {
35    #[doc = "1: Re-initializes the timer counter and generates an update of the registers."]
36    Update = 1,
37}
38impl From<UG_AW> for bool {
39    #[inline(always)]
40    fn from(variant: UG_AW) -> Self {
41        variant as u8 != 0
42    }
43}
44#[doc = "Field `UG` writer - Update generation"]
45pub type UG_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, UG_AW, O>;
46impl<'a, const O: u8> UG_W<'a, O> {
47    #[doc = "Re-initializes the timer counter and generates an update of the registers."]
48    #[inline(always)]
49    pub fn update(self) -> &'a mut W {
50        self.variant(UG_AW::Update)
51    }
52}
53impl W {
54    #[doc = "Bit 7 - Break generation"]
55    #[inline(always)]
56    pub fn bg(&mut self) -> BG_W<7> {
57        BG_W::new(self)
58    }
59    #[doc = "Bit 6 - Trigger generation"]
60    #[inline(always)]
61    pub fn tg(&mut self) -> TG_W<6> {
62        TG_W::new(self)
63    }
64    #[doc = "Bit 5 - Capture/Compare control update generation"]
65    #[inline(always)]
66    pub fn comg(&mut self) -> COMG_W<5> {
67        COMG_W::new(self)
68    }
69    #[doc = "Bit 2 - Capture/compare 2 generation"]
70    #[inline(always)]
71    pub fn cc2g(&mut self) -> CC2G_W<2> {
72        CC2G_W::new(self)
73    }
74    #[doc = "Bit 1 - Capture/compare 1 generation"]
75    #[inline(always)]
76    pub fn cc1g(&mut self) -> CC1G_W<1> {
77        CC1G_W::new(self)
78    }
79    #[doc = "Bit 0 - Update generation"]
80    #[inline(always)]
81    pub fn ug(&mut self) -> UG_W<0> {
82        UG_W::new(self)
83    }
84    #[doc = "Writes raw bits to the register."]
85    #[inline(always)]
86    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
87        self.0.bits(bits);
88        self
89    }
90}
91#[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](index.html) module"]
92pub struct EGR_SPEC;
93impl crate::RegisterSpec for EGR_SPEC {
94    type Ux = u32;
95}
96#[doc = "`write(|w| ..)` method takes [egr::W](W) writer structure"]
97impl crate::Writable for EGR_SPEC {
98    type Writer = W;
99}
100#[doc = "`reset()` method sets EGR to value 0"]
101impl crate::Resettable for EGR_SPEC {
102    #[inline(always)]
103    fn reset_value() -> Self::Ux {
104        0
105    }
106}
stm32f3/stm32f303/tim15/egr.rs

stm32f3/stm32f303/tim15/
egr.rs
