stm32f3_copterust/stm32f303/adc1_2/
ccr.rs

1#[doc = "Reader of register CCR"]
2pub type R = crate::R<u32, super::CCR>;
3#[doc = "Writer for register CCR"]
4pub type W = crate::W<u32, super::CCR>;
5#[doc = "Register CCR `reset()`'s with value 0"]
6impl crate::ResetValue for super::CCR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Dual ADC mode selection\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum DUAL_A {
17    #[doc = "0: Independent mode"]
18    INDEPENDENT = 0,
19    #[doc = "1: Dual, combined regular simultaneous + injected simultaneous mode"]
20    DUALRJ = 1,
21    #[doc = "2: Dual, combined regular simultaneous + alternate trigger mode"]
22    DUALRA = 2,
23    #[doc = "3: Dual, combined interleaved mode + injected simultaneous mode"]
24    DUALIJ = 3,
25    #[doc = "5: Dual, injected simultaneous mode only"]
26    DUALJ = 5,
27    #[doc = "6: Dual, regular simultaneous mode only"]
28    DUALR = 6,
29    #[doc = "7: Dual, interleaved mode only"]
30    DUALI = 7,
31    #[doc = "9: Dual, alternate trigger mode only"]
32    DUALA = 9,
33}
34impl From<DUAL_A> for u8 {
35    #[inline(always)]
36    fn from(variant: DUAL_A) -> Self {
37        variant as _
38    }
39}
40#[doc = "Reader of field `DUAL`"]
41pub type DUAL_R = crate::R<u8, DUAL_A>;
42impl DUAL_R {
43    #[doc = r"Get enumerated values variant"]
44    #[inline(always)]
45    pub fn variant(&self) -> crate::Variant<u8, DUAL_A> {
46        use crate::Variant::*;
47        match self.bits {
48            0 => Val(DUAL_A::INDEPENDENT),
49            1 => Val(DUAL_A::DUALRJ),
50            2 => Val(DUAL_A::DUALRA),
51            3 => Val(DUAL_A::DUALIJ),
52            5 => Val(DUAL_A::DUALJ),
53            6 => Val(DUAL_A::DUALR),
54            7 => Val(DUAL_A::DUALI),
55            9 => Val(DUAL_A::DUALA),
56            i => Res(i),
57        }
58    }
59    #[doc = "Checks if the value of the field is `INDEPENDENT`"]
60    #[inline(always)]
61    pub fn is_independent(&self) -> bool {
62        *self == DUAL_A::INDEPENDENT
63    }
64    #[doc = "Checks if the value of the field is `DUALRJ`"]
65    #[inline(always)]
66    pub fn is_dual_rj(&self) -> bool {
67        *self == DUAL_A::DUALRJ
68    }
69    #[doc = "Checks if the value of the field is `DUALRA`"]
70    #[inline(always)]
71    pub fn is_dual_ra(&self) -> bool {
72        *self == DUAL_A::DUALRA
73    }
74    #[doc = "Checks if the value of the field is `DUALIJ`"]
75    #[inline(always)]
76    pub fn is_dual_ij(&self) -> bool {
77        *self == DUAL_A::DUALIJ
78    }
79    #[doc = "Checks if the value of the field is `DUALJ`"]
80    #[inline(always)]
81    pub fn is_dual_j(&self) -> bool {
82        *self == DUAL_A::DUALJ
83    }
84    #[doc = "Checks if the value of the field is `DUALR`"]
85    #[inline(always)]
86    pub fn is_dual_r(&self) -> bool {
87        *self == DUAL_A::DUALR
88    }
89    #[doc = "Checks if the value of the field is `DUALI`"]
90    #[inline(always)]
91    pub fn is_dual_i(&self) -> bool {
92        *self == DUAL_A::DUALI
93    }
94    #[doc = "Checks if the value of the field is `DUALA`"]
95    #[inline(always)]
96    pub fn is_dual_a(&self) -> bool {
97        *self == DUAL_A::DUALA
98    }
99}
100#[doc = "Write proxy for field `DUAL`"]
101pub struct DUAL_W<'a> {
102    w: &'a mut W,
103}
104impl<'a> DUAL_W<'a> {
105    #[doc = r"Writes `variant` to the field"]
106    #[inline(always)]
107    pub fn variant(self, variant: DUAL_A) -> &'a mut W {
108        unsafe { self.bits(variant.into()) }
109    }
110    #[doc = "Independent mode"]
111    #[inline(always)]
112    pub fn independent(self) -> &'a mut W {
113        self.variant(DUAL_A::INDEPENDENT)
114    }
115    #[doc = "Dual, combined regular simultaneous + injected simultaneous mode"]
116    #[inline(always)]
117    pub fn dual_rj(self) -> &'a mut W {
118        self.variant(DUAL_A::DUALRJ)
119    }
120    #[doc = "Dual, combined regular simultaneous + alternate trigger mode"]
121    #[inline(always)]
122    pub fn dual_ra(self) -> &'a mut W {
123        self.variant(DUAL_A::DUALRA)
124    }
125    #[doc = "Dual, combined interleaved mode + injected simultaneous mode"]
126    #[inline(always)]
127    pub fn dual_ij(self) -> &'a mut W {
128        self.variant(DUAL_A::DUALIJ)
129    }
130    #[doc = "Dual, injected simultaneous mode only"]
131    #[inline(always)]
132    pub fn dual_j(self) -> &'a mut W {
133        self.variant(DUAL_A::DUALJ)
134    }
135    #[doc = "Dual, regular simultaneous mode only"]
136    #[inline(always)]
137    pub fn dual_r(self) -> &'a mut W {
138        self.variant(DUAL_A::DUALR)
139    }
140    #[doc = "Dual, interleaved mode only"]
141    #[inline(always)]
142    pub fn dual_i(self) -> &'a mut W {
143        self.variant(DUAL_A::DUALI)
144    }
145    #[doc = "Dual, alternate trigger mode only"]
146    #[inline(always)]
147    pub fn dual_a(self) -> &'a mut W {
148        self.variant(DUAL_A::DUALA)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub unsafe fn bits(self, value: u8) -> &'a mut W {
153        self.w.bits = (self.w.bits & !0x1f) | ((value as u32) & 0x1f);
154        self.w
155    }
156}
157#[doc = "Reader of field `DELAY`"]
158pub type DELAY_R = crate::R<u8, u8>;
159#[doc = "Write proxy for field `DELAY`"]
160pub struct DELAY_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> DELAY_W<'a> {
164    #[doc = r"Writes raw bits to the field"]
165    #[inline(always)]
166    pub fn bits(self, value: u8) -> &'a mut W {
167        self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
168        self.w
169    }
170}
171#[doc = "DMA configuration (for multi-ADC mode)\n\nValue on reset: 0"]
172#[derive(Clone, Copy, Debug, PartialEq)]
173pub enum DMACFG_A {
174    #[doc = "0: DMA one shot mode selected"]
175    ONESHOT = 0,
176    #[doc = "1: DMA circular mode selected"]
177    CIRCULATOR = 1,
178}
179impl From<DMACFG_A> for bool {
180    #[inline(always)]
181    fn from(variant: DMACFG_A) -> Self {
182        variant as u8 != 0
183    }
184}
185#[doc = "Reader of field `DMACFG`"]
186pub type DMACFG_R = crate::R<bool, DMACFG_A>;
187impl DMACFG_R {
188    #[doc = r"Get enumerated values variant"]
189    #[inline(always)]
190    pub fn variant(&self) -> DMACFG_A {
191        match self.bits {
192            false => DMACFG_A::ONESHOT,
193            true => DMACFG_A::CIRCULATOR,
194        }
195    }
196    #[doc = "Checks if the value of the field is `ONESHOT`"]
197    #[inline(always)]
198    pub fn is_one_shot(&self) -> bool {
199        *self == DMACFG_A::ONESHOT
200    }
201    #[doc = "Checks if the value of the field is `CIRCULATOR`"]
202    #[inline(always)]
203    pub fn is_circulator(&self) -> bool {
204        *self == DMACFG_A::CIRCULATOR
205    }
206}
207#[doc = "Write proxy for field `DMACFG`"]
208pub struct DMACFG_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> DMACFG_W<'a> {
212    #[doc = r"Writes `variant` to the field"]
213    #[inline(always)]
214    pub fn variant(self, variant: DMACFG_A) -> &'a mut W {
215        {
216            self.bit(variant.into())
217        }
218    }
219    #[doc = "DMA one shot mode selected"]
220    #[inline(always)]
221    pub fn one_shot(self) -> &'a mut W {
222        self.variant(DMACFG_A::ONESHOT)
223    }
224    #[doc = "DMA circular mode selected"]
225    #[inline(always)]
226    pub fn circulator(self) -> &'a mut W {
227        self.variant(DMACFG_A::CIRCULATOR)
228    }
229    #[doc = r"Sets the field bit"]
230    #[inline(always)]
231    pub fn set_bit(self) -> &'a mut W {
232        self.bit(true)
233    }
234    #[doc = r"Clears the field bit"]
235    #[inline(always)]
236    pub fn clear_bit(self) -> &'a mut W {
237        self.bit(false)
238    }
239    #[doc = r"Writes raw bits to the field"]
240    #[inline(always)]
241    pub fn bit(self, value: bool) -> &'a mut W {
242        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
243        self.w
244    }
245}
246#[doc = "Direct memory access mode for multi ADC mode\n\nValue on reset: 0"]
247#[derive(Clone, Copy, Debug, PartialEq)]
248#[repr(u8)]
249pub enum MDMA_A {
250    #[doc = "0: MDMA mode disabled"]
251    DISABLED = 0,
252    #[doc = "2: MDMA mode enabled for 12 and 10-bit resolution"]
253    BITS12_10 = 2,
254    #[doc = "3: MDMA mode enabled for 8 and 6-bit resolution"]
255    BITS8_6 = 3,
256}
257impl From<MDMA_A> for u8 {
258    #[inline(always)]
259    fn from(variant: MDMA_A) -> Self {
260        variant as _
261    }
262}
263#[doc = "Reader of field `MDMA`"]
264pub type MDMA_R = crate::R<u8, MDMA_A>;
265impl MDMA_R {
266    #[doc = r"Get enumerated values variant"]
267    #[inline(always)]
268    pub fn variant(&self) -> crate::Variant<u8, MDMA_A> {
269        use crate::Variant::*;
270        match self.bits {
271            0 => Val(MDMA_A::DISABLED),
272            2 => Val(MDMA_A::BITS12_10),
273            3 => Val(MDMA_A::BITS8_6),
274            i => Res(i),
275        }
276    }
277    #[doc = "Checks if the value of the field is `DISABLED`"]
278    #[inline(always)]
279    pub fn is_disabled(&self) -> bool {
280        *self == MDMA_A::DISABLED
281    }
282    #[doc = "Checks if the value of the field is `BITS12_10`"]
283    #[inline(always)]
284    pub fn is_bits12_10(&self) -> bool {
285        *self == MDMA_A::BITS12_10
286    }
287    #[doc = "Checks if the value of the field is `BITS8_6`"]
288    #[inline(always)]
289    pub fn is_bits8_6(&self) -> bool {
290        *self == MDMA_A::BITS8_6
291    }
292}
293#[doc = "Write proxy for field `MDMA`"]
294pub struct MDMA_W<'a> {
295    w: &'a mut W,
296}
297impl<'a> MDMA_W<'a> {
298    #[doc = r"Writes `variant` to the field"]
299    #[inline(always)]
300    pub fn variant(self, variant: MDMA_A) -> &'a mut W {
301        unsafe { self.bits(variant.into()) }
302    }
303    #[doc = "MDMA mode disabled"]
304    #[inline(always)]
305    pub fn disabled(self) -> &'a mut W {
306        self.variant(MDMA_A::DISABLED)
307    }
308    #[doc = "MDMA mode enabled for 12 and 10-bit resolution"]
309    #[inline(always)]
310    pub fn bits12_10(self) -> &'a mut W {
311        self.variant(MDMA_A::BITS12_10)
312    }
313    #[doc = "MDMA mode enabled for 8 and 6-bit resolution"]
314    #[inline(always)]
315    pub fn bits8_6(self) -> &'a mut W {
316        self.variant(MDMA_A::BITS8_6)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub unsafe fn bits(self, value: u8) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x03 << 14)) | (((value as u32) & 0x03) << 14);
322        self.w
323    }
324}
325#[doc = "ADC clock mode\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq)]
327#[repr(u8)]
328pub enum CKMODE_A {
329    #[doc = "0: Use Kernel Clock adc_ker_ck_input divided by PRESC. Asynchronous to AHB clock"]
330    ASYNCHRONOUS = 0,
331    #[doc = "1: Use AHB clock rcc_hclk3. In this case rcc_hclk must equal sys_d1cpre_ck"]
332    SYNCDIV1 = 1,
333    #[doc = "2: Use AHB clock rcc_hclk3 divided by 2"]
334    SYNCDIV2 = 2,
335    #[doc = "3: Use AHB clock rcc_hclk3 divided by 4"]
336    SYNCDIV4 = 3,
337}
338impl From<CKMODE_A> for u8 {
339    #[inline(always)]
340    fn from(variant: CKMODE_A) -> Self {
341        variant as _
342    }
343}
344#[doc = "Reader of field `CKMODE`"]
345pub type CKMODE_R = crate::R<u8, CKMODE_A>;
346impl CKMODE_R {
347    #[doc = r"Get enumerated values variant"]
348    #[inline(always)]
349    pub fn variant(&self) -> CKMODE_A {
350        match self.bits {
351            0 => CKMODE_A::ASYNCHRONOUS,
352            1 => CKMODE_A::SYNCDIV1,
353            2 => CKMODE_A::SYNCDIV2,
354            3 => CKMODE_A::SYNCDIV4,
355            _ => unreachable!(),
356        }
357    }
358    #[doc = "Checks if the value of the field is `ASYNCHRONOUS`"]
359    #[inline(always)]
360    pub fn is_asynchronous(&self) -> bool {
361        *self == CKMODE_A::ASYNCHRONOUS
362    }
363    #[doc = "Checks if the value of the field is `SYNCDIV1`"]
364    #[inline(always)]
365    pub fn is_sync_div1(&self) -> bool {
366        *self == CKMODE_A::SYNCDIV1
367    }
368    #[doc = "Checks if the value of the field is `SYNCDIV2`"]
369    #[inline(always)]
370    pub fn is_sync_div2(&self) -> bool {
371        *self == CKMODE_A::SYNCDIV2
372    }
373    #[doc = "Checks if the value of the field is `SYNCDIV4`"]
374    #[inline(always)]
375    pub fn is_sync_div4(&self) -> bool {
376        *self == CKMODE_A::SYNCDIV4
377    }
378}
379#[doc = "Write proxy for field `CKMODE`"]
380pub struct CKMODE_W<'a> {
381    w: &'a mut W,
382}
383impl<'a> CKMODE_W<'a> {
384    #[doc = r"Writes `variant` to the field"]
385    #[inline(always)]
386    pub fn variant(self, variant: CKMODE_A) -> &'a mut W {
387        {
388            self.bits(variant.into())
389        }
390    }
391    #[doc = "Use Kernel Clock adc_ker_ck_input divided by PRESC. Asynchronous to AHB clock"]
392    #[inline(always)]
393    pub fn asynchronous(self) -> &'a mut W {
394        self.variant(CKMODE_A::ASYNCHRONOUS)
395    }
396    #[doc = "Use AHB clock rcc_hclk3. In this case rcc_hclk must equal sys_d1cpre_ck"]
397    #[inline(always)]
398    pub fn sync_div1(self) -> &'a mut W {
399        self.variant(CKMODE_A::SYNCDIV1)
400    }
401    #[doc = "Use AHB clock rcc_hclk3 divided by 2"]
402    #[inline(always)]
403    pub fn sync_div2(self) -> &'a mut W {
404        self.variant(CKMODE_A::SYNCDIV2)
405    }
406    #[doc = "Use AHB clock rcc_hclk3 divided by 4"]
407    #[inline(always)]
408    pub fn sync_div4(self) -> &'a mut W {
409        self.variant(CKMODE_A::SYNCDIV4)
410    }
411    #[doc = r"Writes raw bits to the field"]
412    #[inline(always)]
413    pub fn bits(self, value: u8) -> &'a mut W {
414        self.w.bits = (self.w.bits & !(0x03 << 16)) | (((value as u32) & 0x03) << 16);
415        self.w
416    }
417}
418#[doc = "VREFINT enable\n\nValue on reset: 0"]
419#[derive(Clone, Copy, Debug, PartialEq)]
420pub enum VREFEN_A {
421    #[doc = "0: V_REFINT channel disabled"]
422    DISABLED = 0,
423    #[doc = "1: V_REFINT channel enabled"]
424    ENABLED = 1,
425}
426impl From<VREFEN_A> for bool {
427    #[inline(always)]
428    fn from(variant: VREFEN_A) -> Self {
429        variant as u8 != 0
430    }
431}
432#[doc = "Reader of field `VREFEN`"]
433pub type VREFEN_R = crate::R<bool, VREFEN_A>;
434impl VREFEN_R {
435    #[doc = r"Get enumerated values variant"]
436    #[inline(always)]
437    pub fn variant(&self) -> VREFEN_A {
438        match self.bits {
439            false => VREFEN_A::DISABLED,
440            true => VREFEN_A::ENABLED,
441        }
442    }
443    #[doc = "Checks if the value of the field is `DISABLED`"]
444    #[inline(always)]
445    pub fn is_disabled(&self) -> bool {
446        *self == VREFEN_A::DISABLED
447    }
448    #[doc = "Checks if the value of the field is `ENABLED`"]
449    #[inline(always)]
450    pub fn is_enabled(&self) -> bool {
451        *self == VREFEN_A::ENABLED
452    }
453}
454#[doc = "Write proxy for field `VREFEN`"]
455pub struct VREFEN_W<'a> {
456    w: &'a mut W,
457}
458impl<'a> VREFEN_W<'a> {
459    #[doc = r"Writes `variant` to the field"]
460    #[inline(always)]
461    pub fn variant(self, variant: VREFEN_A) -> &'a mut W {
462        {
463            self.bit(variant.into())
464        }
465    }
466    #[doc = "V_REFINT channel disabled"]
467    #[inline(always)]
468    pub fn disabled(self) -> &'a mut W {
469        self.variant(VREFEN_A::DISABLED)
470    }
471    #[doc = "V_REFINT channel enabled"]
472    #[inline(always)]
473    pub fn enabled(self) -> &'a mut W {
474        self.variant(VREFEN_A::ENABLED)
475    }
476    #[doc = r"Sets the field bit"]
477    #[inline(always)]
478    pub fn set_bit(self) -> &'a mut W {
479        self.bit(true)
480    }
481    #[doc = r"Clears the field bit"]
482    #[inline(always)]
483    pub fn clear_bit(self) -> &'a mut W {
484        self.bit(false)
485    }
486    #[doc = r"Writes raw bits to the field"]
487    #[inline(always)]
488    pub fn bit(self, value: bool) -> &'a mut W {
489        self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
490        self.w
491    }
492}
493#[doc = "Temperature sensor enable\n\nValue on reset: 0"]
494#[derive(Clone, Copy, Debug, PartialEq)]
495pub enum TSEN_A {
496    #[doc = "0: Temperature sensor channel disabled"]
497    DISABLED = 0,
498    #[doc = "1: Temperature sensor channel enabled"]
499    ENABLED = 1,
500}
501impl From<TSEN_A> for bool {
502    #[inline(always)]
503    fn from(variant: TSEN_A) -> Self {
504        variant as u8 != 0
505    }
506}
507#[doc = "Reader of field `TSEN`"]
508pub type TSEN_R = crate::R<bool, TSEN_A>;
509impl TSEN_R {
510    #[doc = r"Get enumerated values variant"]
511    #[inline(always)]
512    pub fn variant(&self) -> TSEN_A {
513        match self.bits {
514            false => TSEN_A::DISABLED,
515            true => TSEN_A::ENABLED,
516        }
517    }
518    #[doc = "Checks if the value of the field is `DISABLED`"]
519    #[inline(always)]
520    pub fn is_disabled(&self) -> bool {
521        *self == TSEN_A::DISABLED
522    }
523    #[doc = "Checks if the value of the field is `ENABLED`"]
524    #[inline(always)]
525    pub fn is_enabled(&self) -> bool {
526        *self == TSEN_A::ENABLED
527    }
528}
529#[doc = "Write proxy for field `TSEN`"]
530pub struct TSEN_W<'a> {
531    w: &'a mut W,
532}
533impl<'a> TSEN_W<'a> {
534    #[doc = r"Writes `variant` to the field"]
535    #[inline(always)]
536    pub fn variant(self, variant: TSEN_A) -> &'a mut W {
537        {
538            self.bit(variant.into())
539        }
540    }
541    #[doc = "Temperature sensor channel disabled"]
542    #[inline(always)]
543    pub fn disabled(self) -> &'a mut W {
544        self.variant(TSEN_A::DISABLED)
545    }
546    #[doc = "Temperature sensor channel enabled"]
547    #[inline(always)]
548    pub fn enabled(self) -> &'a mut W {
549        self.variant(TSEN_A::ENABLED)
550    }
551    #[doc = r"Sets the field bit"]
552    #[inline(always)]
553    pub fn set_bit(self) -> &'a mut W {
554        self.bit(true)
555    }
556    #[doc = r"Clears the field bit"]
557    #[inline(always)]
558    pub fn clear_bit(self) -> &'a mut W {
559        self.bit(false)
560    }
561    #[doc = r"Writes raw bits to the field"]
562    #[inline(always)]
563    pub fn bit(self, value: bool) -> &'a mut W {
564        self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
565        self.w
566    }
567}
568#[doc = "VBAT enable\n\nValue on reset: 0"]
569#[derive(Clone, Copy, Debug, PartialEq)]
570pub enum VBATEN_A {
571    #[doc = "0: V_BAT channel disabled"]
572    DISABLED = 0,
573    #[doc = "1: V_BAT channel enabled"]
574    ENABLED = 1,
575}
576impl From<VBATEN_A> for bool {
577    #[inline(always)]
578    fn from(variant: VBATEN_A) -> Self {
579        variant as u8 != 0
580    }
581}
582#[doc = "Reader of field `VBATEN`"]
583pub type VBATEN_R = crate::R<bool, VBATEN_A>;
584impl VBATEN_R {
585    #[doc = r"Get enumerated values variant"]
586    #[inline(always)]
587    pub fn variant(&self) -> VBATEN_A {
588        match self.bits {
589            false => VBATEN_A::DISABLED,
590            true => VBATEN_A::ENABLED,
591        }
592    }
593    #[doc = "Checks if the value of the field is `DISABLED`"]
594    #[inline(always)]
595    pub fn is_disabled(&self) -> bool {
596        *self == VBATEN_A::DISABLED
597    }
598    #[doc = "Checks if the value of the field is `ENABLED`"]
599    #[inline(always)]
600    pub fn is_enabled(&self) -> bool {
601        *self == VBATEN_A::ENABLED
602    }
603}
604#[doc = "Write proxy for field `VBATEN`"]
605pub struct VBATEN_W<'a> {
606    w: &'a mut W,
607}
608impl<'a> VBATEN_W<'a> {
609    #[doc = r"Writes `variant` to the field"]
610    #[inline(always)]
611    pub fn variant(self, variant: VBATEN_A) -> &'a mut W {
612        {
613            self.bit(variant.into())
614        }
615    }
616    #[doc = "V_BAT channel disabled"]
617    #[inline(always)]
618    pub fn disabled(self) -> &'a mut W {
619        self.variant(VBATEN_A::DISABLED)
620    }
621    #[doc = "V_BAT channel enabled"]
622    #[inline(always)]
623    pub fn enabled(self) -> &'a mut W {
624        self.variant(VBATEN_A::ENABLED)
625    }
626    #[doc = r"Sets the field bit"]
627    #[inline(always)]
628    pub fn set_bit(self) -> &'a mut W {
629        self.bit(true)
630    }
631    #[doc = r"Clears the field bit"]
632    #[inline(always)]
633    pub fn clear_bit(self) -> &'a mut W {
634        self.bit(false)
635    }
636    #[doc = r"Writes raw bits to the field"]
637    #[inline(always)]
638    pub fn bit(self, value: bool) -> &'a mut W {
639        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
640        self.w
641    }
642}
643impl R {
644    #[doc = "Bits 0:4 - Dual ADC mode selection"]
645    #[inline(always)]
646    pub fn dual(&self) -> DUAL_R {
647        DUAL_R::new((self.bits & 0x1f) as u8)
648    }
649    #[doc = "Bits 8:11 - Delay between 2 sampling phases"]
650    #[inline(always)]
651    pub fn delay(&self) -> DELAY_R {
652        DELAY_R::new(((self.bits >> 8) & 0x0f) as u8)
653    }
654    #[doc = "Bit 13 - DMA configuration (for multi-ADC mode)"]
655    #[inline(always)]
656    pub fn dmacfg(&self) -> DMACFG_R {
657        DMACFG_R::new(((self.bits >> 13) & 0x01) != 0)
658    }
659    #[doc = "Bits 14:15 - Direct memory access mode for multi ADC mode"]
660    #[inline(always)]
661    pub fn mdma(&self) -> MDMA_R {
662        MDMA_R::new(((self.bits >> 14) & 0x03) as u8)
663    }
664    #[doc = "Bits 16:17 - ADC clock mode"]
665    #[inline(always)]
666    pub fn ckmode(&self) -> CKMODE_R {
667        CKMODE_R::new(((self.bits >> 16) & 0x03) as u8)
668    }
669    #[doc = "Bit 22 - VREFINT enable"]
670    #[inline(always)]
671    pub fn vrefen(&self) -> VREFEN_R {
672        VREFEN_R::new(((self.bits >> 22) & 0x01) != 0)
673    }
674    #[doc = "Bit 23 - Temperature sensor enable"]
675    #[inline(always)]
676    pub fn tsen(&self) -> TSEN_R {
677        TSEN_R::new(((self.bits >> 23) & 0x01) != 0)
678    }
679    #[doc = "Bit 24 - VBAT enable"]
680    #[inline(always)]
681    pub fn vbaten(&self) -> VBATEN_R {
682        VBATEN_R::new(((self.bits >> 24) & 0x01) != 0)
683    }
684}
685impl W {
686    #[doc = "Bits 0:4 - Dual ADC mode selection"]
687    #[inline(always)]
688    pub fn dual(&mut self) -> DUAL_W {
689        DUAL_W { w: self }
690    }
691    #[doc = "Bits 8:11 - Delay between 2 sampling phases"]
692    #[inline(always)]
693    pub fn delay(&mut self) -> DELAY_W {
694        DELAY_W { w: self }
695    }
696    #[doc = "Bit 13 - DMA configuration (for multi-ADC mode)"]
697    #[inline(always)]
698    pub fn dmacfg(&mut self) -> DMACFG_W {
699        DMACFG_W { w: self }
700    }
701    #[doc = "Bits 14:15 - Direct memory access mode for multi ADC mode"]
702    #[inline(always)]
703    pub fn mdma(&mut self) -> MDMA_W {
704        MDMA_W { w: self }
705    }
706    #[doc = "Bits 16:17 - ADC clock mode"]
707    #[inline(always)]
708    pub fn ckmode(&mut self) -> CKMODE_W {
709        CKMODE_W { w: self }
710    }
711    #[doc = "Bit 22 - VREFINT enable"]
712    #[inline(always)]
713    pub fn vrefen(&mut self) -> VREFEN_W {
714        VREFEN_W { w: self }
715    }
716    #[doc = "Bit 23 - Temperature sensor enable"]
717    #[inline(always)]
718    pub fn tsen(&mut self) -> TSEN_W {
719        TSEN_W { w: self }
720    }
721    #[doc = "Bit 24 - VBAT enable"]
722    #[inline(always)]
723    pub fn vbaten(&mut self) -> VBATEN_W {
724        VBATEN_W { w: self }
725    }
726}
stm32f3_copterust/stm32f303/adc1_2/ccr.rs

stm32f3_copterust/stm32f303/adc1_2/
ccr.rs
