stm32f2 0.8.0

Device support crates for STM32F2 devices
Documentation 
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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - SRAM/NOR-Flash chip-select control register 1"]
    pub bcr1: BCR1,
    #[doc = "0x04 - SRAM/NOR-Flash chip-select timing register 1"]
    pub btr1: BTR,
    #[doc = "0x08 - SRAM/NOR-Flash chip-select control register 2"]
    pub bcr2: BCR,
    #[doc = "0x0c - SRAM/NOR-Flash chip-select timing register 1"]
    pub btr2: BTR,
    #[doc = "0x10 - SRAM/NOR-Flash chip-select control register 2"]
    pub bcr3: BCR,
    #[doc = "0x14 - SRAM/NOR-Flash chip-select timing register 1"]
    pub btr3: BTR,
    #[doc = "0x18 - SRAM/NOR-Flash chip-select control register 2"]
    pub bcr4: BCR,
    #[doc = "0x1c - SRAM/NOR-Flash chip-select timing register 1"]
    pub btr4: BTR,
    _reserved8: [u8; 64usize],
    #[doc = "0x60 - PC Card/NAND Flash control register 2"]
    pub pcr2: PCR,
    #[doc = "0x64 - FIFO status and interrupt register 2"]
    pub sr2: SR,
    #[doc = "0x68 - Common memory space timing register 2"]
    pub pmem2: PMEM2,
    #[doc = "0x6c - Attribute memory space timing register 2"]
    pub patt2: PATT2,
    _reserved12: [u8; 4usize],
    #[doc = "0x74 - ECC result register 2"]
    pub eccr2: ECCR2,
    _reserved13: [u8; 8usize],
    #[doc = "0x80 - PC Card/NAND Flash control register 2"]
    pub pcr3: PCR,
    #[doc = "0x84 - FIFO status and interrupt register 2"]
    pub sr3: SR,
    #[doc = "0x88 - Common memory space timing register 3"]
    pub pmem3: PMEM3,
    #[doc = "0x8c - Attribute memory space timing register 3"]
    pub patt3: PATT3,
    _reserved17: [u8; 4usize],
    #[doc = "0x94 - ECC result register 3"]
    pub eccr3: ECCR3,
    _reserved18: [u8; 8usize],
    #[doc = "0xa0 - PC Card/NAND Flash control register 2"]
    pub pcr4: PCR,
    #[doc = "0xa4 - FIFO status and interrupt register 2"]
    pub sr4: SR,
    #[doc = "0xa8 - Common memory space timing register 4"]
    pub pmem4: PMEM4,
    #[doc = "0xac - Attribute memory space timing register 4"]
    pub patt4: PATT4,
    #[doc = "0xb0 - I/O space timing register 4"]
    pub pio4: PIO4,
    _reserved23: [u8; 80usize],
    #[doc = "0x104 - SRAM/NOR-Flash write timing registers 1"]
    pub bwtr1: BWTR,
    _reserved24: [u8; 4usize],
    #[doc = "0x10c - SRAM/NOR-Flash write timing registers 1"]
    pub bwtr2: BWTR,
    _reserved25: [u8; 4usize],
    #[doc = "0x114 - SRAM/NOR-Flash write timing registers 1"]
    pub bwtr3: BWTR,
    _reserved26: [u8; 4usize],
    #[doc = "0x11c - SRAM/NOR-Flash write timing registers 1"]
    pub bwtr4: BWTR,
}
#[doc = "SRAM/NOR-Flash chip-select control register 1"]
pub struct BCR1 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "SRAM/NOR-Flash chip-select control register 1"]
pub mod bcr1;
#[doc = "SRAM/NOR-Flash chip-select timing register 1"]
pub struct BTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "SRAM/NOR-Flash chip-select timing register 1"]
pub mod btr;
#[doc = "SRAM/NOR-Flash chip-select control register 2"]
pub struct BCR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "SRAM/NOR-Flash chip-select control register 2"]
pub mod bcr;
#[doc = "PC Card/NAND Flash control register 2"]
pub struct PCR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "PC Card/NAND Flash control register 2"]
pub mod pcr;
#[doc = "FIFO status and interrupt register 2"]
pub struct SR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "FIFO status and interrupt register 2"]
pub mod sr;
#[doc = "Common memory space timing register 2"]
pub struct PMEM2 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "Common memory space timing register 2"]
pub mod pmem2;
#[doc = "Attribute memory space timing register 2"]
pub struct PATT2 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "Attribute memory space timing register 2"]
pub mod patt2;
#[doc = "ECC result register 2"]
pub struct ECCR2 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "ECC result register 2"]
pub mod eccr2;
#[doc = "Common memory space timing register 3"]
pub struct PMEM3 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "Common memory space timing register 3"]
pub mod pmem3;
#[doc = "Attribute memory space timing register 3"]
pub struct PATT3 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "Attribute memory space timing register 3"]
pub mod patt3;
#[doc = "ECC result register 3"]
pub struct ECCR3 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "ECC result register 3"]
pub mod eccr3;
#[doc = "Common memory space timing register 4"]
pub struct PMEM4 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "Common memory space timing register 4"]
pub mod pmem4;
#[doc = "Attribute memory space timing register 4"]
pub struct PATT4 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "Attribute memory space timing register 4"]
pub mod patt4;
#[doc = "I/O space timing register 4"]
pub struct PIO4 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "I/O space timing register 4"]
pub mod pio4;
#[doc = "SRAM/NOR-Flash write timing registers 1"]
pub struct BWTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "SRAM/NOR-Flash write timing registers 1"]
pub mod bwtr;