#[doc = "Register `FS_GRSTCTL` reader"]
pub type R = crate::R<FsGrstctlSpec>;
#[doc = "Register `FS_GRSTCTL` writer"]
pub type W = crate::W<FsGrstctlSpec>;
#[doc = "Field `CSRST` reader - Core soft reset"]
pub type CsrstR = crate::BitReader;
#[doc = "Field `CSRST` writer - Core soft reset"]
pub type CsrstW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `HSRST` reader - HCLK soft reset"]
pub type HsrstR = crate::BitReader;
#[doc = "Field `HSRST` writer - HCLK soft reset"]
pub type HsrstW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `FCRST` reader - Host frame counter reset"]
pub type FcrstR = crate::BitReader;
#[doc = "Field `FCRST` writer - Host frame counter reset"]
pub type FcrstW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `RXFFLSH` reader - RxFIFO flush"]
pub type RxfflshR = crate::BitReader;
#[doc = "Field `RXFFLSH` writer - RxFIFO flush"]
pub type RxfflshW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TXFFLSH` reader - TxFIFO flush"]
pub type TxfflshR = crate::BitReader;
#[doc = "Field `TXFFLSH` writer - TxFIFO flush"]
pub type TxfflshW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TXFNUM` reader - TxFIFO number"]
pub type TxfnumR = crate::FieldReader;
#[doc = "Field `TXFNUM` writer - TxFIFO number"]
pub type TxfnumW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
#[doc = "Field `AHBIDL` reader - AHB master idle"]
pub type AhbidlR = crate::BitReader;
impl R {
#[doc = "Bit 0 - Core soft reset"]
#[inline(always)]
pub fn csrst(&self) -> CsrstR {
CsrstR::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - HCLK soft reset"]
#[inline(always)]
pub fn hsrst(&self) -> HsrstR {
HsrstR::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Host frame counter reset"]
#[inline(always)]
pub fn fcrst(&self) -> FcrstR {
FcrstR::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 4 - RxFIFO flush"]
#[inline(always)]
pub fn rxfflsh(&self) -> RxfflshR {
RxfflshR::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - TxFIFO flush"]
#[inline(always)]
pub fn txfflsh(&self) -> TxfflshR {
TxfflshR::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bits 6:10 - TxFIFO number"]
#[inline(always)]
pub fn txfnum(&self) -> TxfnumR {
TxfnumR::new(((self.bits >> 6) & 0x1f) as u8)
}
#[doc = "Bit 31 - AHB master idle"]
#[inline(always)]
pub fn ahbidl(&self) -> AhbidlR {
AhbidlR::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Core soft reset"]
#[inline(always)]
pub fn csrst(&mut self) -> CsrstW<'_, FsGrstctlSpec> {
CsrstW::new(self, 0)
}
#[doc = "Bit 1 - HCLK soft reset"]
#[inline(always)]
pub fn hsrst(&mut self) -> HsrstW<'_, FsGrstctlSpec> {
HsrstW::new(self, 1)
}
#[doc = "Bit 2 - Host frame counter reset"]
#[inline(always)]
pub fn fcrst(&mut self) -> FcrstW<'_, FsGrstctlSpec> {
FcrstW::new(self, 2)
}
#[doc = "Bit 4 - RxFIFO flush"]
#[inline(always)]
pub fn rxfflsh(&mut self) -> RxfflshW<'_, FsGrstctlSpec> {
RxfflshW::new(self, 4)
}
#[doc = "Bit 5 - TxFIFO flush"]
#[inline(always)]
pub fn txfflsh(&mut self) -> TxfflshW<'_, FsGrstctlSpec> {
TxfflshW::new(self, 5)
}
#[doc = "Bits 6:10 - TxFIFO number"]
#[inline(always)]
pub fn txfnum(&mut self) -> TxfnumW<'_, FsGrstctlSpec> {
TxfnumW::new(self, 6)
}
}
#[doc = "OTG_FS reset register (OTG_FS_GRSTCTL)\n\nYou can [`read`](crate::Reg::read) this register and get [`fs_grstctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fs_grstctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct FsGrstctlSpec;
impl crate::RegisterSpec for FsGrstctlSpec {
type Ux = u32;
}
#[doc = "`read()` method returns [`fs_grstctl::R`](R) reader structure"]
impl crate::Readable for FsGrstctlSpec {}
#[doc = "`write(|w| ..)` method takes [`fs_grstctl::W`](W) writer structure"]
impl crate::Writable for FsGrstctlSpec {
type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets FS_GRSTCTL to value 0x2000_0000"]
impl crate::Resettable for FsGrstctlSpec {
const RESET_VALUE: u32 = 0x2000_0000;
}