stm32f103-pac 0.1.2

Peripheral Access Crate (PAC) for STM32F103
Documentation 
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#[doc = "Register `DHR12L1` reader"]
pub type R = crate::R<Dhr12l1Spec>;
#[doc = "Register `DHR12L1` writer"]
pub type W = crate::W<Dhr12l1Spec>;
#[doc = "Field `DACC1DHR` reader - DAC channel1 12-bit left-aligned data"]
pub type Dacc1dhrR = crate::FieldReader<u16>;
#[doc = "Field `DACC1DHR` writer - DAC channel1 12-bit left-aligned data"]
pub type Dacc1dhrW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
impl R {
    #[doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data"]
    #[inline(always)]
    pub fn dacc1dhr(&self) -> Dacc1dhrR {
        Dacc1dhrR::new(((self.bits >> 4) & 0x0fff) as u16)
    }
}
impl W {
    #[doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data"]
    #[inline(always)]
    pub fn dacc1dhr(&mut self) -> Dacc1dhrW<'_, Dhr12l1Spec> {
        Dacc1dhrW::new(self, 4)
    }
}
#[doc = "DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1)\n\nYou can [`read`](crate::Reg::read) this register and get [`dhr12l1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dhr12l1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Dhr12l1Spec;
impl crate::RegisterSpec for Dhr12l1Spec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`dhr12l1::R`](R) reader structure"]
impl crate::Readable for Dhr12l1Spec {}
#[doc = "`write(|w| ..)` method takes [`dhr12l1::W`](W) writer structure"]
impl crate::Writable for Dhr12l1Spec {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets DHR12L1 to value 0"]
impl crate::Resettable for Dhr12l1Spec {}