#[doc = "Reader of register CFGR1"]
pub type R = crate::R<u32, super::CFGR1>;
#[doc = "Writer for register CFGR1"]
pub type W = crate::W<u32, super::CFGR1>;
#[doc = "Register CFGR1 `reset()`'s with value 0"]
impl crate::ResetValue for super::CFGR1 {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `AWDCH`"]
pub type AWDCH_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `AWDCH`"]
pub struct AWDCH_W<'a> {
w: &'a mut W,
}
impl<'a> AWDCH_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 26)) | (((value as u32) & 0x1f) << 26);
self.w
}
}
#[doc = "Analog watchdog enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum AWDEN_A {
#[doc = "0: Analog watchdog disabled on regular channels"]
DISABLED = 0,
#[doc = "1: Analog watchdog enabled on regular channels"]
ENABLED = 1,
}
impl From<AWDEN_A> for bool {
#[inline(always)]
fn from(variant: AWDEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `AWDEN`"]
pub type AWDEN_R = crate::R<bool, AWDEN_A>;
impl AWDEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> AWDEN_A {
match self.bits {
false => AWDEN_A::DISABLED,
true => AWDEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == AWDEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == AWDEN_A::ENABLED
}
}
#[doc = "Write proxy for field `AWDEN`"]
pub struct AWDEN_W<'a> {
w: &'a mut W,
}
impl<'a> AWDEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: AWDEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Analog watchdog disabled on regular channels"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(AWDEN_A::DISABLED)
}
#[doc = "Analog watchdog enabled on regular channels"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(AWDEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
self.w
}
}
#[doc = "Enable the watchdog on a single channel or on all channels\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum AWDSGL_A {
#[doc = "0: Analog watchdog enabled on all channels"]
ALLCHANNELS = 0,
#[doc = "1: Analog watchdog enabled on a single channel"]
SINGLECHANNEL = 1,
}
impl From<AWDSGL_A> for bool {
#[inline(always)]
fn from(variant: AWDSGL_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `AWDSGL`"]
pub type AWDSGL_R = crate::R<bool, AWDSGL_A>;
impl AWDSGL_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> AWDSGL_A {
match self.bits {
false => AWDSGL_A::ALLCHANNELS,
true => AWDSGL_A::SINGLECHANNEL,
}
}
#[doc = "Checks if the value of the field is `ALLCHANNELS`"]
#[inline(always)]
pub fn is_all_channels(&self) -> bool {
*self == AWDSGL_A::ALLCHANNELS
}
#[doc = "Checks if the value of the field is `SINGLECHANNEL`"]
#[inline(always)]
pub fn is_single_channel(&self) -> bool {
*self == AWDSGL_A::SINGLECHANNEL
}
}
#[doc = "Write proxy for field `AWDSGL`"]
pub struct AWDSGL_W<'a> {
w: &'a mut W,
}
impl<'a> AWDSGL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: AWDSGL_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Analog watchdog enabled on all channels"]
#[inline(always)]
pub fn all_channels(self) -> &'a mut W {
self.variant(AWDSGL_A::ALLCHANNELS)
}
#[doc = "Analog watchdog enabled on a single channel"]
#[inline(always)]
pub fn single_channel(self) -> &'a mut W {
self.variant(AWDSGL_A::SINGLECHANNEL)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
self.w
}
}
#[doc = "Discontinuous mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DISCEN_A {
#[doc = "0: Discontinuous mode on regular channels disabled"]
DISABLED = 0,
#[doc = "1: Discontinuous mode on regular channels enabled"]
ENABLED = 1,
}
impl From<DISCEN_A> for bool {
#[inline(always)]
fn from(variant: DISCEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DISCEN`"]
pub type DISCEN_R = crate::R<bool, DISCEN_A>;
impl DISCEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DISCEN_A {
match self.bits {
false => DISCEN_A::DISABLED,
true => DISCEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DISCEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DISCEN_A::ENABLED
}
}
#[doc = "Write proxy for field `DISCEN`"]
pub struct DISCEN_W<'a> {
w: &'a mut W,
}
impl<'a> DISCEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DISCEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Discontinuous mode on regular channels disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DISCEN_A::DISABLED)
}
#[doc = "Discontinuous mode on regular channels enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DISCEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
#[doc = "Auto-off mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum AUTOFF_A {
#[doc = "0: Auto-off mode disabled"]
DISABLED = 0,
#[doc = "1: Auto-off mode enabled"]
ENABLED = 1,
}
impl From<AUTOFF_A> for bool {
#[inline(always)]
fn from(variant: AUTOFF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `AUTOFF`"]
pub type AUTOFF_R = crate::R<bool, AUTOFF_A>;
impl AUTOFF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> AUTOFF_A {
match self.bits {
false => AUTOFF_A::DISABLED,
true => AUTOFF_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == AUTOFF_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == AUTOFF_A::ENABLED
}
}
#[doc = "Write proxy for field `AUTOFF`"]
pub struct AUTOFF_W<'a> {
w: &'a mut W,
}
impl<'a> AUTOFF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: AUTOFF_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Auto-off mode disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(AUTOFF_A::DISABLED)
}
#[doc = "Auto-off mode enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(AUTOFF_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
#[doc = "Reader of field `AUTDLY`"]
pub type AUTDLY_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `AUTDLY`"]
pub struct AUTDLY_W<'a> {
w: &'a mut W,
}
impl<'a> AUTDLY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "Single / continuous conversion mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CONT_A {
#[doc = "0: Single conversion mode"]
SINGLE = 0,
#[doc = "1: Continuous conversion mode"]
CONTINUOUS = 1,
}
impl From<CONT_A> for bool {
#[inline(always)]
fn from(variant: CONT_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `CONT`"]
pub type CONT_R = crate::R<bool, CONT_A>;
impl CONT_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CONT_A {
match self.bits {
false => CONT_A::SINGLE,
true => CONT_A::CONTINUOUS,
}
}
#[doc = "Checks if the value of the field is `SINGLE`"]
#[inline(always)]
pub fn is_single(&self) -> bool {
*self == CONT_A::SINGLE
}
#[doc = "Checks if the value of the field is `CONTINUOUS`"]
#[inline(always)]
pub fn is_continuous(&self) -> bool {
*self == CONT_A::CONTINUOUS
}
}
#[doc = "Write proxy for field `CONT`"]
pub struct CONT_W<'a> {
w: &'a mut W,
}
impl<'a> CONT_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CONT_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Single conversion mode"]
#[inline(always)]
pub fn single(self) -> &'a mut W {
self.variant(CONT_A::SINGLE)
}
#[doc = "Continuous conversion mode"]
#[inline(always)]
pub fn continuous(self) -> &'a mut W {
self.variant(CONT_A::CONTINUOUS)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
self.w
}
}
#[doc = "Overrun management mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum OVRMOD_A {
#[doc = "0: ADC_DR register is preserved with the old data when an overrun is detected"]
PRESERVED = 0,
#[doc = "1: ADC_DR register is overwritten with the last conversion result when an overrun is detected"]
OVERWRITTEN = 1,
}
impl From<OVRMOD_A> for bool {
#[inline(always)]
fn from(variant: OVRMOD_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `OVRMOD`"]
pub type OVRMOD_R = crate::R<bool, OVRMOD_A>;
impl OVRMOD_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> OVRMOD_A {
match self.bits {
false => OVRMOD_A::PRESERVED,
true => OVRMOD_A::OVERWRITTEN,
}
}
#[doc = "Checks if the value of the field is `PRESERVED`"]
#[inline(always)]
pub fn is_preserved(&self) -> bool {
*self == OVRMOD_A::PRESERVED
}
#[doc = "Checks if the value of the field is `OVERWRITTEN`"]
#[inline(always)]
pub fn is_overwritten(&self) -> bool {
*self == OVRMOD_A::OVERWRITTEN
}
}
#[doc = "Write proxy for field `OVRMOD`"]
pub struct OVRMOD_W<'a> {
w: &'a mut W,
}
impl<'a> OVRMOD_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: OVRMOD_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "ADC_DR register is preserved with the old data when an overrun is detected"]
#[inline(always)]
pub fn preserved(self) -> &'a mut W {
self.variant(OVRMOD_A::PRESERVED)
}
#[doc = "ADC_DR register is overwritten with the last conversion result when an overrun is detected"]
#[inline(always)]
pub fn overwritten(self) -> &'a mut W {
self.variant(OVRMOD_A::OVERWRITTEN)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
self.w
}
}
#[doc = "External trigger enable and polarity selection\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum EXTEN_A {
#[doc = "0: Trigger detection disabled"]
DISABLED = 0,
#[doc = "1: Trigger detection on the rising edge"]
RISINGEDGE = 1,
#[doc = "2: Trigger detection on the falling edge"]
FALLINGEDGE = 2,
#[doc = "3: Trigger detection on both the rising and falling edges"]
BOTHEDGES = 3,
}
impl From<EXTEN_A> for u8 {
#[inline(always)]
fn from(variant: EXTEN_A) -> Self {
variant as _
}
}
#[doc = "Reader of field `EXTEN`"]
pub type EXTEN_R = crate::R<u8, EXTEN_A>;
impl EXTEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> EXTEN_A {
match self.bits {
0 => EXTEN_A::DISABLED,
1 => EXTEN_A::RISINGEDGE,
2 => EXTEN_A::FALLINGEDGE,
3 => EXTEN_A::BOTHEDGES,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == EXTEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `RISINGEDGE`"]
#[inline(always)]
pub fn is_rising_edge(&self) -> bool {
*self == EXTEN_A::RISINGEDGE
}
#[doc = "Checks if the value of the field is `FALLINGEDGE`"]
#[inline(always)]
pub fn is_falling_edge(&self) -> bool {
*self == EXTEN_A::FALLINGEDGE
}
#[doc = "Checks if the value of the field is `BOTHEDGES`"]
#[inline(always)]
pub fn is_both_edges(&self) -> bool {
*self == EXTEN_A::BOTHEDGES
}
}
#[doc = "Write proxy for field `EXTEN`"]
pub struct EXTEN_W<'a> {
w: &'a mut W,
}
impl<'a> EXTEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EXTEN_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "Trigger detection disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(EXTEN_A::DISABLED)
}
#[doc = "Trigger detection on the rising edge"]
#[inline(always)]
pub fn rising_edge(self) -> &'a mut W {
self.variant(EXTEN_A::RISINGEDGE)
}
#[doc = "Trigger detection on the falling edge"]
#[inline(always)]
pub fn falling_edge(self) -> &'a mut W {
self.variant(EXTEN_A::FALLINGEDGE)
}
#[doc = "Trigger detection on both the rising and falling edges"]
#[inline(always)]
pub fn both_edges(self) -> &'a mut W {
self.variant(EXTEN_A::BOTHEDGES)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10);
self.w
}
}
#[doc = "External trigger selection\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum EXTSEL_A {
#[doc = "2: Timer 2 TRGO event"]
TIM2_TRGO = 2,
#[doc = "0: Timer 1 TRGO Event"]
TIM1_TRGO = 0,
#[doc = "1: Timer 1 CC4 event"]
TIM1_CC4 = 1,
#[doc = "3: Timer 3 TRGO event"]
TIM3_TRGO = 3,
#[doc = "4: Timer 15 TRGO event"]
TIM15_TRGO = 4,
}
impl From<EXTSEL_A> for u8 {
#[inline(always)]
fn from(variant: EXTSEL_A) -> Self {
variant as _
}
}
#[doc = "Reader of field `EXTSEL`"]
pub type EXTSEL_R = crate::R<u8, EXTSEL_A>;
impl EXTSEL_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<u8, EXTSEL_A> {
use crate::Variant::*;
match self.bits {
2 => Val(EXTSEL_A::TIM2_TRGO),
0 => Val(EXTSEL_A::TIM1_TRGO),
1 => Val(EXTSEL_A::TIM1_CC4),
3 => Val(EXTSEL_A::TIM3_TRGO),
4 => Val(EXTSEL_A::TIM15_TRGO),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `TIM2_TRGO`"]
#[inline(always)]
pub fn is_tim2_trgo(&self) -> bool {
*self == EXTSEL_A::TIM2_TRGO
}
#[doc = "Checks if the value of the field is `TIM1_TRGO`"]
#[inline(always)]
pub fn is_tim1_trgo(&self) -> bool {
*self == EXTSEL_A::TIM1_TRGO
}
#[doc = "Checks if the value of the field is `TIM1_CC4`"]
#[inline(always)]
pub fn is_tim1_cc4(&self) -> bool {
*self == EXTSEL_A::TIM1_CC4
}
#[doc = "Checks if the value of the field is `TIM3_TRGO`"]
#[inline(always)]
pub fn is_tim3_trgo(&self) -> bool {
*self == EXTSEL_A::TIM3_TRGO
}
#[doc = "Checks if the value of the field is `TIM15_TRGO`"]
#[inline(always)]
pub fn is_tim15_trgo(&self) -> bool {
*self == EXTSEL_A::TIM15_TRGO
}
}
#[doc = "Write proxy for field `EXTSEL`"]
pub struct EXTSEL_W<'a> {
w: &'a mut W,
}
impl<'a> EXTSEL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EXTSEL_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "Timer 2 TRGO event"]
#[inline(always)]
pub fn tim2_trgo(self) -> &'a mut W {
self.variant(EXTSEL_A::TIM2_TRGO)
}
#[doc = "Timer 1 TRGO Event"]
#[inline(always)]
pub fn tim1_trgo(self) -> &'a mut W {
self.variant(EXTSEL_A::TIM1_TRGO)
}
#[doc = "Timer 1 CC4 event"]
#[inline(always)]
pub fn tim1_cc4(self) -> &'a mut W {
self.variant(EXTSEL_A::TIM1_CC4)
}
#[doc = "Timer 3 TRGO event"]
#[inline(always)]
pub fn tim3_trgo(self) -> &'a mut W {
self.variant(EXTSEL_A::TIM3_TRGO)
}
#[doc = "Timer 15 TRGO event"]
#[inline(always)]
pub fn tim15_trgo(self) -> &'a mut W {
self.variant(EXTSEL_A::TIM15_TRGO)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 6)) | (((value as u32) & 0x07) << 6);
self.w
}
}
#[doc = "Data alignment\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ALIGN_A {
#[doc = "0: Right alignment"]
RIGHT = 0,
#[doc = "1: Left alignment"]
LEFT = 1,
}
impl From<ALIGN_A> for bool {
#[inline(always)]
fn from(variant: ALIGN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `ALIGN`"]
pub type ALIGN_R = crate::R<bool, ALIGN_A>;
impl ALIGN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ALIGN_A {
match self.bits {
false => ALIGN_A::RIGHT,
true => ALIGN_A::LEFT,
}
}
#[doc = "Checks if the value of the field is `RIGHT`"]
#[inline(always)]
pub fn is_right(&self) -> bool {
*self == ALIGN_A::RIGHT
}
#[doc = "Checks if the value of the field is `LEFT`"]
#[inline(always)]
pub fn is_left(&self) -> bool {
*self == ALIGN_A::LEFT
}
}
#[doc = "Write proxy for field `ALIGN`"]
pub struct ALIGN_W<'a> {
w: &'a mut W,
}
impl<'a> ALIGN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ALIGN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Right alignment"]
#[inline(always)]
pub fn right(self) -> &'a mut W {
self.variant(ALIGN_A::RIGHT)
}
#[doc = "Left alignment"]
#[inline(always)]
pub fn left(self) -> &'a mut W {
self.variant(ALIGN_A::LEFT)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Data resolution\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum RES_A {
#[doc = "0: 12-bit (14 ADCCLK cycles)"]
TWELVEBIT = 0,
#[doc = "1: 10-bit (13 ADCCLK cycles)"]
TENBIT = 1,
#[doc = "2: 8-bit (11 ADCCLK cycles)"]
EIGHTBIT = 2,
#[doc = "3: 6-bit (9 ADCCLK cycles)"]
SIXBIT = 3,
}
impl From<RES_A> for u8 {
#[inline(always)]
fn from(variant: RES_A) -> Self {
variant as _
}
}
#[doc = "Reader of field `RES`"]
pub type RES_R = crate::R<u8, RES_A>;
impl RES_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RES_A {
match self.bits {
0 => RES_A::TWELVEBIT,
1 => RES_A::TENBIT,
2 => RES_A::EIGHTBIT,
3 => RES_A::SIXBIT,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `TWELVEBIT`"]
#[inline(always)]
pub fn is_twelve_bit(&self) -> bool {
*self == RES_A::TWELVEBIT
}
#[doc = "Checks if the value of the field is `TENBIT`"]
#[inline(always)]
pub fn is_ten_bit(&self) -> bool {
*self == RES_A::TENBIT
}
#[doc = "Checks if the value of the field is `EIGHTBIT`"]
#[inline(always)]
pub fn is_eight_bit(&self) -> bool {
*self == RES_A::EIGHTBIT
}
#[doc = "Checks if the value of the field is `SIXBIT`"]
#[inline(always)]
pub fn is_six_bit(&self) -> bool {
*self == RES_A::SIXBIT
}
}
#[doc = "Write proxy for field `RES`"]
pub struct RES_W<'a> {
w: &'a mut W,
}
impl<'a> RES_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: RES_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "12-bit (14 ADCCLK cycles)"]
#[inline(always)]
pub fn twelve_bit(self) -> &'a mut W {
self.variant(RES_A::TWELVEBIT)
}
#[doc = "10-bit (13 ADCCLK cycles)"]
#[inline(always)]
pub fn ten_bit(self) -> &'a mut W {
self.variant(RES_A::TENBIT)
}
#[doc = "8-bit (11 ADCCLK cycles)"]
#[inline(always)]
pub fn eight_bit(self) -> &'a mut W {
self.variant(RES_A::EIGHTBIT)
}
#[doc = "6-bit (9 ADCCLK cycles)"]
#[inline(always)]
pub fn six_bit(self) -> &'a mut W {
self.variant(RES_A::SIXBIT)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 3)) | (((value as u32) & 0x03) << 3);
self.w
}
}
#[doc = "Scan sequence direction\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SCANDIR_A {
#[doc = "0: Upward scan (from CHSEL0 to CHSEL18)"]
UPWARD = 0,
#[doc = "1: Backward scan (from CHSEL18 to CHSEL0)"]
BACKWARD = 1,
}
impl From<SCANDIR_A> for bool {
#[inline(always)]
fn from(variant: SCANDIR_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `SCANDIR`"]
pub type SCANDIR_R = crate::R<bool, SCANDIR_A>;
impl SCANDIR_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> SCANDIR_A {
match self.bits {
false => SCANDIR_A::UPWARD,
true => SCANDIR_A::BACKWARD,
}
}
#[doc = "Checks if the value of the field is `UPWARD`"]
#[inline(always)]
pub fn is_upward(&self) -> bool {
*self == SCANDIR_A::UPWARD
}
#[doc = "Checks if the value of the field is `BACKWARD`"]
#[inline(always)]
pub fn is_backward(&self) -> bool {
*self == SCANDIR_A::BACKWARD
}
}
#[doc = "Write proxy for field `SCANDIR`"]
pub struct SCANDIR_W<'a> {
w: &'a mut W,
}
impl<'a> SCANDIR_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SCANDIR_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Upward scan (from CHSEL0 to CHSEL18)"]
#[inline(always)]
pub fn upward(self) -> &'a mut W {
self.variant(SCANDIR_A::UPWARD)
}
#[doc = "Backward scan (from CHSEL18 to CHSEL0)"]
#[inline(always)]
pub fn backward(self) -> &'a mut W {
self.variant(SCANDIR_A::BACKWARD)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Direct memery access configuration\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DMACFG_A {
#[doc = "0: DMA one shot mode"]
ONESHOT = 0,
#[doc = "1: DMA circular mode"]
CIRCULAR = 1,
}
impl From<DMACFG_A> for bool {
#[inline(always)]
fn from(variant: DMACFG_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DMACFG`"]
pub type DMACFG_R = crate::R<bool, DMACFG_A>;
impl DMACFG_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DMACFG_A {
match self.bits {
false => DMACFG_A::ONESHOT,
true => DMACFG_A::CIRCULAR,
}
}
#[doc = "Checks if the value of the field is `ONESHOT`"]
#[inline(always)]
pub fn is_one_shot(&self) -> bool {
*self == DMACFG_A::ONESHOT
}
#[doc = "Checks if the value of the field is `CIRCULAR`"]
#[inline(always)]
pub fn is_circular(&self) -> bool {
*self == DMACFG_A::CIRCULAR
}
}
#[doc = "Write proxy for field `DMACFG`"]
pub struct DMACFG_W<'a> {
w: &'a mut W,
}
impl<'a> DMACFG_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DMACFG_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "DMA one shot mode"]
#[inline(always)]
pub fn one_shot(self) -> &'a mut W {
self.variant(DMACFG_A::ONESHOT)
}
#[doc = "DMA circular mode"]
#[inline(always)]
pub fn circular(self) -> &'a mut W {
self.variant(DMACFG_A::CIRCULAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Direct memory access enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DMAEN_A {
#[doc = "0: DMA mode disabled"]
DISABLED = 0,
#[doc = "1: DMA mode enabled"]
ENABLED = 1,
}
impl From<DMAEN_A> for bool {
#[inline(always)]
fn from(variant: DMAEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DMAEN`"]
pub type DMAEN_R = crate::R<bool, DMAEN_A>;
impl DMAEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DMAEN_A {
match self.bits {
false => DMAEN_A::DISABLED,
true => DMAEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DMAEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DMAEN_A::ENABLED
}
}
#[doc = "Write proxy for field `DMAEN`"]
pub struct DMAEN_W<'a> {
w: &'a mut W,
}
impl<'a> DMAEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DMAEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "DMA mode disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DMAEN_A::DISABLED)
}
#[doc = "DMA mode enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DMAEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "Wait conversion mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WAIT_A {
#[doc = "0: Wait conversion mode off"]
DISABLED = 0,
#[doc = "1: Wait conversion mode on"]
ENABLED = 1,
}
impl From<WAIT_A> for bool {
#[inline(always)]
fn from(variant: WAIT_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `WAIT`"]
pub type WAIT_R = crate::R<bool, WAIT_A>;
impl WAIT_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> WAIT_A {
match self.bits {
false => WAIT_A::DISABLED,
true => WAIT_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == WAIT_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == WAIT_A::ENABLED
}
}
#[doc = "Write proxy for field `WAIT`"]
pub struct WAIT_W<'a> {
w: &'a mut W,
}
impl<'a> WAIT_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WAIT_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Wait conversion mode off"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(WAIT_A::DISABLED)
}
#[doc = "Wait conversion mode on"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(WAIT_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
impl R {
#[doc = "Bits 26:30 - Analog watchdog channel selection"]
#[inline(always)]
pub fn awdch(&self) -> AWDCH_R {
AWDCH_R::new(((self.bits >> 26) & 0x1f) as u8)
}
#[doc = "Bit 23 - Analog watchdog enable"]
#[inline(always)]
pub fn awden(&self) -> AWDEN_R {
AWDEN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 22 - Enable the watchdog on a single channel or on all channels"]
#[inline(always)]
pub fn awdsgl(&self) -> AWDSGL_R {
AWDSGL_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 16 - Discontinuous mode"]
#[inline(always)]
pub fn discen(&self) -> DISCEN_R {
DISCEN_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 15 - Auto-off mode"]
#[inline(always)]
pub fn autoff(&self) -> AUTOFF_R {
AUTOFF_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 14 - Auto-delayed conversion mode"]
#[inline(always)]
pub fn autdly(&self) -> AUTDLY_R {
AUTDLY_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 13 - Single / continuous conversion mode"]
#[inline(always)]
pub fn cont(&self) -> CONT_R {
CONT_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 12 - Overrun management mode"]
#[inline(always)]
pub fn ovrmod(&self) -> OVRMOD_R {
OVRMOD_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bits 10:11 - External trigger enable and polarity selection"]
#[inline(always)]
pub fn exten(&self) -> EXTEN_R {
EXTEN_R::new(((self.bits >> 10) & 0x03) as u8)
}
#[doc = "Bits 6:8 - External trigger selection"]
#[inline(always)]
pub fn extsel(&self) -> EXTSEL_R {
EXTSEL_R::new(((self.bits >> 6) & 0x07) as u8)
}
#[doc = "Bit 5 - Data alignment"]
#[inline(always)]
pub fn align(&self) -> ALIGN_R {
ALIGN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bits 3:4 - Data resolution"]
#[inline(always)]
pub fn res(&self) -> RES_R {
RES_R::new(((self.bits >> 3) & 0x03) as u8)
}
#[doc = "Bit 2 - Scan sequence direction"]
#[inline(always)]
pub fn scandir(&self) -> SCANDIR_R {
SCANDIR_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - Direct memery access configuration"]
#[inline(always)]
pub fn dmacfg(&self) -> DMACFG_R {
DMACFG_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - Direct memory access enable"]
#[inline(always)]
pub fn dmaen(&self) -> DMAEN_R {
DMAEN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 14 - Wait conversion mode"]
#[inline(always)]
pub fn wait(&self) -> WAIT_R {
WAIT_R::new(((self.bits >> 14) & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 26:30 - Analog watchdog channel selection"]
#[inline(always)]
pub fn awdch(&mut self) -> AWDCH_W {
AWDCH_W { w: self }
}
#[doc = "Bit 23 - Analog watchdog enable"]
#[inline(always)]
pub fn awden(&mut self) -> AWDEN_W {
AWDEN_W { w: self }
}
#[doc = "Bit 22 - Enable the watchdog on a single channel or on all channels"]
#[inline(always)]
pub fn awdsgl(&mut self) -> AWDSGL_W {
AWDSGL_W { w: self }
}
#[doc = "Bit 16 - Discontinuous mode"]
#[inline(always)]
pub fn discen(&mut self) -> DISCEN_W {
DISCEN_W { w: self }
}
#[doc = "Bit 15 - Auto-off mode"]
#[inline(always)]
pub fn autoff(&mut self) -> AUTOFF_W {
AUTOFF_W { w: self }
}
#[doc = "Bit 14 - Auto-delayed conversion mode"]
#[inline(always)]
pub fn autdly(&mut self) -> AUTDLY_W {
AUTDLY_W { w: self }
}
#[doc = "Bit 13 - Single / continuous conversion mode"]
#[inline(always)]
pub fn cont(&mut self) -> CONT_W {
CONT_W { w: self }
}
#[doc = "Bit 12 - Overrun management mode"]
#[inline(always)]
pub fn ovrmod(&mut self) -> OVRMOD_W {
OVRMOD_W { w: self }
}
#[doc = "Bits 10:11 - External trigger enable and polarity selection"]
#[inline(always)]
pub fn exten(&mut self) -> EXTEN_W {
EXTEN_W { w: self }
}
#[doc = "Bits 6:8 - External trigger selection"]
#[inline(always)]
pub fn extsel(&mut self) -> EXTSEL_W {
EXTSEL_W { w: self }
}
#[doc = "Bit 5 - Data alignment"]
#[inline(always)]
pub fn align(&mut self) -> ALIGN_W {
ALIGN_W { w: self }
}
#[doc = "Bits 3:4 - Data resolution"]
#[inline(always)]
pub fn res(&mut self) -> RES_W {
RES_W { w: self }
}
#[doc = "Bit 2 - Scan sequence direction"]
#[inline(always)]
pub fn scandir(&mut self) -> SCANDIR_W {
SCANDIR_W { w: self }
}
#[doc = "Bit 1 - Direct memery access configuration"]
#[inline(always)]
pub fn dmacfg(&mut self) -> DMACFG_W {
DMACFG_W { w: self }
}
#[doc = "Bit 0 - Direct memory access enable"]
#[inline(always)]
pub fn dmaen(&mut self) -> DMAEN_W {
DMAEN_W { w: self }
}
#[doc = "Bit 14 - Wait conversion mode"]
#[inline(always)]
pub fn wait(&mut self) -> WAIT_W {
WAIT_W { w: self }
}
}