Struct stm32_i2s_v12x::driver::I2sCore
source · pub struct I2sCore<I, PART, MS, DIR, STD> { /* private fields */ }
Expand description
Main or extension part of a DualI2sDriver
.
I
: The DualI2sPeripheral controlled by the I2sCore.PART
:Main
orExt
. The part of DualI2sPeripheral controlled by I2sCore.MS
:Master
orSlave
. The role of the I2sCore. Only aMain
I2sCore can be Master.DIR
:Transmit
orReceive
. Communication direction.STD
: I2S standard, egPhilips
Implementations§
source§impl<I: DualI2sPeripheral, PART, MS, DIR, STD> I2sCore<I, PART, MS, DIR, STD>where
Self: I2sCoreRegisters,
impl<I: DualI2sPeripheral, PART, MS, DIR, STD> I2sCore<I, PART, MS, DIR, STD>where
Self: I2sCoreRegisters,
Methods available for any mode
sourcepub fn disable(&mut self)
pub fn disable(&mut self)
Immediately Disable the I2S peripheral.
Generated clocks aren’t reset, so a call to reset_clocks
may required in master mode.
It’s up to the caller to not disable the peripheral in the middle of a frame.
sourcepub fn data_register_address(&self) -> u32
pub fn data_register_address(&self) -> u32
Get address of the data register for DMA setup.
source§impl<I, PART, MS, STD> I2sCore<I, PART, MS, Transmit, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
impl<I, PART, MS, STD> I2sCore<I, PART, MS, Transmit, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
Transmit-only methods
sourcepub fn write_data_register(&mut self, value: u16)
pub fn write_data_register(&mut self, value: u16)
Write a raw half word to the Tx buffer and delete the TXE flag in status register.
It’s up to the caller to write the content when the buffer is empty.
sourcepub fn set_tx_interrupt(&mut self, enabled: bool)
pub fn set_tx_interrupt(&mut self, enabled: bool)
When set to true
, an interrupt is generated each time the Tx buffer is empty.
sourcepub fn set_tx_dma(&mut self, enabled: bool)
pub fn set_tx_dma(&mut self, enabled: bool)
When set to true
, a DMA request is generated each time the Tx buffer is empty.
source§impl<I, PART, MS, STD> I2sCore<I, PART, MS, Receive, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
impl<I, PART, MS, STD> I2sCore<I, PART, MS, Receive, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
Receive-only methods
sourcepub fn read_data_register(&mut self) -> u16
pub fn read_data_register(&mut self) -> u16
Read a raw value from the Rx buffer and clear the RXNE flag in status register.
sourcepub fn set_rx_interrupt(&mut self, enabled: bool)
pub fn set_rx_interrupt(&mut self, enabled: bool)
When set to true
, an interrupt is generated each time the Rx buffer contains a new data.
sourcepub fn set_rx_dma(&mut self, enabled: bool)
pub fn set_rx_dma(&mut self, enabled: bool)
When set to true
, a DMA request is generated each time the Rx buffer contains a new data.
source§impl<I, STD> I2sCore<I, Main, Master, Receive, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
impl<I, STD> I2sCore<I, Main, Master, Receive, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
Error interrupt, Master Receive Mode.
sourcepub fn set_error_interrupt(&mut self, enabled: bool)
pub fn set_error_interrupt(&mut self, enabled: bool)
When set to true
, an interrupt is generated each time an error occurs.
This is not available for Master Transmit because no error can occur in this mode.
source§impl<I, PART, DIR, STD> I2sCore<I, PART, Slave, DIR, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
impl<I, PART, DIR, STD> I2sCore<I, PART, Slave, DIR, STD>where
I: DualI2sPeripheral,
Self: I2sCoreRegisters,
Error interrupt, Slave Mode.
sourcepub fn set_error_interrupt(&mut self, enabled: bool)
pub fn set_error_interrupt(&mut self, enabled: bool)
When set to true
, an interrupt is generated each time an error occurs.
This is not available for Master Transmit because no error can occur in this mode.