Struct stm32_fmc::Sdram

pub struct Sdram<FMC, IC> { /* fields omitted */ }

SDRAM Controller

Implementations

impl<IC: SdramChip, FMC: FmcPeripheral> Sdram<FMC, IC>

pub fn new<PINS, BANK, ADDR>(fmc: FMC, _pins: PINS, _chip: IC) -> Self where
    PINS: PinsSdram<BANK, ADDR>,
    ADDR: AddressPinSet,
    BANK: SdramPinSet, 

New SDRAM instance

_pins must be a set of pins connecting to an SDRAM on the FMC controller

Panics

• Panics if there are not enough address lines in PINS to access the whole SDRAM

• Panics if there are not enough bank address lines in PINS to access the whole SDRAM

pub fn new_unchecked(
    fmc: FMC,
    bank: impl Into<SdramTargetBank>,
    _chip: IC
) -> Self

New SDRAM instance

bank denotes which SDRAM bank to target. This can be either bank 1 or bank 2.

Safety

The pins are not checked against the requirements for the SDRAM chip. So you may be able to initialise a SDRAM without enough pins to access the whole memory

pub fn init<D>(&mut self, delay: &mut D) -> *mut u32 where
    D: DelayUs<u8>, 

Initialise SDRAM instance. Delay is used to wait the SDRAM powerup delay

Returns a raw pointer to the memory-mapped SDRAM block

Panics

• Panics if any setting in IC::CONFIG cannot be achieved

• Panics if the FMC source clock is too fast for maximum SD clock in IC::TIMING