1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
use stm32f4xx_hal::stm32::{RCC, SYSCFG};
#[cfg(feature = "nucleo-f429zi")]
use stm32f4xx_hal::gpio::{
gpioa::{PA1, PA2, PA7},
gpiob::{PB13},
gpioc::{PC1, PC4, PC5},
gpiog::{PG11, PG13},
Speed::VeryHigh,
};
pub fn setup(rcc: &RCC, syscfg: &SYSCFG) {
rcc.apb2enr.modify(|_, w| w.syscfgen().set_bit());
syscfg.pmc.modify(|_, w| w.mii_rmii_sel().set_bit());
rcc.ahb1enr.modify(|_, w| {
w.ethmacen() .set_bit()
.ethmactxen().set_bit()
.ethmacrxen().set_bit()
});
reset_pulse(&rcc);
}
fn reset_pulse(rcc: &RCC) {
rcc.ahb1rstr.modify(|_, w| w.ethmacrst().set_bit());
rcc.ahb1rstr.modify(|_, w| w.ethmacrst().clear_bit());
}
#[cfg(feature = "nucleo-f429zi")]
pub fn setup_pins<M1, M2, M3, M4, M5, M6, M7, M8, M9>(
pa1: PA1<M1>, pa2: PA2<M2>, pa7: PA7<M3>, pb13: PB13<M4>, pc1: PC1<M5>,
pc4: PC4<M6>, pc5: PC5<M7>, pg11: PG11<M8>, pg13: PG13<M9>
) {
pa1.into_alternate_af11().set_speed(VeryHigh);
pa2.into_alternate_af11().set_speed(VeryHigh);
pc1.into_alternate_af11().set_speed(VeryHigh);
pa7.into_alternate_af11().set_speed(VeryHigh);
pc4.into_alternate_af11().set_speed(VeryHigh);
pc5.into_alternate_af11().set_speed(VeryHigh);
pg11.into_alternate_af11().set_speed(VeryHigh);
pg13.into_alternate_af11().set_speed(VeryHigh);
pb13.into_alternate_af11().set_speed(VeryHigh);
}