VhdlFile

Struct VhdlFile 

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pub struct VhdlFile { /* private fields */ }

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impl VhdlFile

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pub fn new(file_name: &str) -> VhdlFile

Examples found in repository?
examples/vhdl/adder.rs (line 20)
10fn main() -> Result< (), std::io::Error > {
11    let mut adder = Entity::new( "adder" );
12    adder.add_generic( Generic::new_with_default( "SIZE", "positive", "32" ) );
13    adder.add_port( Port::new( "a", Direction::IN, "unsigned( SIZE - 1 downto 0 )" ) );
14    adder.add_port( Port::new( "b", Direction::IN, "unsigned( SIZE - 1 downto 0 )" ) );
15    adder.add_port( Port::new( "c", Direction::OUT, "unsigned( SIZE - 1 downto 0 )" ) );
16
17    let mut rtl = Architecture::new( "rtl", & adder );
18    rtl.add_signal_assignment( SignalAssignment::new_with_label( "add", "c", "a + b" ));
19
20    let mut vhdl_file = VhdlFile::new( "examples/vhdl/adder.vhd" );
21    vhdl_file.add_architecture( rtl );
22    vhdl_file.write()?;
23    Ok(())
24}
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pub fn add_entity(&mut self, design_unit: Entity)

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pub fn add_architecture(&mut self, design_unit: Architecture)

Examples found in repository?
examples/vhdl/adder.rs (line 21)
10fn main() -> Result< (), std::io::Error > {
11    let mut adder = Entity::new( "adder" );
12    adder.add_generic( Generic::new_with_default( "SIZE", "positive", "32" ) );
13    adder.add_port( Port::new( "a", Direction::IN, "unsigned( SIZE - 1 downto 0 )" ) );
14    adder.add_port( Port::new( "b", Direction::IN, "unsigned( SIZE - 1 downto 0 )" ) );
15    adder.add_port( Port::new( "c", Direction::OUT, "unsigned( SIZE - 1 downto 0 )" ) );
16
17    let mut rtl = Architecture::new( "rtl", & adder );
18    rtl.add_signal_assignment( SignalAssignment::new_with_label( "add", "c", "a + b" ));
19
20    let mut vhdl_file = VhdlFile::new( "examples/vhdl/adder.vhd" );
21    vhdl_file.add_architecture( rtl );
22    vhdl_file.write()?;
23    Ok(())
24}

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