smmu 1.7.1

//! Configuration structures for ARM SMMU v3
//!
//! This module provides type-safe configuration structures for the SMMU controller,
//! including per-stream and global configurations. All configurations use builder
//! patterns for ergonomic construction and compile-time validation where possible.
//!
//! # ARM SMMU v3 Compliance
//!
//! All configuration structures follow the ARM SMMU v3 specification requirements
//! for queue sizes, cache configurations, and address space limits.

use super::security_state::SecurityState;
use crate::types::ValidationError;
use core::fmt;

#[cfg(feature = "std")]
use std::time::Duration;

#[cfg(feature = "std")]
use std::collections::HashMap;

/// Helper function to parse numeric values from strings, handling underscores
///
/// Rust's `.parse()` doesn't handle underscores in string input (only in source literals),
/// so we need to strip them before parsing.
#[cfg(feature = "std")]
fn parse_numeric<T: std::str::FromStr>(value: &str, field_name: &str) -> Result<T, ValidationError> {
    value.replace('_', "").parse().map_err(|_| ValidationError::InvalidConfiguration {
        reason: format!("invalid {field_name}"),
    })
}

/// §5.2 STE.STRW: Stream World — exception level selection
///
/// Selects the exception level for the stream per ARM SMMU v3 §5.2.
#[repr(u8)]
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Copy, Clone, Debug, PartialEq, Eq, Hash)]
pub enum StreamWorld {
    /// §5.2 STRW=0b00: NS-EL1/EL0 — Non-Secure EL1 and EL0
    #[allow(clippy::upper_case_acronyms)]
    El1El0 = 0x00,
    /// §5.2 STRW=0b01: NS-EL2 — Non-Secure EL2
    El2 = 0x01,
    /// §5.2 STRW=0b10: NS-EL2 with VHE (E2H=1) — Non-Secure EL2 Virtualization Host Extension
    El2E2h = 0x02,
    /// §5.2 STRW=0b11: EL3/Secure state
    El3 = 0x03,
}

impl Default for StreamWorld {
    fn default() -> Self {
        Self::El1El0
    }
}

impl fmt::Display for StreamWorld {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        match self {
            Self::El1El0 => write!(f, "El1El0"),
            Self::El2 => write!(f, "El2"),
            Self::El2E2h => write!(f, "El2E2h"),
            Self::El3 => write!(f, "El3"),
        }
    }
}

/// Fault handling mode for stream configuration
///
/// Defines how the SMMU handles translation faults for a stream.
#[repr(u8)]
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Copy, Clone, Debug, PartialEq, Eq, Hash)]
pub enum FaultMode {
    /// Terminate access on fault - abort transaction immediately
    Terminate = 0,

    /// Stall access on fault - queue fault and wait for software intervention
    Stall = 1,
}

impl Default for FaultMode {
    fn default() -> Self {
        Self::Terminate
    }
}

impl fmt::Display for FaultMode {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        match self {
            Self::Terminate => write!(f, "Terminate"),
            Self::Stall => write!(f, "Stall"),
        }
    }
}

/// Per-stream configuration structure
///
/// Defines translation behavior for a single stream, including stage enablement,
/// PASID support, and fault handling mode.
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct StreamConfig {
    /// Enable translation for this stream
    pub translation_enabled: bool,

    /// Enable Stage 1 translation (IOVA → IPA or IOVA → PA)
    pub stage1_enabled: bool,

    /// Enable Stage 2 translation (IPA → PA)
    pub stage2_enabled: bool,

    /// STE.Config==0b000: stream is in abort/disabled mode (§5.2 §7.3.7, CT-09).
    ///
    /// When `true`, all transactions on this stream are silently aborted (no event
    /// is recorded). This represents the ARM SMMU v3 STE.Config==0b000 state.
    /// Distinct from bypass mode (STE.Config==0b100) where PA==IOVA identity mapping
    /// is returned.
    ///
    /// This field is set implicitly by the builder when `translation_enabled(false)` is
    /// called explicitly. The builder default (without calling `translation_enabled`)
    /// remains in bypass mode (disabled=false).
    pub disabled: bool,

    /// PASID support enabled for this stream
    pub pasid_enabled: bool,

    /// Maximum PASID value allowed (default: 1_048_575, 20-bit)
    pub max_pasid: u32,

    /// Fault handling mode
    pub fault_mode: FaultMode,

    /// Security state enforcement enabled
    pub security_enforced: bool,

    /// Security state for this stream (FINDING-NEW-44).
    ///
    /// The security state carried in `AtcInvalidateCompletion` and
    /// `CommandSyncCompletion` events must reflect the stream's configured
    /// security state rather than always using `NonSecure`.
    ///
    /// Default: `SecurityState::NonSecure` (backward compatible).
    pub security_state: SecurityState,

    /// VMID (Virtual Machine ID) — STE Word 2 bits 63:48 per ARM §5.2.
    /// Tags Stage-2 TLB entries; used by `CMD_TLBI_S12_VMALL` and
    /// `CMD_TLBI_S2_IPA` for VMID-targeted invalidation.
    pub vmid: u16,

    /// Hardware Access Flag management enabled (CD.HA bit 43, ARM SMMU v3 §3.13).
    /// When true, the SMMU sets the Access Flag in the page table entry on first access.
    pub ha: bool,

    /// Hardware Dirty State management enabled (CD.HD bit 42, ARM SMMU v3 §3.13).
    /// When true, the SMMU sets the dirty bit in the page table entry on first write.
    pub hd: bool,

    /// ARM §5.2 STE.S1DSS: controls behavior when a non-substream transaction
    /// (PASID==0) arrives on a substream-capable stage-1 stream (`s1cd_max > 0`).
    ///
    /// - `0b00` (0): abort with F_STREAM_DISABLED (§7.3.7)
    /// - `0b01` (1): bypass stage-1 for this transaction (identity PA = IOVA)
    /// - `0b10` (2): use CD\[0\] for translation (default — preserves existing behavior)
    ///
    /// Ignored when `s1cd_max == 0` (stream is not substream-capable).
    pub s1dss: u8,

    /// ARM §5.2 STE.S1CDMax: number of SubstreamID bits supported by this stream.
    ///
    /// When `0`, the stream is not substream-capable and `s1dss` is ignored;
    /// PASID=0 always uses the normal CD\[0\] path.
    /// When `> 0`, the stream supports up to `2^s1cd_max` substreams and `s1dss`
    /// governs non-substream (PASID=0) handling.
    pub s1cd_max: u8,

    // ---- CT-20: STE.STRW (§5.2) ----

    /// §5.2 STE.STRW: Stream World — exception level selection (2 bits).
    ///
    /// Selects the effective privilege level for stream transactions.
    pub strw: StreamWorld,

    // ---- CT-19: STE Output-Attribute Override Fields (§5.2) ----

    /// §5.2 STE.NSCFG: Non-Secure attribute override (2 bits).
    ///
    /// - `0b00` = use incoming NS attribute
    /// - `0b01` = force Secure
    /// - `0b10` = force NonSecure
    /// - `0b11` = implementation-defined
    pub ns_cfg: u8,

    /// §5.2 STE.SHCFG: Shareability override (2 bits).
    ///
    /// - `0b00` = use incoming shareability
    /// - `0b01` = Inner-Shareable
    /// - `0b10` = Outer-Shareable
    /// - `0b11` = Non-Shareable
    pub sh_cfg: u8,

    /// §5.2 STE.ALLOCCFG: Allocation hint override (4 bits).
    pub alloc_cfg: u8,

    /// §5.2 STE.MemAttr: Device memory type attribute (4 bits).
    pub mem_attr: u8,

    /// §5.2 STE.INSTCFG: Instruction/Data attribute override (2 bits).
    pub inst_cfg: u8,

    /// §5.2 STE.PRIVCFG: Privilege attribute override (2 bits).
    pub priv_cfg: u8,

    /// §5.2 STE.MTCFG: Memory type override enable.
    ///
    /// When `true`, the `mem_attr` field overrides the memory type of translated outputs.
    pub mt_cfg: bool,

    // ---- CT-23: Stage-2 STE Translation Parameters (§5.2) ----

    /// §5.2 STE.S2T0SZ: Stage-2 T0SZ — input address range (6 bits, 0-63).
    pub s2_t0sz: u8,

    /// §5.2 STE.S2TG: Stage-2 translation granule (2 bits).
    ///
    /// - `0` = 4KB granule
    /// - `1` = 64KB granule
    /// - `2` = 16KB granule
    pub s2_tg: u8,

    /// §5.2 STE.S2SL0: Stage-2 starting level (2 bits).
    ///
    /// - `0` = Level 2
    /// - `1` = Level 1
    /// - `2` = Level 0
    pub s2_sl0: u8,

    /// §5.2 STE.S2AA64: Stage-2 AArch64 translation tables.
    pub s2_aa64: bool,

    /// §5.2 STE.S2PS: Stage-2 output physical address size (3 bits).
    ///
    /// - `0` = 32-bit
    /// - `1` = 36-bit
    /// - `2` = 40-bit
    /// - `3` = 42-bit
    /// - `4` = 44-bit
    /// - `5` = 48-bit
    /// - `6` = 52-bit
    pub s2_ps: u8,

    /// §5.2 STE.S2TTB: Physical address of Stage-2 root translation table.
    pub s2_ttb: u64,

    // ---- CT-14: CD.AA64 Field (§5.4) ----

    /// §5.4 CD.AA64: AArch64 translation table format selector.
    ///
    /// - `true` = VMSAv8-64 (AArch64) translation tables
    /// - `false` = VMSAv8-32 LPAE translation tables
    pub aa64: bool,

    // ---- CT-13: CD.T0SZ / CD.T1SZ Fields (§5.4) ----

    /// §5.4 CD.T0SZ: Number of address bits excluded from top of TTBR0 range (0-63).
    ///
    /// Valid range for SMMUv3.0: 0-39. Out-of-range generates `C_BAD_CD`.
    pub t0sz: u8,

    /// §5.4 CD.T1SZ: Number of address bits excluded from top of TTBR1 range (0-63).
    ///
    /// Valid range for SMMUv3.0: 0-39. Out-of-range generates `C_BAD_CD`.
    pub t1sz: u8,

    /// §5.2 STE.MEV: Merged Event.
    ///
    /// When `true`, the SMMU may suppress duplicate fault events for this stream —
    /// if an identical event (same type + stream_id) is already queued, the new
    /// event is silently dropped.  This prevents the event queue from being
    /// flooded with repeated faults from the same stream (ARM §5.2 STE.MEV).
    ///
    /// Default: `false` (all events recorded).
    pub mev: bool,

    // ---- NEW-7: CD.EPD0 / CD.EPD1 (§5.4) ----

    /// §5.4 CD.EPD0: disable TTBR0 translation table walk (§5.4); default `false`.
    ///
    /// When `true`, all stage-1 (TTBR0-equivalent) translation table walks are
    /// disabled and generate F_TRANSLATION.
    pub epd0: bool,

    /// §5.4 CD.EPD1: disable TTBR1 translation table walk (§5.4); default `false`.
    ///
    /// Not separately modelled in the SW simulation (single address space per PASID).
    pub epd1: bool,

    // ---- GAP-E: CD.TBI top-byte-ignore (§3.4.1/§5.4) ----

    /// §5.4 CD.TBI: top-byte-ignore; VA bits[63:56] are masked before T0SZ
    /// range check (§3.4.1); default `false`.
    ///
    /// When `true`, bits[63:56] of the input VA are treated as a tag and are
    /// not used in address range checks.  The translation itself still uses
    /// the original unmasked IOVA.
    pub tbi: bool,

    // ---- GAP-F: CD.IPS per-CD stage-1 output IPA size (§5.4/§3.4) ----

    /// §5.4 CD.IPS: stage-1 output IPA size (3-bit encoding, same as S2PS).
    ///
    /// After stage-1 produces an IPA, the IPA must not exceed `2^IPS`.
    /// Violation generates F_ADDR_SIZE.
    /// Encoding: 0=32-bit, 1=36-bit, 2=40-bit, 3=42-bit, 4=44-bit,
    ///           5=48-bit (default), 6=52-bit.
    pub ips: u8,

    // ---- NEW-12: STE.EATS — Enhanced Address Translation Security (§5.2, §3.9) ----

    /// §5.2 STE.EATS — Enhanced Address Translation Security support level.
    ///
    /// Controls whether ATS (Address Translation Service) requests are accepted
    /// for this stream:
    ///   - `0` = no ATS — ATS Translation Requests generate F_TRANSL_FORBIDDEN
    ///   - `1` = ATS enabled (translation must be active, non-bypass)
    ///   - `2` = ATS+PRI enabled
    ///   - `3` = ATS+PRI+CMD enabled
    ///
    /// Default: `0` (no ATS).
    pub eats: u8,

    // ---- GAP-NEW-G: STE.S1STALLD — stall-disabled override (§5.2) ----

    /// §5.2 STE.S1STALLD: Stage-1 Stall Disabled.
    ///
    /// When `true`, stall semantics are suppressed even if `CD.S=1` (stall mode
    /// is enabled via `FaultMode::Stall`).  All faults use abort semantics.
    ///
    /// Default: `false` (stall mode honoured when CD.S=1).
    pub s1_stalld: bool,

    // ---- NEW-GAP-J: Access Flag Fault management (§3.13.2 / §5.4) ----

    /// §5.4 CD.AFFD — Access Flag Fault Disable (stage-1).
    /// When `true`, disables F_ACCESS for stage-1: a page with AF=0 does not fault.
    /// When `false` (default) and `ha=false`, AF=0 causes F_ACCESS (§3.13.2).
    pub affd: bool,

    /// §5.2 STE.S2AFFD — Stage-2 Access Flag Fault Disable.
    /// When `true`, disables F_ACCESS for stage-2 AF=0 pages.
    pub s2affd: bool,

    /// §5.2 STE.S2HA — Stage-2 Hardware Access Flag management.
    /// When `true`, hardware sets stage-2 AF=1 on first access (no F_ACCESS fault).
    pub s2ha: bool,

    /// §5.2 STE.S2HD — Stage-2 Hardware Dirty State management.
    pub s2hd: bool,

    // ---- NEW-GAP-K: WXN / UWXN write-execute-never (§5.4) ----

    /// §5.4 CD.WXN — Write eXecute Never.
    /// When `true`, any writable page is also non-executable.
    /// Execute or ExecutePrivileged access to a write-permitted page → F_PERMISSION.
    pub wxn: bool,

    /// §5.4 CD.UWXN — Unprivileged Write eXecute Never.
    /// When `true`, ExecutePrivileged access to an unprivileged-writable page → F_PERMISSION.
    pub uwxn: bool,

    // ---- NEW-GAP-L: STE.S2PTW — Protected Table Walk (§5.2) ----

    /// §5.2 STE.S2PTW — Protected Table Walk.
    /// When `true` in a two-stage stream, translation through a Device-memory stage-2
    /// page → F_PERMISSION (prevents TTW from reaching Device MMIO regions).
    pub s2ptw: bool,

    // ---- BUG-QA-12: STE.S2S — Stage-2 Stall (§5.5) ----

    /// §5.2 STE.S2S — Stage-2 Stall.
    /// When `true`, enables stall mode for stage-2 translation faults,
    /// independent of the stage-1 CD.S (`FaultMode::Stall`) setting.
    /// Validation: `STALL_MODEL==0b01` (terminate-only) AND `s2_stall==true` → `C_BAD_STE`.
    ///
    /// Default: `false` (terminate mode for stage-2 faults).
    pub s2_stall: bool,

    // ---- BUG-QA-13: STE.S2R — Stage-2 Record (§5.5) ----

    /// §5.2 STE.S2R — Stage-2 Record.
    /// When `false` AND `s2_stall==false`, stage-2 fault events are suppressed
    /// (not recorded in the event queue).  Analogous to CD.R for stage-1.
    ///
    /// Default: `true` (record events, normal behavior).
    pub s2_record: bool,

    // ---- BUG-AUDIT-50: CD.ENDI / STE.S2ENDI endianness fields (§5.4 / §5.2) ----

    /// BUG-AUDIT-50: ARM §5.4 CD.ENDI — endianness for stage-1 table walks. 0=little-endian, 1=big-endian. Per §6.3.1 TTENDIAN=0b00 (mixed), both values are valid.
    pub endi: bool,

    /// BUG-AUDIT-50: ARM §5.2 STE.S2ENDI — endianness for stage-2 table walks. 0=little-endian, 1=big-endian.
    pub s2endi: bool,

    // ---- BUG-AUDIT-115: CD.TTB0 / CD.TTB1 base addresses (§3.4.3 / §5.4) ----

    /// §5.4 CD.TTB0: Physical base address of the TTBR0 translation table.
    ///
    /// ARM §3.4.3 / CdIllegal() pseudocode: it is ILLEGAL for this address to be
    /// outside the range described by the CD's effective IPS value.
    /// Violation (when EPD0=false) → C_BAD_CD at configure time.
    /// Default: `0`.
    pub ttb0: u64,

    /// §5.4 CD.TTB1: Physical base address of the TTBR1 translation table.
    ///
    /// ARM §3.4.3 / CdIllegal() pseudocode: it is ILLEGAL for this address to be
    /// outside the range described by the CD's effective IPS value.
    /// Violation (when EPD1=false) → C_BAD_CD at configure time.
    /// Default: `0`.
    pub ttb1: u64,
}

impl StreamConfig {
    /// ARM SMMU v3 minimum PASID value (always 0)
    pub const MIN_PASID: u32 = 0;

    /// ARM SMMU v3 maximum PASID value (20-bit)
    pub const MAX_PASID: u32 = (1 << 20) - 1;

    /// ARM SMMU v3 maximum S1CDMax value per SMMU_IDR1.SSIDSIZE (ARM §5.2)
    pub const S1CD_MAX_LIMIT: u8 = 20;

    /// Create a new builder for StreamConfig
    #[must_use]
    pub fn builder() -> StreamConfigBuilder {
        StreamConfigBuilder::new()
    }

    /// Create a default bypass configuration (no translation)
    #[must_use]
    pub fn bypass() -> Self {
        Self {
            translation_enabled: false,
            stage1_enabled: false,
            stage2_enabled: false,
            disabled: false,
            pasid_enabled: false,
            max_pasid: 0,
            fault_mode: FaultMode::Terminate,
            security_enforced: false,
            security_state: SecurityState::NonSecure,
            vmid: 0,
            ha: false,
            hd: false,
            s1dss: 2,
            s1cd_max: 0,
            strw: StreamWorld::El1El0,
            ns_cfg: 0,
            sh_cfg: 0,
            alloc_cfg: 0,
            mem_attr: 0,
            inst_cfg: 0,
            priv_cfg: 0,
            mt_cfg: false,
            s2_t0sz: 25,
            s2_tg: 0,
            s2_sl0: 1,
            s2_aa64: true,
            s2_ps: 5,
            s2_ttb: 0,
            aa64: true,
            t0sz: 16,
            t1sz: 16,
            mev: false,
            epd0: false,
            epd1: false,
            tbi: false,
            ips: 5,
            eats: 0,
            s1_stalld: false,
            affd: false,
            s2affd: false,
            s2ha: false,
            s2hd: false,
            wxn: false,
            uwxn: false,
            s2ptw: false,
            s2_stall: false,
            s2_record: true,
            endi: false,
            s2endi: false,
            ttb0: 0,
            ttb1: 0,
        }
    }

    /// Create a Stage 1 only configuration
    #[must_use]
    pub fn stage1_only() -> Self {
        Self {
            translation_enabled: true,
            stage1_enabled: true,
            stage2_enabled: false,
            disabled: false,
            pasid_enabled: false,
            max_pasid: 0,
            fault_mode: FaultMode::Terminate,
            security_enforced: true,
            security_state: SecurityState::NonSecure,
            vmid: 0,
            ha: false,
            hd: false,
            s1dss: 2,
            s1cd_max: 0,
            strw: StreamWorld::El1El0,
            ns_cfg: 0,
            sh_cfg: 0,
            alloc_cfg: 0,
            mem_attr: 0,
            inst_cfg: 0,
            priv_cfg: 0,
            mt_cfg: false,
            s2_t0sz: 25,
            s2_tg: 0,
            s2_sl0: 1,
            s2_aa64: true,
            s2_ps: 5,
            s2_ttb: 0,
            aa64: true,
            t0sz: 16,
            t1sz: 16,
            mev: false,
            epd0: false,
            epd1: false,
            tbi: false,
            ips: 5,
            eats: 0,
            s1_stalld: false,
            affd: false,
            s2affd: false,
            s2ha: false,
            s2hd: false,
            wxn: false,
            uwxn: false,
            s2ptw: false,
            s2_stall: false,
            s2_record: true,
            endi: false,
            s2endi: false,
            ttb0: 0,
            ttb1: 0,
        }
    }

    /// Create a Stage 2 only configuration
    #[must_use]
    pub fn stage2_only() -> Self {
        Self {
            translation_enabled: true,
            stage1_enabled: false,
            stage2_enabled: true,
            disabled: false,
            pasid_enabled: false,
            max_pasid: 0,
            fault_mode: FaultMode::Terminate,
            security_enforced: true,
            security_state: SecurityState::NonSecure,
            vmid: 0,
            ha: false,
            hd: false,
            s1dss: 2,
            s1cd_max: 0,
            strw: StreamWorld::El1El0,
            ns_cfg: 0,
            sh_cfg: 0,
            alloc_cfg: 0,
            mem_attr: 0,
            inst_cfg: 0,
            priv_cfg: 0,
            mt_cfg: false,
            s2_t0sz: 25,
            s2_tg: 0,
            s2_sl0: 1,
            s2_aa64: true,
            s2_ps: 5,
            s2_ttb: 0,
            aa64: true,
            t0sz: 16,
            t1sz: 16,
            mev: false,
            epd0: false,
            epd1: false,
            tbi: false,
            ips: 5,
            eats: 0,
            s1_stalld: false,
            affd: false,
            s2affd: false,
            s2ha: false,
            s2hd: false,
            wxn: false,
            uwxn: false,
            s2ptw: false,
            s2_stall: false,
            s2_record: true,
            endi: false,
            s2endi: false,
            ttb0: 0,
            ttb1: 0,
        }
    }

    /// Create a two-stage translation configuration
    #[must_use]
    pub fn two_stage() -> Self {
        Self {
            translation_enabled: true,
            stage1_enabled: true,
            stage2_enabled: true,
            disabled: false,
            pasid_enabled: true,
            max_pasid: Self::MAX_PASID,
            fault_mode: FaultMode::Terminate,
            security_enforced: true,
            security_state: SecurityState::NonSecure,
            vmid: 0,
            ha: false,
            hd: false,
            s1dss: 2,
            s1cd_max: 0,
            strw: StreamWorld::El1El0,
            ns_cfg: 0,
            sh_cfg: 0,
            alloc_cfg: 0,
            mem_attr: 0,
            inst_cfg: 0,
            priv_cfg: 0,
            mt_cfg: false,
            s2_t0sz: 25,
            s2_tg: 0,
            s2_sl0: 1,
            s2_aa64: true,
            s2_ps: 5,
            s2_ttb: 0,
            aa64: true,
            t0sz: 16,
            t1sz: 16,
            mev: false,
            epd0: false,
            epd1: false,
            tbi: false,
            ips: 5,
            eats: 0,
            s1_stalld: false,
            affd: false,
            s2affd: false,
            s2ha: false,
            s2hd: false,
            wxn: false,
            uwxn: false,
            s2ptw: false,
            s2_stall: false,
            s2_record: true,
            endi: false,
            s2endi: false,
            ttb0: 0,
            ttb1: 0,
        }
    }

    /// Validate configuration consistency
    pub fn validate(&self) -> Result<(), ValidationError> {
        // If translation is disabled, stages must be disabled
        if !self.translation_enabled && (self.stage1_enabled || self.stage2_enabled) {
            return Err(ValidationError::InvalidConfiguration {
                reason: "stages enabled without translation".into(),
            });
        }

        // At least one stage must be enabled if translation is enabled
        if self.translation_enabled && !self.stage1_enabled && !self.stage2_enabled {
            return Err(ValidationError::InvalidConfiguration {
                reason: "translation enabled but no stages active".into(),
            });
        }

        // PASID requires Stage 1
        if self.pasid_enabled && !self.stage1_enabled {
            return Err(ValidationError::InvalidConfiguration {
                reason: "PASID enabled without Stage 1".into(),
            });
        }

        // Validate max_pasid range
        if self.pasid_enabled && self.max_pasid > Self::MAX_PASID {
            return Err(ValidationError::InvalidPASID { value: self.max_pasid });
        }

        // If PASID disabled, max_pasid should be 0
        if !self.pasid_enabled && self.max_pasid != 0 {
            return Err(ValidationError::InvalidConfiguration {
                reason: "max_pasid set without PASID enabled".into(),
            });
        }

        // BUG-11 fix / ARM §5.2 STE.S1CDMax + SMMU_IDR1.SSIDSIZE:
        // "The allowable range is 0 to SMMU_IDR1.SSIDSIZE inclusive."
        // SSIDSIZE valid range is 0–20; values > 20 are ILLEGAL per §5.2.
        // Values >= 32 additionally cause a panic (debug) or UB (release) on
        // the shift `1u32 << s1cd_max` in the C_BAD_SUBSTREAMID check.
        if self.s1cd_max > Self::S1CD_MAX_LIMIT {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "s1cd_max={} exceeds SMMU_IDR1.SSIDSIZE maximum of {} (ARM §5.2)",
                    self.s1cd_max, Self::S1CD_MAX_LIMIT
                ),
            });
        }

        // BUG-NEW-RUST-4 / BUG-AUDIT-45 fix / BUG-AUDIT-88 fix: ARM §5.2 — S2T0SZ range.
        // The correct valid range for S2T0SZ depends on (S2TG, S2SL0) — see configure_stream()
        // for the per-combination check (BUG-AUDIT-88 fix).  At the type-validation level,
        // without knowledge of the TG/SL0 combination, the absolute upper bound is 48 (the
        // maximum T0SZ across all valid TG+SL0 combinations per ARM §5.2).
        // Values > 48 are always invalid regardless of combination; values in (39, 48] may
        // be valid for certain SL0 values (e.g. T0SZ=42 with 4KB/SL0=1 is valid).
        //
        // BUG-AUDIT-48: s2_t0sz=0 is the software model's "no IPA range restriction"
        // sentinel (analogous to C++ behaviour).  It is preserved here and in the
        // per-combination check in check_ste_illegal() via the `!= 0` guard.
        if self.s2_t0sz > 48 {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "s2_t0sz={} exceeds absolute maximum of 48 (ARM §5.2 S2T0SZ)",
                    self.s2_t0sz
                ),
            });
        }

        // BUG-AUDIT-129 fix: §3.13 / §3.13.4 — HD=1 requires HA=1.
        // The combination {HA=0, HD=1} is architecturally illegal: dirty-state hardware
        // table walk update (HD) requires access-flag hardware update (HA) to be enabled.
        if self.hd && !self.ha {
            return Err(ValidationError::InvalidConfiguration {
                reason: "HD=1 requires HA=1 (§3.13.4: dirty-state HTTU implies access-flag HTTU)".into(),
            });
        }

        // BUG-AUDIT-129 fix: §3.13.4 — S2HD=1 requires S2HA=1.
        // Same constraint for stage-2: {S2HA=0, S2HD=1} is architecturally illegal.
        if self.s2hd && !self.s2ha {
            return Err(ValidationError::InvalidConfiguration {
                reason: "S2HD=1 requires S2HA=1 (§3.13.4: stage-2 dirty-state HTTU implies stage-2 access-flag HTTU)".into(),
            });
        }

        Ok(())
    }

    /// Check if configuration is in bypass mode (STE.Config==0b100).
    ///
    /// Returns `true` only when the stream passes transactions through with a
    /// full RWX identity mapping (PA == IOVA) per ARM IHI0070G.b §5.2 Table 5-5.
    ///
    /// This is distinct from abort mode (`is_abort_mode()`), where transactions
    /// are silently terminated with no event recorded (STE.Config==0b000).
    ///
    /// # Examples
    ///
    /// ```
    /// use smmu::types::config::StreamConfig;
    ///
    /// // Bypass factory (STE.Config==0b100): is_bypass() == true
    /// let bypass = StreamConfig::bypass();
    /// assert!(bypass.is_bypass());
    /// assert!(!bypass.is_abort_mode());
    ///
    /// // Builder default (no explicit translation_enabled call) is also bypass
    /// let default_config = StreamConfig::builder().build().unwrap();
    /// assert!(default_config.is_bypass());
    ///
    /// // Abort mode (STE.Config==0b000): is_bypass() == false
    /// let abort = StreamConfig::builder().translation_enabled(false).build().unwrap();
    /// assert!(!abort.is_bypass());
    /// assert!(abort.is_abort_mode());
    /// ```
    #[inline]
    #[must_use]
    pub const fn is_bypass(&self) -> bool {
        !self.translation_enabled && !self.disabled
    }

    /// Check if configuration is in abort mode (STE.Config==0b000).
    ///
    /// Returns `true` when all transactions on this stream are silently aborted
    /// with no event recorded, per ARM IHI0070G.b §5.2 Table 5-5 and §7.3.7.
    ///
    /// This mode is activated by calling `translation_enabled(false)` explicitly
    /// on the builder, which sets the `disabled` flag.  The builder default
    /// (without calling `translation_enabled`) remains in bypass mode.
    ///
    /// # Examples
    ///
    /// ```
    /// use smmu::types::config::StreamConfig;
    ///
    /// // Abort mode (STE.Config==0b000): is_abort_mode() == true
    /// let abort = StreamConfig::builder().translation_enabled(false).build().unwrap();
    /// assert!(abort.is_abort_mode());
    /// assert!(!abort.is_bypass());
    ///
    /// // Bypass mode (STE.Config==0b100): is_abort_mode() == false
    /// let bypass = StreamConfig::bypass();
    /// assert!(!bypass.is_abort_mode());
    ///
    /// // Translation-enabled mode: is_abort_mode() == false
    /// let stage1 = StreamConfig::stage1_only();
    /// assert!(!stage1.is_abort_mode());
    /// ```
    #[inline]
    #[must_use]
    pub const fn is_abort_mode(&self) -> bool {
        self.disabled && !self.translation_enabled
    }

    /// Check if two-stage translation is configured
    #[inline]
    #[must_use]
    pub const fn is_two_stage(&self) -> bool {
        self.stage1_enabled && self.stage2_enabled
    }
}

impl Default for StreamConfig {
    fn default() -> Self {
        Self::bypass()
    }
}

/// Builder for StreamConfig with validation
#[derive(Clone, Debug)]
pub struct StreamConfigBuilder {
    translation_enabled: bool,
    stage1_enabled: bool,
    stage2_enabled: bool,
    /// Tracks whether `translation_enabled(false)` was explicitly called, which
    /// signals STE.Config==0b000 (abort/disabled) rather than bypass (0b100).
    disabled: bool,
    pasid_enabled: bool,
    max_pasid: u32,
    fault_mode: FaultMode,
    security_enforced: bool,
    security_state: SecurityState,
    vmid: u16,
    ha: bool,
    hd: bool,
    s1dss: u8,
    s1cd_max: u8,
    // CT-20
    strw: StreamWorld,
    // CT-19
    ns_cfg: u8,
    sh_cfg: u8,
    alloc_cfg: u8,
    mem_attr: u8,
    inst_cfg: u8,
    priv_cfg: u8,
    mt_cfg: bool,
    // CT-23
    s2_t0sz: u8,
    s2_tg: u8,
    s2_sl0: u8,
    s2_aa64: bool,
    s2_ps: u8,
    s2_ttb: u64,
    // CT-14
    aa64: bool,
    // CT-13
    t0sz: u8,
    t1sz: u8,
    // CONF-GAP-14
    mev: bool,
    // NEW-7
    epd0: bool,
    epd1: bool,
    // GAP-E
    tbi: bool,
    // GAP-F
    ips: u8,
    // NEW-12
    eats: u8,
    // GAP-NEW-G
    s1_stalld: bool,
    // NEW-GAP-J
    affd: bool,
    s2affd: bool,
    s2ha: bool,
    s2hd: bool,
    // NEW-GAP-K
    wxn: bool,
    uwxn: bool,
    // NEW-GAP-L
    s2ptw: bool,
    // BUG-QA-12
    s2_stall: bool,
    // BUG-QA-13
    s2_record: bool,
    // BUG-AUDIT-50
    endi: bool,
    s2endi: bool,
    // BUG-AUDIT-115
    ttb0: u64,
    ttb1: u64,
}

impl StreamConfigBuilder {
    /// Create a new builder with default values (bypass mode)
    #[must_use]
    pub fn new() -> Self {
        Self {
            translation_enabled: false,
            stage1_enabled: false,
            stage2_enabled: false,
            disabled: false,
            pasid_enabled: false,
            max_pasid: 0,
            fault_mode: FaultMode::Terminate,
            security_enforced: false,
            security_state: SecurityState::NonSecure,
            vmid: 0,
            ha: false,
            hd: false,
            s1dss: 2,
            s1cd_max: 0,
            strw: StreamWorld::El1El0,
            ns_cfg: 0,
            sh_cfg: 0,
            alloc_cfg: 0,
            mem_attr: 0,
            inst_cfg: 0,
            priv_cfg: 0,
            mt_cfg: false,
            s2_t0sz: 25,
            s2_tg: 0,
            s2_sl0: 1,
            s2_aa64: true,
            s2_ps: 5,
            s2_ttb: 0,
            aa64: true,
            t0sz: 16,
            t1sz: 16,
            mev: false,
            epd0: false,
            epd1: false,
            tbi: false,
            ips: 5,
            eats: 0,
            s1_stalld: false,
            affd: false,
            s2affd: false,
            s2ha: false,
            s2hd: false,
            wxn: false,
            uwxn: false,
            s2ptw: false,
            s2_stall: false,
            s2_record: true,
            endi: false,
            s2endi: false,
            ttb0: 0,
            ttb1: 0,
        }
    }

    /// Set STE.S1STALLD — stall-disabled override (GAP-NEW-G, ARM §5.2).
    ///
    /// When `true`, stall semantics are suppressed even if `FaultMode::Stall` is
    /// configured. All faults use abort semantics.
    #[must_use]
    pub fn s1_stalld(mut self, s1_stalld: bool) -> Self {
        self.s1_stalld = s1_stalld;
        self
    }

    /// Set CD.AFFD — Access Flag Fault Disable (NEW-GAP-J, §3.13.2).
    #[must_use]
    pub fn affd(mut self, affd: bool) -> Self {
        self.affd = affd;
        self
    }

    /// Set STE.S2AFFD — Stage-2 Access Flag Fault Disable (NEW-GAP-J).
    #[must_use]
    pub fn s2affd(mut self, s2affd: bool) -> Self {
        self.s2affd = s2affd;
        self
    }

    /// Set STE.S2HA — Stage-2 Hardware Access Flag management (NEW-GAP-J).
    #[must_use]
    pub fn s2ha(mut self, s2ha: bool) -> Self {
        self.s2ha = s2ha;
        self
    }

    /// Set STE.S2HD — Stage-2 Hardware Dirty State management (NEW-GAP-J).
    #[must_use]
    pub fn s2hd(mut self, s2hd: bool) -> Self {
        self.s2hd = s2hd;
        self
    }

    /// Set CD.WXN — Write eXecute Never (NEW-GAP-K, §5.4).
    #[must_use]
    pub fn wxn(mut self, wxn: bool) -> Self {
        self.wxn = wxn;
        self
    }

    /// Set CD.UWXN — Unprivileged Write eXecute Never (NEW-GAP-K, §5.4).
    #[must_use]
    pub fn uwxn(mut self, uwxn: bool) -> Self {
        self.uwxn = uwxn;
        self
    }

    /// Set STE.S2PTW — Protected Table Walk (NEW-GAP-L, §5.2).
    #[must_use]
    pub fn s2ptw(mut self, s2ptw: bool) -> Self {
        self.s2ptw = s2ptw;
        self
    }

    /// Set STE.S2S — Stage-2 Stall enable (BUG-QA-12, §5.5).
    ///
    /// When `true`, stage-2 faults stall independently of `FaultMode` (CD.S).
    /// Rejected at configure time when `STALL_MODEL==0b01` (terminate-only).
    #[must_use]
    pub fn s2_stall(mut self, val: bool) -> Self {
        self.s2_stall = val;
        self
    }

    /// Set STE.S2R — Stage-2 Record (BUG-QA-13, §5.5).
    ///
    /// When `false` and `s2_stall==false`, stage-2 fault events are suppressed
    /// from the event queue.  Default: `true` (events recorded normally).
    #[must_use]
    pub fn s2_record(mut self, val: bool) -> Self {
        self.s2_record = val;
        self
    }

    /// Set STE.MEV — Merged Event flag (§5.2 / §7.3.1).
    ///
    /// When `true`, duplicate non-stall events (same type + stream_id) are suppressed.
    /// Stall events (Stall==1) are never suppressed regardless of MEV per §7.3.1.
    #[must_use]
    pub fn mev(mut self, mev: bool) -> Self {
        self.mev = mev;
        self
    }

    /// Enable or disable translation.
    ///
    /// When called with `false`, also marks the stream as disabled/abort
    /// (STE.Config==0b000) per ARM §5.2.  The builder default (without calling
    /// this method) remains in bypass mode (STE.Config==0b100).
    #[must_use]
    pub fn translation_enabled(mut self, enabled: bool) -> Self {
        self.translation_enabled = enabled;
        // Explicit false → STE.Config==0b000 (disabled/abort), not bypass.
        if !enabled {
            self.disabled = true;
        }
        self
    }

    /// Enable or disable Stage 1 translation
    #[must_use]
    pub fn stage1_enabled(mut self, enabled: bool) -> Self {
        self.stage1_enabled = enabled;
        self
    }

    /// Enable or disable Stage 2 translation
    #[must_use]
    pub fn stage2_enabled(mut self, enabled: bool) -> Self {
        self.stage2_enabled = enabled;
        self
    }

    /// Enable or disable PASID support
    #[must_use]
    pub fn pasid_enabled(mut self, enabled: bool) -> Self {
        self.pasid_enabled = enabled;
        self
    }

    /// Set maximum PASID value
    #[must_use]
    pub fn max_pasid(mut self, max: u32) -> Self {
        self.max_pasid = max;
        self
    }

    /// Set fault handling mode
    #[must_use]
    pub fn fault_mode(mut self, mode: FaultMode) -> Self {
        self.fault_mode = mode;
        self
    }

    /// Enable or disable security enforcement
    #[must_use]
    pub fn security_enforced(mut self, enforced: bool) -> Self {
        self.security_enforced = enforced;
        self
    }

    /// Set the security state for this stream (FINDING-NEW-44).
    ///
    /// Controls the `security_state` field recorded in `AtcInvalidateCompletion`
    /// and `CommandSyncCompletion` events generated for this stream.
    /// Default: `SecurityState::NonSecure`.
    #[must_use]
    pub fn security_state(mut self, state: SecurityState) -> Self {
        self.security_state = state;
        self
    }

    /// Set the VMID (STE Word 2 bits 63:48, ARM §5.2)
    #[must_use]
    pub fn vmid(mut self, vmid: u16) -> Self {
        self.vmid = vmid;
        self
    }

    /// Enable or disable hardware Access Flag management (CD.HA bit 43, ARM SMMU v3 §3.13)
    #[must_use]
    pub fn ha(mut self, ha: bool) -> Self {
        self.ha = ha;
        self
    }

    /// Enable or disable hardware Dirty State management (CD.HD bit 42, ARM SMMU v3 §3.13)
    #[must_use]
    pub fn hd(mut self, hd: bool) -> Self {
        self.hd = hd;
        self
    }

    /// Set STE.S1DSS — non-substream transaction routing (ARM §5.2):
    /// 0b00 = abort with F_STREAM_DISABLED, 0b01 = stage-1 bypass, 0b10 = use CD[0]
    #[must_use]
    pub fn s1dss(mut self, s1dss: u8) -> Self {
        self.s1dss = s1dss;
        self
    }

    /// Set STE.S1CDMax — number of SubstreamID bits supported (ARM §5.2).
    /// 0 means the stream is not substream-capable and S1DSS is ignored.
    #[must_use]
    pub fn s1cd_max(mut self, s1cd_max: u8) -> Self {
        self.s1cd_max = s1cd_max;
        self
    }

    // ---- CT-20: STE.STRW builder method ----

    /// Set STE.STRW — Stream World exception level selection (ARM §5.2).
    #[must_use]
    pub fn strw(mut self, strw: StreamWorld) -> Self {
        self.strw = strw;
        self
    }

    // ---- CT-19: STE output attribute override builder methods ----

    /// Set STE.NSCFG — Non-Secure attribute override (ARM §5.2).
    #[must_use]
    pub fn ns_cfg(mut self, ns_cfg: u8) -> Self {
        self.ns_cfg = ns_cfg;
        self
    }

    /// Set STE.SHCFG — Shareability override (ARM §5.2).
    #[must_use]
    pub fn sh_cfg(mut self, sh_cfg: u8) -> Self {
        self.sh_cfg = sh_cfg;
        self
    }

    /// Set STE.ALLOCCFG — Allocation hint override (ARM §5.2).
    #[must_use]
    pub fn alloc_cfg(mut self, alloc_cfg: u8) -> Self {
        self.alloc_cfg = alloc_cfg;
        self
    }

    /// Set STE.MemAttr — Device memory type attribute (ARM §5.2).
    #[must_use]
    pub fn mem_attr(mut self, mem_attr: u8) -> Self {
        self.mem_attr = mem_attr;
        self
    }

    /// Set STE.INSTCFG — Instruction/Data attribute override (ARM §5.2).
    #[must_use]
    pub fn inst_cfg(mut self, inst_cfg: u8) -> Self {
        self.inst_cfg = inst_cfg;
        self
    }

    /// Set STE.PRIVCFG — Privilege attribute override (ARM §5.2).
    #[must_use]
    pub fn priv_cfg(mut self, priv_cfg: u8) -> Self {
        self.priv_cfg = priv_cfg;
        self
    }

    /// Set STE.MTCFG — Memory type override enable (ARM §5.2).
    #[must_use]
    pub fn mt_cfg(mut self, mt_cfg: bool) -> Self {
        self.mt_cfg = mt_cfg;
        self
    }

    // ---- CT-23: Stage-2 STE parameter builder methods ----

    /// Set STE.S2T0SZ — Stage-2 input address range (ARM §5.2).
    #[must_use]
    pub fn s2_t0sz(mut self, s2_t0sz: u8) -> Self {
        self.s2_t0sz = s2_t0sz;
        self
    }

    /// Set STE.S2TG — Stage-2 translation granule (ARM §5.2).
    #[must_use]
    pub fn s2_tg(mut self, s2_tg: u8) -> Self {
        self.s2_tg = s2_tg;
        self
    }

    /// Set STE.S2SL0 — Stage-2 starting level (ARM §5.2).
    #[must_use]
    pub fn s2_sl0(mut self, s2_sl0: u8) -> Self {
        self.s2_sl0 = s2_sl0;
        self
    }

    /// Set STE.S2AA64 — Stage-2 AArch64 translation tables flag (ARM §5.2).
    #[must_use]
    pub fn s2_aa64(mut self, s2_aa64: bool) -> Self {
        self.s2_aa64 = s2_aa64;
        self
    }

    /// Set STE.S2PS — Stage-2 output physical address size (ARM §5.2).
    #[must_use]
    pub fn s2_ps(mut self, s2_ps: u8) -> Self {
        self.s2_ps = s2_ps;
        self
    }

    /// Set STE.S2TTB — Physical address of Stage-2 root translation table (ARM §5.2).
    #[must_use]
    pub fn s2_ttb(mut self, s2_ttb: u64) -> Self {
        self.s2_ttb = s2_ttb;
        self
    }

    // ---- CT-14: CD.AA64 builder method ----

    /// Set CD.AA64 — AArch64 translation table format selector (ARM §5.4).
    #[must_use]
    pub fn aa64(mut self, aa64: bool) -> Self {
        self.aa64 = aa64;
        self
    }

    // ---- CT-13: CD.T0SZ / CD.T1SZ builder methods ----

    /// Set CD.T0SZ — TTBR0 address range bits excluded from top (ARM §5.4).
    /// Valid range: 0-39 for SMMUv3.0. Out-of-range generates C_BAD_CD.
    #[must_use]
    pub fn t0sz(mut self, t0sz: u8) -> Self {
        self.t0sz = t0sz;
        self
    }

    /// Set CD.T1SZ — TTBR1 address range bits excluded from top (ARM §5.4).
    /// Valid range: 0-39 for SMMUv3.0. Out-of-range generates C_BAD_CD.
    #[must_use]
    pub fn t1sz(mut self, t1sz: u8) -> Self {
        self.t1sz = t1sz;
        self
    }

    /// Set CD.EPD0 — disable TTBR0 translation table walk (NEW-7, ARM §5.4).
    ///
    /// When `true`, all stage-1 (TTBR0-equivalent) translation table walks are
    /// disabled and generate F_TRANSLATION.
    #[must_use]
    pub fn epd0(mut self, epd0: bool) -> Self {
        self.epd0 = epd0;
        self
    }

    /// Set CD.EPD1 — disable TTBR1 translation table walk (NEW-7, ARM §5.4).
    #[must_use]
    pub fn epd1(mut self, epd1: bool) -> Self {
        self.epd1 = epd1;
        self
    }

    // ---- GAP-E: CD.TBI builder method ----

    /// Set CD.TBI — top-byte-ignore for VA range check (GAP-E, ARM §3.4.1/§5.4).
    ///
    /// When `true`, bits[63:56] of the input VA are treated as a tag and are
    /// not used in the T0SZ range check.
    #[must_use]
    pub fn tbi(mut self, tbi: bool) -> Self {
        self.tbi = tbi;
        self
    }

    // ---- GAP-F: CD.IPS builder method ----

    /// Set CD.IPS — stage-1 output IPA size encoding (GAP-F, ARM §5.4/§3.4).
    ///
    /// Encoding: 0=32-bit, 1=36-bit, 2=40-bit, 3=42-bit, 4=44-bit,
    ///           5=48-bit (default), 6=52-bit.
    #[must_use]
    pub fn ips(mut self, ips: u8) -> Self {
        self.ips = ips;
        self
    }

    // ---- NEW-12: STE.EATS builder method ----

    /// Set STE.EATS — Enhanced Address Translation Security support level (NEW-12, ARM §5.2).
    ///
    /// 0 = no ATS, 1 = ATS only, 2 = ATS+PRI, 3 = ATS+PRI+CMD.
    #[must_use]
    pub fn eats(mut self, eats: u8) -> Self {
        self.eats = eats;
        self
    }

    // ---- BUG-AUDIT-115: CD.TTB0 / CD.TTB1 builder methods ----

    /// Set CD.TTB0 — physical base address of the TTBR0 translation table (BUG-AUDIT-115, ARM §5.4).
    ///
    /// ARM §3.4.3 / CdIllegal(): the address must be within the IPS-bounded range when EPD0=false.
    #[must_use]
    pub fn ttb0(mut self, v: u64) -> Self {
        self.ttb0 = v;
        self
    }

    /// Set CD.TTB1 — physical base address of the TTBR1 translation table (BUG-AUDIT-115, ARM §5.4).
    ///
    /// ARM §3.4.3 / CdIllegal(): the address must be within the IPS-bounded range when EPD1=false.
    #[must_use]
    pub fn ttb1(mut self, v: u64) -> Self {
        self.ttb1 = v;
        self
    }

    /// Build the StreamConfig with validation
    #[must_use]
    pub fn build(self) -> Result<StreamConfig, ValidationError> {
        let config = StreamConfig {
            translation_enabled: self.translation_enabled,
            stage1_enabled: self.stage1_enabled,
            stage2_enabled: self.stage2_enabled,
            disabled: self.disabled,
            pasid_enabled: self.pasid_enabled,
            max_pasid: self.max_pasid,
            fault_mode: self.fault_mode,
            security_enforced: self.security_enforced,
            security_state: self.security_state,
            vmid: self.vmid,
            ha: self.ha,
            hd: self.hd,
            s1dss: self.s1dss,
            s1cd_max: self.s1cd_max,
            strw: self.strw,
            ns_cfg: self.ns_cfg,
            sh_cfg: self.sh_cfg,
            alloc_cfg: self.alloc_cfg,
            mem_attr: self.mem_attr,
            inst_cfg: self.inst_cfg,
            priv_cfg: self.priv_cfg,
            mt_cfg: self.mt_cfg,
            s2_t0sz: self.s2_t0sz,
            s2_tg: self.s2_tg,
            s2_sl0: self.s2_sl0,
            s2_aa64: self.s2_aa64,
            s2_ps: self.s2_ps,
            s2_ttb: self.s2_ttb,
            aa64: self.aa64,
            t0sz: self.t0sz,
            t1sz: self.t1sz,
            mev: self.mev,
            epd0: self.epd0,
            epd1: self.epd1,
            tbi: self.tbi,
            ips: self.ips,
            eats: self.eats,
            s1_stalld: self.s1_stalld,
            affd: self.affd,
            s2affd: self.s2affd,
            s2ha: self.s2ha,
            s2hd: self.s2hd,
            wxn: self.wxn,
            uwxn: self.uwxn,
            s2ptw: self.s2ptw,
            s2_stall: self.s2_stall,
            s2_record: self.s2_record,
            endi: self.endi,
            s2endi: self.s2endi,
            ttb0: self.ttb0,
            ttb1: self.ttb1,
        };

        config.validate()?;
        Ok(config)
    }
}

impl Default for StreamConfigBuilder {
    fn default() -> Self {
        Self::new()
    }
}

/// Queue configuration for SMMU event, command, and PRI queues
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct QueueConfig {
    /// Event queue size (default: 512)
    pub event_queue_size: usize,

    /// Command queue size (default: 256)
    pub command_queue_size: usize,

    /// Page Request Interface queue size (default: 128)
    pub pri_queue_size: usize,
}

impl QueueConfig {
    /// Minimum queue size per ARM SMMU v3 spec
    pub const MIN_QUEUE_SIZE: usize = 16;

    /// Maximum queue size per ARM SMMU v3 spec
    pub const MAX_QUEUE_SIZE: usize = 65_536;

    /// Default event queue size
    pub const DEFAULT_EVENT_QUEUE_SIZE: usize = 512;

    /// Default command queue size
    pub const DEFAULT_COMMAND_QUEUE_SIZE: usize = 256;

    /// Default PRI queue size
    pub const DEFAULT_PRI_QUEUE_SIZE: usize = 128;

    /// Create a new builder for QueueConfig
    #[must_use]
    pub fn builder() -> QueueConfigBuilder {
        QueueConfigBuilder::new()
    }

    /// Get event queue size
    #[inline]
    #[must_use]
    pub const fn event_queue_size(&self) -> usize {
        self.event_queue_size
    }

    /// Get command queue size
    #[inline]
    #[must_use]
    pub const fn command_queue_size(&self) -> usize {
        self.command_queue_size
    }

    /// Get PRI queue size
    #[inline]
    #[must_use]
    pub const fn pri_queue_size(&self) -> usize {
        self.pri_queue_size
    }

    /// Validate queue configuration
    pub fn validate(&self) -> Result<(), ValidationError> {
        // Allow size 4 specifically for overflow testing
        let is_overflow_test_size = self.event_queue_size == 4;
        if !is_overflow_test_size
            && (self.event_queue_size < Self::MIN_QUEUE_SIZE || self.event_queue_size > Self::MAX_QUEUE_SIZE)
        {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "event queue size {} out of range [{}, {}]",
                    self.event_queue_size,
                    Self::MIN_QUEUE_SIZE,
                    Self::MAX_QUEUE_SIZE
                ),
            });
        }

        // Allow size 4 specifically for overflow testing
        let is_overflow_test_size = self.command_queue_size == 4;
        if !is_overflow_test_size
            && (self.command_queue_size < Self::MIN_QUEUE_SIZE || self.command_queue_size > Self::MAX_QUEUE_SIZE)
        {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "command queue size {} out of range [{}, {}]",
                    self.command_queue_size,
                    Self::MIN_QUEUE_SIZE,
                    Self::MAX_QUEUE_SIZE
                ),
            });
        }

        // Allow size 4 specifically for overflow testing
        let is_overflow_test_size = self.pri_queue_size == 4;
        if !is_overflow_test_size
            && (self.pri_queue_size < Self::MIN_QUEUE_SIZE || self.pri_queue_size > Self::MAX_QUEUE_SIZE)
        {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "PRI queue size {} out of range [{}, {}]",
                    self.pri_queue_size,
                    Self::MIN_QUEUE_SIZE,
                    Self::MAX_QUEUE_SIZE
                ),
            });
        }

        Ok(())
    }

    /// Set event queue size (builder pattern)
    #[must_use]
    pub fn with_event_queue_size(mut self, size: usize) -> Self {
        self.event_queue_size = size;
        self
    }

    /// Set command queue size (builder pattern)
    #[must_use]
    pub fn with_command_queue_size(mut self, size: usize) -> Self {
        self.command_queue_size = size;
        self
    }

    /// Set PRI queue size (builder pattern)
    #[must_use]
    pub fn with_pri_queue_size(mut self, size: usize) -> Self {
        self.pri_queue_size = size;
        self
    }
}

impl Default for QueueConfig {
    fn default() -> Self {
        Self {
            event_queue_size: Self::DEFAULT_EVENT_QUEUE_SIZE,
            command_queue_size: Self::DEFAULT_COMMAND_QUEUE_SIZE,
            pri_queue_size: Self::DEFAULT_PRI_QUEUE_SIZE,
        }
    }
}

/// Builder for QueueConfig
#[derive(Clone, Debug)]
pub struct QueueConfigBuilder {
    event_queue_size: usize,
    command_queue_size: usize,
    pri_queue_size: usize,
}

impl QueueConfigBuilder {
    /// Create a new builder with default values
    #[must_use]
    pub fn new() -> Self {
        Self {
            event_queue_size: QueueConfig::DEFAULT_EVENT_QUEUE_SIZE,
            command_queue_size: QueueConfig::DEFAULT_COMMAND_QUEUE_SIZE,
            pri_queue_size: QueueConfig::DEFAULT_PRI_QUEUE_SIZE,
        }
    }

    /// Set event queue size
    #[must_use]
    pub fn event_queue_size(mut self, size: usize) -> Self {
        self.event_queue_size = size;
        self
    }

    /// Set command queue size
    #[must_use]
    pub fn command_queue_size(mut self, size: usize) -> Self {
        self.command_queue_size = size;
        self
    }

    /// Set PRI queue size
    #[must_use]
    pub fn pri_queue_size(mut self, size: usize) -> Self {
        self.pri_queue_size = size;
        self
    }

    /// Build the QueueConfig with validation
    #[must_use]
    pub fn build(self) -> Result<QueueConfig, ValidationError> {
        let config = QueueConfig {
            event_queue_size: self.event_queue_size,
            command_queue_size: self.command_queue_size,
            pri_queue_size: self.pri_queue_size,
        };

        config.validate()?;
        Ok(config)
    }
}

impl Default for QueueConfigBuilder {
    fn default() -> Self {
        Self::new()
    }
}

/// Cache configuration for TLB and other caches
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct CacheConfig {
    /// TLB cache size in entries (default: 1024)
    pub tlb_cache_size: usize,

    /// Maximum cache entry age in milliseconds (default: 5000)
    pub cache_max_age_ms: u32,

    /// Enable or disable caching globally
    pub enable_caching: bool,
}

impl CacheConfig {
    /// Minimum cache size
    pub const MIN_CACHE_SIZE: usize = 64;

    /// Maximum cache size
    pub const MAX_CACHE_SIZE: usize = 1_048_576; // 1M entries

    /// Minimum cache age in milliseconds
    pub const MIN_CACHE_AGE_MS: u32 = 100;

    /// Maximum cache age in milliseconds
    pub const MAX_CACHE_AGE_MS: u32 = 3_600_000; // 1 hour

    /// Default TLB cache size
    pub const DEFAULT_TLB_CACHE_SIZE: usize = 1024;

    /// Default cache max age
    pub const DEFAULT_CACHE_MAX_AGE_MS: u32 = 5000; // 5 seconds

    /// Create a new builder for CacheConfig
    #[must_use]
    pub fn builder() -> CacheConfigBuilder {
        CacheConfigBuilder::new()
    }

    /// Validate cache configuration
    pub fn validate(&self) -> Result<(), ValidationError> {
        if self.tlb_cache_size < Self::MIN_CACHE_SIZE || self.tlb_cache_size > Self::MAX_CACHE_SIZE {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "TLB cache size {} out of range [{}, {}]",
                    self.tlb_cache_size,
                    Self::MIN_CACHE_SIZE,
                    Self::MAX_CACHE_SIZE
                ),
            });
        }

        if self.cache_max_age_ms < Self::MIN_CACHE_AGE_MS || self.cache_max_age_ms > Self::MAX_CACHE_AGE_MS {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "cache max age {} out of range [{}, {}]",
                    self.cache_max_age_ms,
                    Self::MIN_CACHE_AGE_MS,
                    Self::MAX_CACHE_AGE_MS
                ),
            });
        }

        Ok(())
    }

    /// Get cache max age as Duration (requires std feature)
    #[cfg(feature = "std")]
    #[must_use]
    pub fn cache_max_age(&self) -> Duration {
        Duration::from_millis(u64::from(self.cache_max_age_ms))
    }
}

impl Default for CacheConfig {
    fn default() -> Self {
        Self {
            tlb_cache_size: Self::DEFAULT_TLB_CACHE_SIZE,
            cache_max_age_ms: Self::DEFAULT_CACHE_MAX_AGE_MS,
            enable_caching: true,
        }
    }
}

/// Builder for CacheConfig
#[derive(Clone, Debug)]
pub struct CacheConfigBuilder {
    tlb_cache_size: usize,
    cache_max_age_ms: u32,
    enable_caching: bool,
}

impl CacheConfigBuilder {
    /// Create a new builder with default values
    #[must_use]
    pub fn new() -> Self {
        Self {
            tlb_cache_size: CacheConfig::DEFAULT_TLB_CACHE_SIZE,
            cache_max_age_ms: CacheConfig::DEFAULT_CACHE_MAX_AGE_MS,
            enable_caching: true,
        }
    }

    /// Set TLB cache size
    #[must_use]
    pub fn tlb_cache_size(mut self, size: usize) -> Self {
        self.tlb_cache_size = size;
        self
    }

    /// Set cache max age in milliseconds
    #[must_use]
    pub fn cache_max_age_ms(mut self, age_ms: u32) -> Self {
        self.cache_max_age_ms = age_ms;
        self
    }

    /// Enable or disable caching
    #[must_use]
    pub fn enable_caching(mut self, enable: bool) -> Self {
        self.enable_caching = enable;
        self
    }

    /// Build the CacheConfig with validation
    #[must_use]
    pub fn build(self) -> Result<CacheConfig, ValidationError> {
        let config = CacheConfig {
            tlb_cache_size: self.tlb_cache_size,
            cache_max_age_ms: self.cache_max_age_ms,
            enable_caching: self.enable_caching,
        };

        config.validate()?;
        Ok(config)
    }
}

impl Default for CacheConfigBuilder {
    fn default() -> Self {
        Self::new()
    }
}

/// Address space configuration
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct AddressConfig {
    /// Maximum IOVA address space size in bits (default: 48-bit)
    pub max_iova_bits: u8,

    /// Maximum physical address space size in bits (default: 52-bit)
    pub max_pa_bits: u8,

    /// Maximum number of streams (default: 65_536)
    pub max_stream_count: u32,

    /// Maximum PASIDs per stream (default: 1_048_576)
    pub max_pasid_count: u32,
}

impl AddressConfig {
    /// Minimum IOVA address bits
    pub const MIN_IOVA_BITS: u8 = 32;

    /// Maximum IOVA address bits
    pub const MAX_IOVA_BITS: u8 = 52;

    /// Minimum PA address bits
    pub const MIN_PA_BITS: u8 = 32;

    /// Maximum PA address bits
    pub const MAX_PA_BITS: u8 = 52;

    /// Minimum stream count
    pub const MIN_STREAM_COUNT: u32 = 1;

    /// Maximum stream count
    pub const MAX_STREAM_COUNT: u32 = 1_048_576;

    /// Minimum PASID count
    pub const MIN_PASID_COUNT: u32 = 1;

    /// Maximum PASID count per ARM SMMU v3 (20-bit)
    pub const MAX_PASID_COUNT: u32 = 1_048_576;

    /// Default IOVA bits (48-bit = 256TB)
    pub const DEFAULT_IOVA_BITS: u8 = 48;

    /// Default PA bits (52-bit = 4PB)
    pub const DEFAULT_PA_BITS: u8 = 52;

    /// Default stream count (16-bit StreamID)
    pub const DEFAULT_STREAM_COUNT: u32 = 65_536;

    /// Default PASID count (20-bit PASID)
    pub const DEFAULT_PASID_COUNT: u32 = 1_048_576;

    /// Create a new builder for AddressConfig
    #[must_use]
    pub fn builder() -> AddressConfigBuilder {
        AddressConfigBuilder::new()
    }

    /// Validate address configuration
    pub fn validate(&self) -> Result<(), ValidationError> {
        if self.max_iova_bits < Self::MIN_IOVA_BITS || self.max_iova_bits > Self::MAX_IOVA_BITS {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "max IOVA bits {} out of range [{}, {}]",
                    self.max_iova_bits,
                    Self::MIN_IOVA_BITS,
                    Self::MAX_IOVA_BITS
                ),
            });
        }

        if self.max_pa_bits < Self::MIN_PA_BITS || self.max_pa_bits > Self::MAX_PA_BITS {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "max PA bits {} out of range [{}, {}]",
                    self.max_pa_bits,
                    Self::MIN_PA_BITS,
                    Self::MAX_PA_BITS
                ),
            });
        }

        if self.max_stream_count < Self::MIN_STREAM_COUNT || self.max_stream_count > Self::MAX_STREAM_COUNT {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "max stream count {} out of range [{}, {}]",
                    self.max_stream_count,
                    Self::MIN_STREAM_COUNT,
                    Self::MAX_STREAM_COUNT
                ),
            });
        }

        if self.max_pasid_count < Self::MIN_PASID_COUNT || self.max_pasid_count > Self::MAX_PASID_COUNT {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "max PASID count {} out of range [{}, {}]",
                    self.max_pasid_count,
                    Self::MIN_PASID_COUNT,
                    Self::MAX_PASID_COUNT
                ),
            });
        }

        Ok(())
    }
}

impl Default for AddressConfig {
    fn default() -> Self {
        Self {
            max_iova_bits: Self::DEFAULT_IOVA_BITS,
            max_pa_bits: Self::DEFAULT_PA_BITS,
            max_stream_count: Self::DEFAULT_STREAM_COUNT,
            max_pasid_count: Self::DEFAULT_PASID_COUNT,
        }
    }
}

/// Builder for AddressConfig
#[derive(Clone, Debug)]
pub struct AddressConfigBuilder {
    max_iova_bits: u8,
    max_pa_bits: u8,
    max_stream_count: u32,
    max_pasid_count: u32,
}

impl AddressConfigBuilder {
    /// Create a new builder with default values
    #[must_use]
    pub fn new() -> Self {
        Self {
            max_iova_bits: AddressConfig::DEFAULT_IOVA_BITS,
            max_pa_bits: AddressConfig::DEFAULT_PA_BITS,
            max_stream_count: AddressConfig::DEFAULT_STREAM_COUNT,
            max_pasid_count: AddressConfig::DEFAULT_PASID_COUNT,
        }
    }

    /// Set maximum IOVA bits
    #[must_use]
    pub fn max_iova_bits(mut self, bits: u8) -> Self {
        self.max_iova_bits = bits;
        self
    }

    /// Set maximum PA bits
    #[must_use]
    pub fn max_pa_bits(mut self, bits: u8) -> Self {
        self.max_pa_bits = bits;
        self
    }

    /// Set maximum stream count
    #[must_use]
    pub fn max_stream_count(mut self, count: u32) -> Self {
        self.max_stream_count = count;
        self
    }

    /// Set maximum PASID count
    #[must_use]
    pub fn max_pasid_count(mut self, count: u32) -> Self {
        self.max_pasid_count = count;
        self
    }

    /// Build the AddressConfig with validation
    #[must_use]
    pub fn build(self) -> Result<AddressConfig, ValidationError> {
        let config = AddressConfig {
            max_iova_bits: self.max_iova_bits,
            max_pa_bits: self.max_pa_bits,
            max_stream_count: self.max_stream_count,
            max_pasid_count: self.max_pasid_count,
        };

        config.validate()?;
        Ok(config)
    }
}

impl Default for AddressConfigBuilder {
    fn default() -> Self {
        Self::new()
    }
}

/// Resource limits for memory and threading
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct ResourceLimits {
    /// Maximum memory usage in bytes
    pub max_memory_usage: u64,

    /// Maximum thread count
    pub max_thread_count: u32,

    /// Timeout in milliseconds
    pub timeout_ms: u32,

    /// Enable resource tracking
    pub enable_resource_tracking: bool,
}

impl ResourceLimits {
    /// Minimum memory usage (1MB)
    pub const MIN_MEMORY_USAGE: u64 = 1024 * 1024;

    /// Maximum memory usage (64GB)
    pub const MAX_MEMORY_USAGE: u64 = 64 * 1024 * 1024 * 1024;

    /// Minimum thread count
    pub const MIN_THREAD_COUNT: u32 = 1;

    /// Maximum thread count
    pub const MAX_THREAD_COUNT: u32 = 256;

    /// Minimum timeout in milliseconds
    pub const MIN_TIMEOUT_MS: u32 = 10;

    /// Maximum timeout in milliseconds (5 minutes)
    pub const MAX_TIMEOUT_MS: u32 = 300_000;

    /// Default maximum memory usage (1GB)
    pub const DEFAULT_MAX_MEMORY_USAGE: u64 = 1024 * 1024 * 1024;

    /// Default maximum thread count
    pub const DEFAULT_MAX_THREAD_COUNT: u32 = 8;

    /// Default timeout (1 second)
    pub const DEFAULT_TIMEOUT_MS: u32 = 1000;

    /// Create a new builder for ResourceLimits
    #[must_use]
    pub fn builder() -> ResourceLimitsBuilder {
        ResourceLimitsBuilder::new()
    }

    /// Validate resource limits configuration
    pub fn validate(&self) -> Result<(), ValidationError> {
        if self.max_memory_usage < Self::MIN_MEMORY_USAGE || self.max_memory_usage > Self::MAX_MEMORY_USAGE {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "max memory usage {} out of range [{}, {}]",
                    self.max_memory_usage,
                    Self::MIN_MEMORY_USAGE,
                    Self::MAX_MEMORY_USAGE
                ),
            });
        }

        if self.max_thread_count < Self::MIN_THREAD_COUNT || self.max_thread_count > Self::MAX_THREAD_COUNT {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "max thread count {} out of range [{}, {}]",
                    self.max_thread_count,
                    Self::MIN_THREAD_COUNT,
                    Self::MAX_THREAD_COUNT
                ),
            });
        }

        if self.timeout_ms < Self::MIN_TIMEOUT_MS || self.timeout_ms > Self::MAX_TIMEOUT_MS {
            return Err(ValidationError::InvalidConfiguration {
                reason: format!(
                    "timeout {} out of range [{}, {}]",
                    self.timeout_ms,
                    Self::MIN_TIMEOUT_MS,
                    Self::MAX_TIMEOUT_MS
                ),
            });
        }

        Ok(())
    }

    /// Get timeout as Duration (requires std feature)
    #[cfg(feature = "std")]
    #[must_use]
    pub fn timeout(&self) -> Duration {
        Duration::from_millis(u64::from(self.timeout_ms))
    }

    /// Get max memory in bytes
    #[must_use]
    pub const fn max_memory_bytes(&self) -> u64 {
        self.max_memory_usage
    }

    /// Get max memory in KB
    #[must_use]
    pub const fn max_memory_kb(&self) -> u64 {
        self.max_memory_usage / 1024
    }

    /// Get max memory in MB
    #[must_use]
    pub const fn max_memory_mb(&self) -> u64 {
        self.max_memory_usage / (1024 * 1024)
    }

    /// Get max memory in GB
    #[must_use]
    pub const fn max_memory_gb(&self) -> u64 {
        self.max_memory_usage / (1024 * 1024 * 1024)
    }
}

impl Default for ResourceLimits {
    fn default() -> Self {
        Self {
            max_memory_usage: Self::DEFAULT_MAX_MEMORY_USAGE,
            max_thread_count: Self::DEFAULT_MAX_THREAD_COUNT,
            timeout_ms: Self::DEFAULT_TIMEOUT_MS,
            enable_resource_tracking: true,
        }
    }
}

/// Builder for ResourceLimits
#[derive(Clone, Debug)]
pub struct ResourceLimitsBuilder {
    max_memory_usage: u64,
    max_thread_count: u32,
    timeout_ms: u32,
    enable_resource_tracking: bool,
}

impl ResourceLimitsBuilder {
    /// Create a new builder with default values
    #[must_use]
    pub fn new() -> Self {
        Self {
            max_memory_usage: ResourceLimits::DEFAULT_MAX_MEMORY_USAGE,
            max_thread_count: ResourceLimits::DEFAULT_MAX_THREAD_COUNT,
            timeout_ms: ResourceLimits::DEFAULT_TIMEOUT_MS,
            enable_resource_tracking: true,
        }
    }

    /// Set maximum memory usage
    #[must_use]
    pub fn max_memory_usage(mut self, usage: u64) -> Self {
        self.max_memory_usage = usage;
        self
    }

    /// Set maximum thread count
    #[must_use]
    pub fn max_thread_count(mut self, count: u32) -> Self {
        self.max_thread_count = count;
        self
    }

    /// Set timeout in milliseconds
    #[must_use]
    pub fn timeout_ms(mut self, timeout: u32) -> Self {
        self.timeout_ms = timeout;
        self
    }

    /// Enable or disable resource tracking
    #[must_use]
    pub fn enable_resource_tracking(mut self, enable: bool) -> Self {
        self.enable_resource_tracking = enable;
        self
    }

    /// Build the ResourceLimits with validation
    #[must_use]
    pub fn build(self) -> Result<ResourceLimits, ValidationError> {
        let limits = ResourceLimits {
            max_memory_usage: self.max_memory_usage,
            max_thread_count: self.max_thread_count,
            timeout_ms: self.timeout_ms,
            enable_resource_tracking: self.enable_resource_tracking,
        };

        limits.validate()?;
        Ok(limits)
    }
}

impl Default for ResourceLimitsBuilder {
    fn default() -> Self {
        Self::new()
    }
}

/// Configuration error type for detailed validation
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Copy, Clone, Debug, PartialEq, Eq, Hash)]
pub enum ConfigurationErrorType {
    /// Invalid queue size
    InvalidQueueSize,
    /// Invalid cache size
    InvalidCacheSize,
    /// Invalid address size
    InvalidAddressSize,
    /// Invalid resource limit
    InvalidResourceLimit,
    /// Invalid format
    InvalidFormat,
    /// Missing required field
    MissingRequired,
    /// Value out of range
    OutOfRange,
}

impl fmt::Display for ConfigurationErrorType {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        match self {
            Self::InvalidQueueSize => write!(f, "Invalid queue size"),
            Self::InvalidCacheSize => write!(f, "Invalid cache size"),
            Self::InvalidAddressSize => write!(f, "Invalid address size"),
            Self::InvalidResourceLimit => write!(f, "Invalid resource limit"),
            Self::InvalidFormat => write!(f, "Invalid format"),
            Self::MissingRequired => write!(f, "Missing required field"),
            Self::OutOfRange => write!(f, "Value out of range"),
        }
    }
}

/// Configuration error with detailed information
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct ConfigurationError {
    /// Error type
    pub error_type: ConfigurationErrorType,
    /// Field name
    pub field: String,
    /// Error message
    pub message: String,
}

impl ConfigurationError {
    /// Create a new configuration error
    #[must_use]
    pub fn new(error_type: ConfigurationErrorType, field: String, message: String) -> Self {
        Self { error_type, field, message }
    }
}

impl fmt::Display for ConfigurationError {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}: {} - {}", self.error_type, self.field, self.message)
    }
}

#[cfg(feature = "std")]
impl std::error::Error for ConfigurationError {}

impl From<ValidationError> for ConfigurationError {
    fn from(error: ValidationError) -> Self {
        match error {
            ValidationError::InvalidConfiguration { reason } => {
                Self::new(ConfigurationErrorType::InvalidFormat, "unknown".to_string(), reason)
            },
            ValidationError::InvalidPASID { value } => Self::new(
                ConfigurationErrorType::OutOfRange,
                "pasid".to_string(),
                format!("invalid PASID: {value}"),
            ),
            _ => Self::new(
                ConfigurationErrorType::InvalidFormat,
                "unknown".to_string(),
                format!("{error:?}"),
            ),
        }
    }
}

/// Validation result with detailed errors and warnings
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct ValidationResult {
    /// Whether the validation passed
    pub is_valid: bool,
    /// List of errors
    pub errors: Vec<String>,
    /// List of warnings
    pub warnings: Vec<String>,
}

impl ValidationResult {
    /// Create a successful validation result
    #[must_use]
    pub fn success() -> Self {
        Self {
            is_valid: true,
            errors: Vec::new(),
            warnings: Vec::new(),
        }
    }

    /// Create a validation result with an error
    #[must_use]
    pub fn with_error(error: String) -> Self {
        Self {
            is_valid: false,
            errors: vec![error],
            warnings: Vec::new(),
        }
    }

    /// Add an error to the validation result
    pub fn add_error(&mut self, error: String) {
        self.is_valid = false;
        self.errors.push(error);
    }

    /// Add a warning to the validation result
    pub fn add_warning(&mut self, warning: String) {
        self.warnings.push(warning);
    }

    /// Merge another validation result into this one
    pub fn merge(&mut self, other: ValidationResult) {
        if !other.is_valid {
            self.is_valid = false;
        }
        self.errors.extend(other.errors);
        self.warnings.extend(other.warnings);
    }
}

impl Default for ValidationResult {
    fn default() -> Self {
        Self {
            is_valid: false,
            errors: Vec::new(),
            warnings: Vec::new(),
        }
    }
}

/// Configuration constants
#[derive(Debug, Clone, Copy)]
pub struct ConfigConstants;

impl ConfigConstants {
    /// Default configuration file name
    pub const DEFAULT_CONFIG_FILE: &'static str = "smmu_config.conf";

    /// Backup configuration file name
    pub const BACKUP_CONFIG_FILE: &'static str = "smmu_config.conf.bak";

    /// Configuration version
    pub const CONFIG_VERSION: &'static str = "v1.0.0";

    /// Environment variable for config file
    pub const ENV_CONFIG_FILE: &'static str = "SMMU_CONFIG_FILE";

    /// Environment variable for queue size
    pub const ENV_QUEUE_SIZE: &'static str = "SMMU_QUEUE_SIZE";

    /// Environment variable for cache size
    pub const ENV_CACHE_SIZE: &'static str = "SMMU_CACHE_SIZE";

    /// Environment variable for memory limit
    pub const ENV_MEMORY_LIMIT: &'static str = "SMMU_MEMORY_LIMIT";
}

/// Global SMMU configuration combining all configuration types
#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct SMMUConfig {
    /// Queue configuration
    pub queue_config: QueueConfig,

    /// Cache configuration
    pub cache_config: CacheConfig,

    /// Address space configuration
    pub address_config: AddressConfig,

    /// Resource limits
    pub resource_limits: ResourceLimits,
}

impl SMMUConfig {
    /// Create a new builder for SMMUConfig
    #[must_use]
    pub fn builder() -> SMMUConfigBuilder {
        SMMUConfigBuilder::new()
    }

    /// Create a default configuration
    #[must_use]
    pub fn default_config() -> Self {
        Self::default()
    }

    /// Create a high-performance configuration
    #[must_use]
    pub fn high_performance() -> Self {
        Self {
            queue_config: QueueConfig {
                event_queue_size: 2048,
                command_queue_size: 1024,
                pri_queue_size: 512,
            },
            cache_config: CacheConfig {
                tlb_cache_size: 16_384,
                cache_max_age_ms: 10_000,
                enable_caching: true,
            },
            address_config: AddressConfig::default(),
            resource_limits: ResourceLimits::default(),
        }
    }

    /// Create a low-memory configuration
    #[must_use]
    pub fn low_memory() -> Self {
        Self {
            queue_config: QueueConfig {
                event_queue_size: 64,
                command_queue_size: 32,
                pri_queue_size: 16,
            },
            cache_config: CacheConfig {
                tlb_cache_size: 128,
                cache_max_age_ms: 2000,
                enable_caching: true,
            },
            address_config: AddressConfig {
                max_iova_bits: 32,
                max_pa_bits: 40,
                max_stream_count: 256,
                max_pasid_count: 1024,
            },
            resource_limits: ResourceLimits {
                max_memory_usage: 128 * 1024 * 1024, // 128MB
                max_thread_count: 2,
                timeout_ms: 500,
                enable_resource_tracking: true,
            },
        }
    }

    /// Create a minimal configuration
    #[must_use]
    pub fn minimal() -> Self {
        Self {
            queue_config: QueueConfig {
                event_queue_size: QueueConfig::MIN_QUEUE_SIZE,
                command_queue_size: QueueConfig::MIN_QUEUE_SIZE,
                pri_queue_size: QueueConfig::MIN_QUEUE_SIZE,
            },
            cache_config: CacheConfig {
                tlb_cache_size: CacheConfig::MIN_CACHE_SIZE,
                cache_max_age_ms: CacheConfig::MIN_CACHE_AGE_MS,
                enable_caching: false,
            },
            address_config: AddressConfig {
                max_iova_bits: 32,
                max_pa_bits: 32,
                max_stream_count: 1,
                max_pasid_count: 1,
            },
            resource_limits: ResourceLimits {
                max_memory_usage: ResourceLimits::MIN_MEMORY_USAGE,
                max_thread_count: ResourceLimits::MIN_THREAD_COUNT,
                timeout_ms: ResourceLimits::MIN_TIMEOUT_MS,
                enable_resource_tracking: false,
            },
        }
    }

    /// Create a server profile configuration
    #[must_use]
    pub fn server_profile() -> Self {
        Self {
            queue_config: QueueConfig {
                event_queue_size: 4096,
                command_queue_size: 2048,
                pri_queue_size: 1024,
            },
            cache_config: CacheConfig {
                tlb_cache_size: 32_768,
                cache_max_age_ms: 15_000,
                enable_caching: true,
            },
            address_config: AddressConfig::default(),
            resource_limits: ResourceLimits {
                max_memory_usage: 8 * 1024 * 1024 * 1024, // 8GB
                max_thread_count: 32,
                timeout_ms: 5000,
                enable_resource_tracking: true,
            },
        }
    }

    /// Create an embedded profile configuration
    #[must_use]
    pub fn embedded_profile() -> Self {
        Self {
            queue_config: QueueConfig {
                event_queue_size: 64,
                command_queue_size: 32,
                pri_queue_size: 16,
            },
            cache_config: CacheConfig {
                tlb_cache_size: 256,
                cache_max_age_ms: 2000,
                enable_caching: true,
            },
            address_config: AddressConfig {
                max_iova_bits: 32,
                max_pa_bits: 40,
                max_stream_count: 128,
                max_pasid_count: 256,
            },
            resource_limits: ResourceLimits {
                max_memory_usage: 64 * 1024 * 1024, // 64MB
                max_thread_count: 2,
                timeout_ms: 500,
                enable_resource_tracking: false,
            },
        }
    }

    /// Create a development profile configuration
    #[must_use]
    pub fn development_profile() -> Self {
        Self {
            queue_config: QueueConfig::default(),
            cache_config: CacheConfig::default(),
            address_config: AddressConfig::default(),
            resource_limits: ResourceLimits {
                max_memory_usage: 2 * 1024 * 1024 * 1024, // 2GB
                max_thread_count: 8,
                timeout_ms: 10_000, // Longer timeout for debugging
                enable_resource_tracking: true,
            },
        }
    }

    /// Update queue sizes
    pub fn update_queue_sizes(
        &mut self,
        event_size: usize,
        command_size: usize,
        pri_size: usize,
    ) -> Result<(), ValidationError> {
        let new_config = QueueConfig {
            event_queue_size: event_size,
            command_queue_size: command_size,
            pri_queue_size: pri_size,
        };
        new_config.validate()?;
        self.queue_config = new_config;
        Ok(())
    }

    /// Update cache settings
    pub fn update_cache_settings(
        &mut self,
        cache_size: usize,
        max_age: u32,
        enable: bool,
    ) -> Result<(), ValidationError> {
        let new_config = CacheConfig {
            tlb_cache_size: cache_size,
            cache_max_age_ms: max_age,
            enable_caching: enable,
        };
        new_config.validate()?;
        self.cache_config = new_config;
        Ok(())
    }

    /// Update address limits
    pub fn update_address_limits(
        &mut self,
        iova_bits: u8,
        pa_bits: u8,
        stream_count: u32,
        pasid_count: u32,
    ) -> Result<(), ValidationError> {
        let new_config = AddressConfig {
            max_iova_bits: iova_bits,
            max_pa_bits: pa_bits,
            max_stream_count: stream_count,
            max_pasid_count: pasid_count,
        };
        new_config.validate()?;
        self.address_config = new_config;
        Ok(())
    }

    /// Update resource limits
    pub fn update_resource_limits(
        &mut self,
        memory_usage: u64,
        thread_count: u32,
        timeout: u32,
    ) -> Result<(), ValidationError> {
        let new_limits = ResourceLimits {
            max_memory_usage: memory_usage,
            max_thread_count: thread_count,
            timeout_ms: timeout,
            enable_resource_tracking: self.resource_limits.enable_resource_tracking,
        };
        new_limits.validate()?;
        self.resource_limits = new_limits;
        Ok(())
    }

    /// Merge another configuration into this one
    pub fn merge(&mut self, other: &SMMUConfig) -> Result<(), ValidationError> {
        // Validate the other configuration first
        other.validate()?;

        // Merge configurations
        self.queue_config = other.queue_config.clone();
        self.cache_config = other.cache_config.clone();
        self.address_config = other.address_config.clone();
        self.resource_limits = other.resource_limits.clone();

        Ok(())
    }

    /// Reset to default configuration
    pub fn reset(&mut self) {
        *self = Self::default();
    }

    /// Validate entire configuration
    pub fn validate(&self) -> Result<(), ValidationError> {
        self.queue_config.validate()?;
        self.cache_config.validate()?;
        self.address_config.validate()?;
        self.resource_limits.validate()?;
        Ok(())
    }

    /// Set maximum streams (builder-style)
    #[must_use]
    pub fn with_max_streams(mut self, max_streams: usize) -> Self {
        self.address_config.max_stream_count = max_streams as u32;
        self
    }

    /// Get maximum streams
    #[inline]
    #[must_use]
    pub const fn max_streams(&self) -> usize {
        self.address_config.max_stream_count as usize
    }

    /// Get queue configuration
    #[inline]
    #[must_use]
    pub const fn queue_config(&self) -> &QueueConfig {
        &self.queue_config
    }

    /// Validate with detailed results
    #[must_use]
    pub fn validate_detailed(&self) -> ValidationResult {
        let mut result = ValidationResult::success();

        if let Err(e) = self.queue_config.validate() {
            result.add_error(format!("Queue config: {e:?}"));
        }

        if let Err(e) = self.cache_config.validate() {
            result.add_error(format!("Cache config: {e:?}"));
        }

        if let Err(e) = self.address_config.validate() {
            result.add_error(format!("Address config: {e:?}"));
        }

        if let Err(e) = self.resource_limits.validate() {
            result.add_error(format!("Resource limits: {e:?}"));
        }

        // Add warnings for minimal configurations
        if self.queue_config.event_queue_size < 128 {
            result.add_warning("Event queue size is very small".to_string());
        }

        if self.cache_config.tlb_cache_size < 256 {
            result.add_warning("TLB cache size is very small".to_string());
        }

        result
    }

    /// Convert configuration to string representation
    #[cfg(feature = "std")]
    #[must_use]
    pub fn to_string(&self) -> String {
        format!(
            "event_queue_size={}\ncommand_queue_size={}\npri_queue_size={}\n\
             tlb_cache_size={}\ncache_max_age_ms={}\nenable_caching={}\n\
             max_iova_bits={}\nmax_pa_bits={}\nmax_stream_count={}\nmax_pasid_count={}\n\
             max_memory_usage={}\nmax_thread_count={}\ntimeout_ms={}\nenable_resource_tracking={}",
            self.queue_config.event_queue_size,
            self.queue_config.command_queue_size,
            self.queue_config.pri_queue_size,
            self.cache_config.tlb_cache_size,
            self.cache_config.cache_max_age_ms,
            self.cache_config.enable_caching,
            self.address_config.max_iova_bits,
            self.address_config.max_pa_bits,
            self.address_config.max_stream_count,
            self.address_config.max_pasid_count,
            self.resource_limits.max_memory_usage,
            self.resource_limits.max_thread_count,
            self.resource_limits.timeout_ms,
            self.resource_limits.enable_resource_tracking,
        )
    }

    /// Parse configuration from string representation
    #[cfg(feature = "std")]
    pub fn from_string(s: &str) -> Result<Self, ValidationError> {
        let mut config = Self::default();
        let mut map = HashMap::new();

        // Parse key-value pairs
        for line in s.lines() {
            let line = line.trim();

            // Skip empty lines and comments
            if line.is_empty() || line.starts_with('#') {
                continue;
            }

            if let Some(pos) = line.find('=') {
                let key = line[..pos].trim();
                let value = line[pos + 1..].trim();
                map.insert(key.to_string(), value.to_string());
            }
        }

        // Parse queue configuration
        if let Some(v) = map.get("event_queue_size") {
            config.queue_config.event_queue_size = parse_numeric(v, "event_queue_size")?;
        }
        if let Some(v) = map.get("command_queue_size") {
            config.queue_config.command_queue_size = parse_numeric(v, "command_queue_size")?;
        }
        if let Some(v) = map.get("pri_queue_size") {
            config.queue_config.pri_queue_size = parse_numeric(v, "pri_queue_size")?;
        }

        // Parse cache configuration
        if let Some(v) = map.get("tlb_cache_size") {
            config.cache_config.tlb_cache_size = parse_numeric(v, "tlb_cache_size")?;
        }
        if let Some(v) = map.get("cache_max_age_ms") {
            config.cache_config.cache_max_age_ms = parse_numeric(v, "cache_max_age_ms")?;
        }
        if let Some(v) = map.get("enable_caching") {
            config.cache_config.enable_caching = v
                .parse()
                .map_err(|_| ValidationError::InvalidConfiguration { reason: "invalid enable_caching".into() })?;
        }

        // Parse address configuration
        if let Some(v) = map.get("max_iova_bits") {
            config.address_config.max_iova_bits = parse_numeric(v, "max_iova_bits")?;
        }
        if let Some(v) = map.get("max_pa_bits") {
            config.address_config.max_pa_bits = parse_numeric(v, "max_pa_bits")?;
        }
        if let Some(v) = map.get("max_stream_count") {
            config.address_config.max_stream_count = parse_numeric(v, "max_stream_count")?;
        }
        if let Some(v) = map.get("max_pasid_count") {
            config.address_config.max_pasid_count = parse_numeric(v, "max_pasid_count")?;
        }

        // Parse resource limits
        if let Some(v) = map.get("max_memory_usage") {
            config.resource_limits.max_memory_usage = parse_numeric(v, "max_memory_usage")?;
        }
        if let Some(v) = map.get("max_thread_count") {
            config.resource_limits.max_thread_count = parse_numeric(v, "max_thread_count")?;
        }
        if let Some(v) = map.get("timeout_ms") {
            config.resource_limits.timeout_ms = parse_numeric(v, "timeout_ms")?;
        }
        if let Some(v) = map.get("enable_resource_tracking") {
            config.resource_limits.enable_resource_tracking =
                v.parse().map_err(|_| ValidationError::InvalidConfiguration {
                    reason: "invalid enable_resource_tracking".into(),
                })?;
        }

        // Validate the final configuration
        config.validate()?;
        Ok(config)
    }
}

impl Default for SMMUConfig {
    fn default() -> Self {
        Self {
            queue_config: QueueConfig::default(),
            cache_config: CacheConfig::default(),
            address_config: AddressConfig::default(),
            resource_limits: ResourceLimits::default(),
        }
    }
}

/// Builder for SMMUConfig
#[derive(Clone, Debug)]
pub struct SMMUConfigBuilder {
    queue_config: QueueConfig,
    cache_config: CacheConfig,
    address_config: AddressConfig,
    resource_limits: ResourceLimits,
}

impl SMMUConfigBuilder {
    /// Create a new builder with default values
    #[must_use]
    pub fn new() -> Self {
        Self {
            queue_config: QueueConfig::default(),
            cache_config: CacheConfig::default(),
            address_config: AddressConfig::default(),
            resource_limits: ResourceLimits::default(),
        }
    }

    /// Set queue configuration
    #[must_use]
    pub fn queue_config(mut self, config: QueueConfig) -> Self {
        self.queue_config = config;
        self
    }

    /// Set cache configuration
    #[must_use]
    pub fn cache_config(mut self, config: CacheConfig) -> Self {
        self.cache_config = config;
        self
    }

    /// Set address configuration
    #[must_use]
    pub fn address_config(mut self, config: AddressConfig) -> Self {
        self.address_config = config;
        self
    }

    /// Set resource limits
    #[must_use]
    pub fn resource_limits(mut self, limits: ResourceLimits) -> Self {
        self.resource_limits = limits;
        self
    }

    /// Build the SMMUConfig with validation
    #[must_use]
    pub fn build(self) -> Result<SMMUConfig, ValidationError> {
        let config = SMMUConfig {
            queue_config: self.queue_config,
            cache_config: self.cache_config,
            address_config: self.address_config,
            resource_limits: self.resource_limits,
        };

        config.validate()?;
        Ok(config)
    }
}

impl Default for SMMUConfigBuilder {
    fn default() -> Self {
        Self::new()
    }
}

/// Convert QueueConfig to SMMUConfig
///
/// Creates a default SMMUConfig with the specified queue configuration.
impl From<QueueConfig> for SMMUConfig {
    fn from(queue_config: QueueConfig) -> Self {
        SMMUConfig {
            queue_config,
            cache_config: CacheConfig::default(),
            address_config: AddressConfig::default(),
            resource_limits: ResourceLimits::default(),
        }
    }
}

#[cfg(test)]
mod tests {
    use super::*;

    // ========================================================================
    // Unit tests for existing config structures
    // ========================================================================

    #[test]
    fn test_queue_config_validation() {
        let config = QueueConfig::default();
        assert!(config.validate().is_ok());
    }

    #[test]
    fn test_cache_config_validation() {
        let config = CacheConfig::default();
        assert!(config.validate().is_ok());
    }

    #[test]
    fn test_address_config_validation() {
        let config = AddressConfig::default();
        assert!(config.validate().is_ok());
    }

    #[test]
    fn test_smmu_config_validation() {
        let config = SMMUConfig::default();
        assert!(config.validate().is_ok());
    }

    // ========================================================================
    // FAILING TESTS for missing ResourceLimits structure
    // These will fail until ResourceLimits is implemented
    // ========================================================================

    #[test]
    fn test_resource_limits_default_construction() {
        let _limits = ResourceLimits::default();
    }

    #[test]
    fn test_resource_limits_builder() {
        let _limits = ResourceLimits::builder()
            .max_memory_usage(1024 * 1024 * 1024)
            .max_thread_count(8)
            .timeout_ms(1000)
            .enable_resource_tracking(true)
            .build();
    }

    #[test]
    fn test_resource_limits_validation() {
        let limits = ResourceLimits::default();
        assert!(limits.validate().is_ok());
    }

    #[test]
    fn test_resource_limits_constants() {
        assert_eq!(ResourceLimits::MIN_MEMORY_USAGE, 1024 * 1024);
        assert_eq!(ResourceLimits::MAX_MEMORY_USAGE, 64 * 1024 * 1024 * 1024);
    }

    // ========================================================================
    // FAILING TESTS for missing SMMUConfig extended methods
    // These will fail until extended methods are implemented
    // ========================================================================

    #[test]
    fn test_smmu_config_server_profile() {
        let _config = SMMUConfig::server_profile();
    }

    #[test]
    fn test_smmu_config_embedded_profile() {
        let _config = SMMUConfig::embedded_profile();
    }

    #[test]
    fn test_smmu_config_development_profile() {
        let _config = SMMUConfig::development_profile();
    }

    #[test]
    fn test_smmu_config_update_queue_sizes() {
        let mut config = SMMUConfig::default();
        assert!(config.update_queue_sizes(1024, 512, 256).is_ok());
    }

    #[test]
    fn test_smmu_config_update_cache_settings() {
        let mut config = SMMUConfig::default();
        assert!(config.update_cache_settings(2048, 10_000, true).is_ok());
    }

    #[test]
    fn test_smmu_config_update_address_limits() {
        let mut config = SMMUConfig::default();
        assert!(config.update_address_limits(40, 44, 1024, 2048).is_ok());
    }

    #[test]
    fn test_smmu_config_update_resource_limits() {
        let mut config = SMMUConfig::default();
        assert!(config.update_resource_limits(2 * 1024 * 1024 * 1024, 16, 2000).is_ok());
    }

    #[test]
    fn test_smmu_config_merge() {
        let mut base = SMMUConfig::default();
        let overlay = SMMUConfig::high_performance();
        assert!(base.merge(&overlay).is_ok());
    }

    #[test]
    fn test_smmu_config_reset() {
        let mut config = SMMUConfig::high_performance();
        config.reset();
        assert_eq!(config, SMMUConfig::default());
    }

    #[test]
    fn test_smmu_config_to_string() {
        let config = SMMUConfig::default();
        let _config_str = config.to_string();
    }

    #[test]
    fn test_smmu_config_from_string() {
        let config_str = "event_queue_size=1024\ntlb_cache_size=2048";
        let _config = SMMUConfig::from_string(config_str);
    }

    #[test]
    fn test_smmu_config_validate_detailed() {
        let config = SMMUConfig::default();
        let result = config.validate_detailed();
        assert!(result.is_valid);
    }

    // ========================================================================
    // FAILING TESTS for missing ConfigurationError types
    // These will fail until ConfigurationError is implemented
    // ========================================================================

    #[test]
    fn test_configuration_error_construction() {
        let _error = ConfigurationError::new(
            ConfigurationErrorType::InvalidQueueSize,
            "event_queue_size".to_string(),
            "value out of range".to_string(),
        );
    }

    #[test]
    fn test_configuration_error_types_exist() {
        let _types = [
            ConfigurationErrorType::InvalidQueueSize,
            ConfigurationErrorType::InvalidCacheSize,
            ConfigurationErrorType::InvalidAddressSize,
            ConfigurationErrorType::InvalidResourceLimit,
            ConfigurationErrorType::InvalidFormat,
            ConfigurationErrorType::MissingRequired,
            ConfigurationErrorType::OutOfRange,
        ];
    }

    // ========================================================================
    // FAILING TESTS for missing ValidationResult structure
    // These will fail until ValidationResult is implemented
    // ========================================================================

    #[test]
    fn test_validation_result_success() {
        let result = ValidationResult::success();
        assert!(result.is_valid);
        assert!(result.errors.is_empty());
    }

    #[test]
    fn test_validation_result_with_error() {
        let result = ValidationResult::with_error("test error".to_string());
        assert!(!result.is_valid);
        assert_eq!(result.errors.len(), 1);
    }

    #[test]
    fn test_validation_result_add_warning() {
        let mut result = ValidationResult::success();
        result.add_warning("test warning".to_string());
        assert!(result.is_valid);
        assert_eq!(result.warnings.len(), 1);
    }

    // ========================================================================
    // FAILING TESTS for missing ConfigConstants
    // These will fail until ConfigConstants is implemented
    // ========================================================================

    #[test]
    fn test_config_constants_default_file() {
        assert_eq!(ConfigConstants::DEFAULT_CONFIG_FILE, "smmu_config.conf");
    }

    #[test]
    fn test_config_constants_env_vars() {
        assert_eq!(ConfigConstants::ENV_CONFIG_FILE, "SMMU_CONFIG_FILE");
        assert_eq!(ConfigConstants::ENV_QUEUE_SIZE, "SMMU_QUEUE_SIZE");
    }

    #[test]
    fn test_config_constants_version() {
        assert!(!ConfigConstants::CONFIG_VERSION.is_empty());
    }
}