smbioslib/structs/types/
processor_information.rs

1use crate::core::{strings::*, Handle, UndefinedStruct};
2use crate::SMBiosStruct;
3use serde::{ser::SerializeStruct, Serialize, Serializer};
4use std::convert::TryInto;
5use std::fmt;
6use std::ops::Deref;
7
8/// # Processor Information (Type 4)
9///
10/// The information in this structure defines the attributes of a single processor; a separate
11/// structure instance is provided for each system processor socket/slot. For example, a system with an
12/// IntelDX2™ processor would have a single structure instance while a system with an IntelSX2™ processor
13/// would have a structure to describe the main CPU and a second structure to describe the 80487 co1021 processor.
14///
15/// NOTE One structure is provided for each processor instance in a system. For example, a system that supports up
16/// to two processors includes two Processor Information structures — even if only one processor is currently
17/// installed. Software that interprets the SMBIOS information can count the Processor Information structures to
18/// determine the maximum possible configuration of the system.
19///
20/// Compliant with:
21/// DMTF SMBIOS Reference Specification 3.7.0 (DSP0134)
22/// Document Date: 2023-07-21
23pub struct SMBiosProcessorInformation<'a> {
24    parts: &'a UndefinedStruct,
25}
26
27impl<'a> SMBiosStruct<'a> for SMBiosProcessorInformation<'a> {
28    const STRUCT_TYPE: u8 = 4u8;
29
30    fn new(parts: &'a UndefinedStruct) -> Self {
31        Self { parts }
32    }
33
34    fn parts(&self) -> &'a UndefinedStruct {
35        self.parts
36    }
37}
38
39impl<'a> SMBiosProcessorInformation<'a> {
40    /// Socket reference designation
41    ///
42    /// EXAMPLE: "J202"
43    pub fn socket_designation(&self) -> SMBiosString {
44        self.parts.get_field_string(0x04)
45    }
46
47    /// Processor type
48    pub fn processor_type(&self) -> Option<ProcessorTypeData> {
49        self.parts
50            .get_field_byte(0x05)
51            .map(|raw| ProcessorTypeData::from(raw))
52    }
53
54    /// Processor family
55    pub fn processor_family(&self) -> Option<ProcessorFamilyData> {
56        self.parts
57            .get_field_byte(0x06)
58            .map(|raw| ProcessorFamilyData::from(raw))
59    }
60
61    /// Processor manufacturer
62    pub fn processor_manufacturer(&self) -> SMBiosString {
63        self.parts.get_field_string(0x07)
64    }
65
66    /// Raw processor identification data
67    pub fn processor_id(&self) -> Option<&[u8; 8]> {
68        // Note: There are two more levels to the design of ProcessorId to consider.
69        // 1. These 8 bytes can represent one of 4 classes of processor (see 7.5.3)
70        //    perhaps return an enum with 4 variants.
71        // 2. Per variant the data represents specific Id information which can be
72        //    accomodated in specific representative structures.
73        self.parts
74            .get_field_data(0x08, 0x10)
75            .map(|raw| raw.try_into().expect("incorrect length"))
76    }
77
78    /// Processor version
79    pub fn processor_version(&self) -> SMBiosString {
80        self.parts.get_field_string(0x10)
81    }
82
83    /// Voltage
84    pub fn voltage(&self) -> Option<ProcessorVoltage> {
85        self.parts
86            .get_field_byte(0x11)
87            .map(|raw| ProcessorVoltage::from(raw))
88    }
89
90    /// External clock frequency, in MHz
91    ///
92    /// If the value is unknown, the field is set to 0.
93    pub fn external_clock(&self) -> Option<ProcessorExternalClock> {
94        self.parts
95            .get_field_word(0x12)
96            .map(|raw| ProcessorExternalClock::from(raw))
97    }
98
99    /// Maximum processor speed (in MHz) supported
100    /// by the system for this processor socket
101    ///
102    /// 0E9h is for a 233 MHz processor.
103    ///
104    /// NOTE: This field identifies a capability for the system,
105    /// not the processor itself.
106    pub fn max_speed(&self) -> Option<ProcessorSpeed> {
107        self.parts
108            .get_field_word(0x14)
109            .map(|raw| ProcessorSpeed::from(raw))
110    }
111
112    /// Current speed
113    ///
114    /// Same format as Max Speed
115    ///
116    /// NOTE: This field identifies the processor's speed at
117    /// system boot; the processor may support
118    /// more than one speed.
119    pub fn current_speed(&self) -> Option<ProcessorSpeed> {
120        self.parts
121            .get_field_word(0x16)
122            .map(|raw| ProcessorSpeed::from(raw))
123    }
124
125    /// Status bit field
126    pub fn status(&self) -> Option<ProcessorStatus> {
127        self.parts
128            .get_field_byte(0x18)
129            .map(|raw| ProcessorStatus::from(raw))
130    }
131
132    /// Processor upgrade
133    pub fn processor_upgrade(&self) -> Option<ProcessorUpgradeData> {
134        self.parts
135            .get_field_byte(0x19)
136            .map(|raw| ProcessorUpgradeData::from(raw))
137    }
138
139    /// Handle of a [super::SMBiosCacheInformation] structure that
140    /// defines the attributes of the primary (Level 1)
141    /// cache for this processor
142    ///
143    /// For version 2.1 and version 2.2
144    /// implementations, the value is 0FFFFh if the
145    /// processor has no L1 cache. For version 2.3 and
146    /// later implementations, the value is 0FFFFh if
147    /// the Cache Information structure is not provided.
148    pub fn l1cache_handle(&self) -> Option<Handle> {
149        self.parts.get_field_handle(0x1A)
150    }
151
152    /// Handle of a [super::SMBiosCacheInformation] structure that
153    /// defines the attributes of the primary (Level 2)
154    /// cache for this processor
155    ///
156    /// For version 2.1 and version 2.2
157    /// implementations, the value is 0FFFFh if the
158    /// processor has no L2 cache. For version 2.3 and
159    /// later implementations, the value is 0FFFFh if
160    /// the Cache Information structure is not provided.
161    pub fn l2cache_handle(&self) -> Option<Handle> {
162        self.parts.get_field_handle(0x1C)
163    }
164
165    /// Handle of a [super::SMBiosCacheInformation] structure that
166    /// defines the attributes of the primary (Level 3)
167    /// cache for this processor
168    ///
169    /// For version 2.1 and version 2.2
170    /// implementations, the value is 0FFFFh if the
171    /// processor has no L3 cache. For version 2.3 and
172    /// later implementations, the value is 0FFFFh if
173    /// the Cache Information structure is not provided.
174    pub fn l3cache_handle(&self) -> Option<Handle> {
175        self.parts.get_field_handle(0x1E)
176    }
177
178    /// The serial number of this processor
179    ///
180    /// This value is set by the manufacturer and
181    /// normally not changeable.
182    pub fn serial_number(&self) -> SMBiosString {
183        self.parts.get_field_string(0x20)
184    }
185
186    /// The asset tag of this processor
187    pub fn asset_tag(&self) -> SMBiosString {
188        self.parts.get_field_string(0x21)
189    }
190
191    /// The part number of this processor
192    ///
193    /// This value is set by the manufacturer and
194    /// normally not changeable.
195    pub fn part_number(&self) -> SMBiosString {
196        self.parts.get_field_string(0x22)
197    }
198
199    /// Number of cores per processor socket
200    ///
201    /// For core counts of 256 or greater, the
202    /// 'core_count_2' field is set to the number of cores.
203    pub fn core_count(&self) -> Option<CoreCount> {
204        self.parts
205            .get_field_byte(0x23)
206            .map(|raw| CoreCount::from(raw))
207    }
208
209    /// Number of enabled cores per processor socket
210    ///
211    /// For core counts of 256 or greater, the
212    /// 'cores_enabled_2' field is set to the number of enabled
213    /// cores.
214    pub fn cores_enabled(&self) -> Option<CoresEnabled> {
215        self.parts
216            .get_field_byte(0x24)
217            .map(|raw| CoresEnabled::from(raw))
218    }
219
220    /// Number of threads per processor socket
221    ///
222    /// For thread counts of 256 or greater,
223    /// 'thread_count_2' field is set to the number of
224    /// threads.
225    pub fn thread_count(&self) -> Option<ThreadCount> {
226        self.parts
227            .get_field_byte(0x25)
228            .map(|raw| ThreadCount::from(raw))
229    }
230
231    /// Defines which functions the processor supports
232    pub fn processor_characteristics(&self) -> Option<ProcessorCharacteristics> {
233        self.parts
234            .get_field_word(0x26)
235            .map(|raw| ProcessorCharacteristics::from(raw))
236    }
237
238    /// Processor family 2
239    pub fn processor_family_2(&self) -> Option<ProcessorFamilyData2> {
240        self.parts
241            .get_field_word(0x28)
242            .map(|raw| ProcessorFamilyData2::from(raw))
243    }
244
245    /// Number of Cores per processor socket.
246    ///
247    /// Supports core counts >255. If this field is
248    /// present, it holds the core count for the
249    /// processor socket. 'core_count' will also hold the
250    /// core count, except for core counts that are 256
251    /// or greater. In that case, 'core_count' shall be set
252    /// to 'CoreCount::SeeCoreCount2' and 'core_count_2' will hold the count.
253    pub fn core_count_2(&self) -> Option<CoreCount2> {
254        self.parts
255            .get_field_word(0x2A)
256            .map(|raw| CoreCount2::from(raw))
257    }
258
259    /// Number of enabled cores per processor socket.
260    ///
261    /// Supports core enabled counts >255. If this field
262    /// is present, it holds the core enabled count for
263    /// the processor socket. 'cores_enabled' will also
264    /// hold the core enabled count, except for core
265    /// counts that are 256 or greater. In that case,
266    /// 'cores_enabled' shall be set to 'CoresEnabled::SeeCoresEnabled2'
267    /// and 'cores_enabled_2' will hold the count.
268    pub fn cores_enabled_2(&self) -> Option<CoresEnabled2> {
269        self.parts
270            .get_field_word(0x2C)
271            .map(|raw| CoresEnabled2::from(raw))
272    }
273
274    /// Number of threads per processor socket.
275    ///
276    /// Supports thread counts >255. If this field is
277    /// present, it holds the thread count for the
278    /// processor socket. 'thread_count' will also hold
279    /// the thread count, except for thread counts that
280    /// are 256 or greater. In that case, 'thread_count'
281    /// shall be set to 'ThreadCount::SeeThreadCount2'
282    /// and 'thread_count_2' will hold the count.
283    pub fn thread_count_2(&self) -> Option<ThreadCount2> {
284        self.parts
285            .get_field_word(0x2E)
286            .map(|raw| ThreadCount2::from(raw))
287    }
288
289    /// Number of threads the BIOS has enabled and available for operating
290    /// system use.
291    ///
292    /// For example, if the BIOS detects a dual-core processor with two threads
293    /// supported in each core
294    ///     • And it leaves both threads enabled, it reports a value of 4.
295    ///     • And it disables multi-threading support, it reports a value of 2.
296    pub fn thread_enabled(&self) -> Option<ThreadEnabled> {
297        self.parts
298            .get_field_word(0x30)
299            .map(|raw| ThreadEnabled::from(raw))
300    }
301}
302
303impl fmt::Debug for SMBiosProcessorInformation<'_> {
304    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
305        fmt.debug_struct(std::any::type_name::<SMBiosProcessorInformation<'_>>())
306            .field("header", &self.parts.header)
307            .field("socket_designation", &self.socket_designation())
308            .field("processor_type", &self.processor_type())
309            .field("processor_family", &self.processor_family())
310            .field("processor_manufacturer", &self.processor_manufacturer())
311            .field("processor_id", &self.processor_id())
312            .field("processor_version", &self.processor_version())
313            .field("voltage", &self.voltage())
314            .field("external_clock", &self.external_clock())
315            .field("max_speed", &self.max_speed())
316            .field("current_speed", &self.current_speed())
317            .field("status", &self.status())
318            .field("processor_upgrade", &self.processor_upgrade())
319            .field("l1cache_handle", &self.l1cache_handle())
320            .field("l2cache_handle", &self.l2cache_handle())
321            .field("l3cache_handle", &self.l3cache_handle())
322            .field("serial_number", &self.serial_number())
323            .field("asset_tag", &self.asset_tag())
324            .field("part_number", &self.part_number())
325            .field("core_count", &self.core_count())
326            .field("cores_enabled", &self.cores_enabled())
327            .field("thread_count", &self.thread_count())
328            .field(
329                "processor_characteristics",
330                &self.processor_characteristics(),
331            )
332            .field("processor_family_2", &self.processor_family_2())
333            .field("core_count_2", &self.core_count_2())
334            .field("cores_enabled_2", &self.cores_enabled_2())
335            .field("thread_count_2", &self.thread_count_2())
336            .field("thread_enabled", &self.thread_enabled())
337            .finish()
338    }
339}
340
341impl Serialize for SMBiosProcessorInformation<'_> {
342    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
343    where
344        S: Serializer,
345    {
346        let mut state = serializer.serialize_struct("SMBiosProcessorInformation", 27)?;
347        state.serialize_field("header", &self.parts.header)?;
348        state.serialize_field("socket_designation", &self.socket_designation())?;
349        state.serialize_field("processor_type", &self.processor_type())?;
350        state.serialize_field("processor_family", &self.processor_family())?;
351        state.serialize_field("processor_manufacturer", &self.processor_manufacturer())?;
352        state.serialize_field("processor_id", &self.processor_id())?;
353        state.serialize_field("processor_version", &self.processor_version())?;
354        state.serialize_field("voltage", &self.voltage())?;
355        state.serialize_field("external_clock", &self.external_clock())?;
356        state.serialize_field("max_speed", &self.max_speed())?;
357        state.serialize_field("current_speed", &self.current_speed())?;
358        state.serialize_field("status", &self.status())?;
359        state.serialize_field("processor_upgrade", &self.processor_upgrade())?;
360        state.serialize_field("l1cache_handle", &self.l1cache_handle())?;
361        state.serialize_field("l2cache_handle", &self.l2cache_handle())?;
362        state.serialize_field("l3cache_handle", &self.l3cache_handle())?;
363        state.serialize_field("serial_number", &self.serial_number())?;
364        state.serialize_field("asset_tag", &self.asset_tag())?;
365        state.serialize_field("part_number", &self.part_number())?;
366        state.serialize_field("core_count", &self.core_count())?;
367        state.serialize_field("cores_enabled", &self.cores_enabled())?;
368        state.serialize_field("thread_count", &self.thread_count())?;
369        state.serialize_field(
370            "processor_characteristics",
371            &self.processor_characteristics(),
372        )?;
373        state.serialize_field("processor_family_2", &self.processor_family_2())?;
374        state.serialize_field("core_count_2", &self.core_count_2())?;
375        state.serialize_field("cores_enabled_2", &self.cores_enabled_2())?;
376        state.serialize_field("thread_count_2", &self.thread_count_2())?;
377        state.serialize_field("thread_enabled", &self.thread_enabled())?;
378        state.end()
379    }
380}
381
382/// # Processor Type Data
383pub struct ProcessorTypeData {
384    /// Raw value
385    ///
386    /// _raw_ is most useful when _value_ is None.
387    /// This is most likely to occur when the standard was updated but
388    /// this library code has not been updated to match the current
389    /// standard.
390    pub raw: u8,
391    /// The contained [ProcessorType] value
392    pub value: ProcessorType,
393}
394
395impl fmt::Debug for ProcessorTypeData {
396    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
397        fmt.debug_struct(std::any::type_name::<ProcessorTypeData>())
398            .field("raw", &self.raw)
399            .field("value", &self.value)
400            .finish()
401    }
402}
403
404impl Serialize for ProcessorTypeData {
405    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
406    where
407        S: Serializer,
408    {
409        let mut state = serializer.serialize_struct("ProcessorTypeData", 2)?;
410        state.serialize_field("raw", &self.raw)?;
411        state.serialize_field("value", &self.value)?;
412        state.end()
413    }
414}
415
416impl fmt::Display for ProcessorTypeData {
417    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
418        match &self.value {
419            ProcessorType::None => write!(f, "{}", &self.raw),
420            _ => write!(f, "{:?}", &self.value),
421        }
422    }
423}
424
425impl Deref for ProcessorTypeData {
426    type Target = ProcessorType;
427
428    fn deref(&self) -> &Self::Target {
429        &self.value
430    }
431}
432
433/// # Processor Type
434#[derive(Serialize, Debug, PartialEq, Eq)]
435pub enum ProcessorType {
436    /// Other
437    Other,
438    /// Unknown
439    Unknown,
440    /// Central Processor
441    CentralProcessor,
442    /// Math Processor
443    MathProcessor,
444    /// DSP Processor
445    DspProcessor,
446    /// Video Processor
447    VideoProcessor,
448    /// A value unknown to this standard, check the raw value
449    None,
450}
451
452impl From<u8> for ProcessorTypeData {
453    fn from(raw: u8) -> Self {
454        ProcessorTypeData {
455            value: match raw {
456                0x01 => ProcessorType::Other,
457                0x02 => ProcessorType::Unknown,
458                0x03 => ProcessorType::CentralProcessor,
459                0x04 => ProcessorType::MathProcessor,
460                0x05 => ProcessorType::DspProcessor,
461                0x06 => ProcessorType::VideoProcessor,
462                _ => ProcessorType::None,
463            },
464            raw,
465        }
466    }
467}
468
469/// # Processor Family Data
470pub struct ProcessorFamilyData {
471    /// Raw value
472    ///
473    /// _raw_ is most useful when _value_ is None.
474    /// This is most likely to occur when the standard was updated but
475    /// this library code has not been updated to match the current
476    /// standard.
477    pub raw: u8,
478    /// The contained [ProcessorFamily] value
479    pub value: ProcessorFamily,
480}
481
482impl fmt::Debug for ProcessorFamilyData {
483    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
484        fmt.debug_struct(std::any::type_name::<ProcessorFamilyData>())
485            .field("raw", &self.raw)
486            .field("value", &self.value)
487            .finish()
488    }
489}
490
491impl Serialize for ProcessorFamilyData {
492    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
493    where
494        S: Serializer,
495    {
496        let mut state = serializer.serialize_struct("ProcessorFamilyData", 2)?;
497        state.serialize_field("raw", &self.raw)?;
498        state.serialize_field("value", &self.value)?;
499        state.end()
500    }
501}
502
503impl fmt::Display for ProcessorFamilyData {
504    /// Displays ProcessorFamily either by name or as a hex value if the name for the value is unknown.
505    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
506        match &self.value {
507            ProcessorFamily::None => write!(f, "{:#X}", &self.raw),
508            _ => write!(f, "{:?}", &self.value),
509        }
510    }
511}
512
513impl Deref for ProcessorFamilyData {
514    type Target = ProcessorFamily;
515
516    fn deref(&self) -> &Self::Target {
517        &self.value
518    }
519}
520
521impl From<u8> for ProcessorFamilyData {
522    fn from(raw: u8) -> Self {
523        ProcessorFamilyData {
524            value: ProcessorFamily::from(raw as u16),
525            raw,
526        }
527    }
528}
529
530/// # Processor Family Data #2
531pub struct ProcessorFamilyData2 {
532    /// Raw value
533    ///
534    /// _raw_ is most useful when _value_ is None.
535    /// This is most likely to occur when the standard was updated but
536    /// this library code has not been updated to match the current
537    /// standard.
538    pub raw: u16,
539    /// The contained [ProcessorFamily] value
540    pub value: ProcessorFamily,
541}
542
543impl fmt::Debug for ProcessorFamilyData2 {
544    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
545        fmt.debug_struct(std::any::type_name::<ProcessorFamilyData2>())
546            .field("raw", &self.raw)
547            .field("value", &self.value)
548            .finish()
549    }
550}
551
552impl Serialize for ProcessorFamilyData2 {
553    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
554    where
555        S: Serializer,
556    {
557        let mut state = serializer.serialize_struct("ProcessorFamilyData2", 2)?;
558        state.serialize_field("raw", &self.raw)?;
559        state.serialize_field("value", &self.value)?;
560        state.end()
561    }
562}
563
564impl fmt::Display for ProcessorFamilyData2 {
565    /// Displays ProcessorFamily either by name or as a hex value if the name for the value is unknown.
566    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
567        match &self.value {
568            ProcessorFamily::None => write!(f, "{:#X}", &self.raw),
569            _ => write!(f, "{:?}", &self.value),
570        }
571    }
572}
573
574impl Deref for ProcessorFamilyData2 {
575    type Target = ProcessorFamily;
576
577    fn deref(&self) -> &Self::Target {
578        &self.value
579    }
580}
581
582impl From<u16> for ProcessorFamilyData2 {
583    fn from(raw: u16) -> Self {
584        ProcessorFamilyData2 {
585            value: ProcessorFamily::from(raw),
586            raw,
587        }
588    }
589}
590/// # Processor Family
591#[derive(Serialize, Debug, PartialEq, Eq)]
592pub enum ProcessorFamily {
593    /// Other
594    Other,
595    /// Unknown
596    Unknown,
597    /// 8086
598    I8086,
599    /// 80286
600    I80286,
601    /// Intel386™ processor
602    Intel386Processor,
603    /// Intel486™ processor
604    Intel486Processor,
605    /// 8087
606    I8087,
607    /// 80287
608    I80287,
609    /// 80387
610    I80387,
611    /// 80487
612    I80487,
613    /// Intel® Pentium® processor
614    IntelPentiumProcessor,
615    /// Pentium® Pro processor
616    PentiumProProcessor,
617    /// Pentium® II processor
618    PentiumIIProcessor,
619    /// Pentium® processor with MMX™ technology
620    PentiumprocessorwithMMXtechnology,
621    /// Intel® Celeron® processor
622    IntelCeleronProcessor,
623    /// Pentium® II Xeon™ processor
624    PentiumIIXeonProcessor,
625    /// Pentium® III processor
626    PentiumIIIProcessor,
627    /// M1 Family
628    M1Family,
629    /// M2 Family
630    M2Family,
631    /// Intel® Celeron® M processor
632    IntelCeleronMProcessor,
633    /// Intel® Pentium® 4 HT processor
634    IntelPentium4HTProcessor,
635    /// AMD Duron™ Processor Family
636    AMDDuronProcessorFamily,
637    /// K5 Family
638    K5Family,
639    /// K6 Family
640    K6Family,
641    /// K6-2
642    K62,
643    /// K6-3
644    K63,
645    /// AMD Athlon™ Processor Family
646    AMDAthlonProcessorFamily,
647    /// AMD29000 Family
648    AMD29000Family,
649    /// K6-2+
650    K62Plus,
651    /// Power PC Family
652    PowerPCFamily,
653    /// Power PC 601
654    PowerPC601,
655    /// Power PC 603
656    PowerPC603,
657    /// Power PC 603+
658    PowerPC603Plus,
659    /// Power PC 604
660    PowerPC604,
661    /// Power PC 620
662    PowerPC620,
663    /// Power PC x704
664    PowerPCx704,
665    /// Power PC 750
666    PowerPC750,
667    /// Intel® Core™ Duo processor
668    IntelCoreDuoProcessor,
669    /// Intel® Core™ Duo mobile processor
670    IntelCoreDuomobileProcessor,
671    /// Intel® Core™ Solo mobile processor
672    IntelCoreSolomobileProcessor,
673    /// Intel® Atom™ processor
674    IntelAtomProcessor,
675    /// Intel® Core™ M processor
676    IntelCoreMProcessor,
677    /// Intel(R) Core(TM) m3 processor
678    IntelCorem3Processor,
679    /// Intel(R) Core(TM) m5 processor
680    IntelCorem5Processor,
681    /// Intel(R) Core(TM) m7 processor
682    IntelCorem7Processor,
683    /// Alpha Family
684    AlphaFamily,
685    /// Alpha 21064
686    Alpha21064,
687    /// Alpha 21066
688    Alpha21066,
689    /// Alpha 21164
690    Alpha21164,
691    /// Alpha 21164PC
692    Alpha21164PC,
693    /// Alpha 21164a
694    Alpha21164a,
695    /// Alpha 21264
696    Alpha21264,
697    /// Alpha 21364
698    Alpha21364,
699    /// AMD Turion™ II Ultra Dual-Core Mobile M Processor Family
700    AMDTurionIIUltraDualCoreMobileMProcessorFamily,
701    /// AMD Turion™ II Dual-Core Mobile M Processor Family
702    AMDTurionIIDualCoreMobileMProcessorFamily,
703    /// AMD Athlon™ II Dual-Core M Processor Family
704    AMDAthlonIIDualCoreMProcessorFamily,
705    /// AMD Opteron™ 6100 Series Processor
706    AMDOpteron6100SeriesProcessor,
707    /// AMD Opteron™ 4100 Series Processor
708    AMDOpteron4100SeriesProcessor,
709    /// AMD Opteron™ 6200 Series Processor
710    AMDOpteron6200SeriesProcessor,
711    /// AMD Opteron™ 4200 Series Processor
712    AMDOpteron4200SeriesProcessor,
713    /// AMD FX™ Series Processor
714    AMDFXSeriesProcessor,
715    /// MIPS Family
716    MIPSFamily,
717    /// MIPS R4000
718    MIPSR4000,
719    /// MIPS R4200
720    MIPSR4200,
721    /// MIPS R4400
722    MIPSR4400,
723    /// MIPS R4600
724    MIPSR4600,
725    /// MIPS R10000
726    MIPSR10000,
727    /// AMD C-Series Processor
728    AMDCSeriesProcessor,
729    /// AMD E-Series Processor
730    AMDESeriesProcessor,
731    /// AMD A-Series Processor
732    AMDASeriesProcessor,
733    /// AMD G-Series Processor
734    AMDGSeriesProcessor,
735    /// AMD Z-Series Processor
736    AMDZSeriesProcessor,
737    /// AMD R-Series Processor
738    AMDRSeriesProcessor,
739    /// AMD Opteron™ 4300 Series Processor
740    AMDOpteron4300SeriesProcessor,
741    /// AMD Opteron™ 6300 Series Processor
742    AMDOpteron6300SeriesProcessor,
743    /// AMD Opteron™ 3300 Series Processor
744    AMDOpteron3300SeriesProcessor,
745    /// AMD FirePro™ Series Processor
746    AMDFireProSeriesProcessor,
747    /// SPARC Family
748    SPARCFamily,
749    /// SuperSPARC
750    SuperSPARC,
751    /// microSPARC II
752    MicroSparcii,
753    /// microSPARC IIep
754    MicroSparciiep,
755    /// UltraSPARC
756    UltraSPARC,
757    /// UltraSPARC II
758    UltraSPARCII,
759    /// UltraSPARC Iii
760    UltraSPARCIii,
761    /// UltraSPARC III
762    UltraSPARCIII,
763    /// UltraSPARC IIIi
764    UltraSPARCIIIi,
765    /// 68040 Family
766    M68040Family,
767    /// 68xxx
768    M68xxx,
769    /// 68000
770    M68000,
771    /// 68010
772    M68010,
773    /// 68020
774    M68020,
775    /// 68030
776    M68030,
777    /// AMD Athlon(TM) X4 Quad-Core Processor Family
778    AMDAthlonX4QuadCoreProcessorFamily,
779    /// AMD Opteron(TM) X1000 Series Processor
780    AMDOpteronX1000SeriesProcessor,
781    /// AMD Opteron(TM) X2000 Series APU
782    AMDOpteronX2000SeriesAPU,
783    /// AMD Opteron(TM) A-Series Processor
784    AMDOpteronASeriesProcessor,
785    /// AMD Opteron(TM) X3000 Series APU
786    AMDOpteronX3000SeriesAPU,
787    /// AMD Zen Processor Family
788    AMDZenProcessorFamily,
789    /// Hobbit Family
790    HobbitFamily,
791    /// Crusoe™ TM5000 Family
792    CrusoeTM5000Family,
793    /// Crusoe™ TM3000 Family
794    CrusoeTM3000Family,
795    /// Efficeon™ TM8000 Family
796    EfficeonTM8000Family,
797    /// Weitek
798    Weitek,
799    /// Itanium™ processor
800    Itaniumprocessor,
801    /// AMD Athlon™ 64 Processor Family
802    AMDAthlon64ProcessorFamily,
803    /// AMD Opteron™ Processor Family
804    AMDOpteronProcessorFamily,
805    /// AMD Sempron™ Processor Family
806    AMDSempronProcessorFamily,
807    /// AMD Turion™ 64 Mobile Technology
808    AMDTurion64MobileTechnology,
809    /// Dual-Core AMD Opteron™ Processor Family
810    DualCoreAMDOpteronProcessorFamily,
811    /// AMD Athlon™ 64 X2 Dual-Core Processor Family
812    AMDAthlon64X2DualCoreProcessorFamily,
813    /// AMD Turion™ 64 X2 Mobile Technology
814    AMDTurion64X2MobileTechnology,
815    /// Quad-Core AMD Opteron™ Processor Family
816    QuadCoreAMDOpteronProcessorFamily,
817    /// Third-Generation AMD Opteron™ Processor Family
818    ThirdGenerationAMDOpteronProcessorFamily,
819    /// AMD Phenom™ FX Quad-Core Processor Family
820    AMDPhenomFXQuadCoreProcessorFamily,
821    /// AMD Phenom™ X4 Quad-Core Processor Family
822    AMDPhenomX4QuadCoreProcessorFamily,
823    /// AMD Phenom™ X2 Dual-Core Processor Family
824    AMDPhenomX2DualCoreProcessorFamily,
825    /// AMD Athlon™ X2 Dual-Core Processor Family
826    AMDAthlonX2DualCoreProcessorFamily,
827    /// PA-RISC Family
828    PARISCFamily,
829    /// PA-RISC 8500
830    PARISC8500,
831    /// PA-RISC 8000
832    PARISC8000,
833    /// PA-RISC 7300LC
834    PARISC7300LC,
835    /// PA-RISC 7200
836    PARISC7200,
837    /// PA-RISC 7100LC
838    PARISC7100LC,
839    /// PA-RISC 7100
840    PARISC7100,
841    /// V30 Family
842    V30Family,
843    /// Quad-Core Intel® Xeon® processor 3200 Series
844    QuadCoreIntelXeonProcessor3200Series,
845    /// Dual-Core Intel® Xeon® processor 3000 Series
846    DualCoreIntelXeonProcessor3000Series,
847    /// Quad-Core Intel® Xeon® processor 5300 Series
848    QuadCoreIntelXeonProcessor5300Series,
849    /// Dual-Core Intel® Xeon® processor 5100 Series
850    DualCoreIntelXeonProcessor5100Series,
851    /// Dual-Core Intel® Xeon® processor 5000 Series
852    DualCoreIntelXeonProcessor5000Series,
853    /// Dual-Core Intel® Xeon® processor LV
854    DualCoreIntelXeonProcessorLV,
855    /// Dual-Core Intel® Xeon® processor ULV
856    DualCoreIntelXeonProcessorULV,
857    /// Dual-Core Intel® Xeon® processor 7100 Series
858    DualCoreIntelXeonProcessor7100Series,
859    /// Quad-Core Intel® Xeon® processor 5400 Series
860    QuadCoreIntelXeonProcessor5400Series,
861    /// Quad-Core Intel® Xeon® processor
862    QuadCoreIntelXeonProcessor,
863    /// Dual-Core Intel® Xeon® processor 5200 Series
864    DualCoreIntelXeonProcessor5200Series,
865    /// Dual-Core Intel® Xeon® processor 7200 Series
866    DualCoreIntelXeonProcessor7200Series,
867    /// Quad-Core Intel® Xeon® processor 7300 Series
868    QuadCoreIntelXeonProcessor7300Series,
869    /// Quad-Core Intel® Xeon® processor 7400 Series
870    QuadCoreIntelXeonProcessor7400Series,
871    /// Multi-Core Intel® Xeon® processor 7400 Series
872    MultiCoreIntelXeonProcessor7400Series,
873    /// Pentium® III Xeon™ processor
874    PentiumIIIXeonProcessor,
875    /// Pentium® III Processor with Intel® SpeedStep™ Technology
876    PentiumIIIProcessorwithIntelSpeedStepTechnology,
877    /// Pentium® 4 Processor
878    Pentium4Processor,
879    /// Intel® Xeon® processor
880    IntelXeonProcessor,
881    /// AS400 Family
882    AS400Family,
883    /// Intel® Xeon™ processor MP
884    IntelXeonProcessorMP,
885    /// AMD Athlon™ XP Processor Family
886    AMDAthlonXPProcessorFamily,
887    /// AMD Athlon™ MP Processor Family
888    AMDAthlonMPProcessorFamily,
889    /// Intel® Itanium® 2 processor
890    IntelItanium2Processor,
891    /// Intel® Pentium® M processor
892    IntelPentiumMProcessor,
893    /// Intel® Celeron® D processor
894    IntelCeleronDProcessor,
895    /// Intel® Pentium® D processor
896    IntelPentiumDProcessor,
897    /// Intel® Pentium® Processor Extreme Edition
898    IntelPentiumProcessorExtremeEdition,
899    /// Intel® Core™ Solo Processor
900    IntelCoreSoloProcessor,
901    /// Intel® Core™ 2 Duo Processor
902    IntelCore2DuoProcessor,
903    /// Intel® Core™ 2 Solo processor
904    IntelCore2SoloProcessor,
905    /// Intel® Core™ 2 Extreme processor
906    IntelCore2ExtremeProcessor,
907    /// Intel® Core™ 2 Quad processor
908    IntelCore2QuadProcessor,
909    /// Intel® Core™ 2 Extreme mobile processor
910    IntelCore2ExtremeMobileProcessor,
911    /// Intel® Core™ 2 Duo mobile processor
912    IntelCore2DuoMobileProcessor,
913    /// Intel® Core™ 2 Solo mobile processor
914    IntelCore2SoloMobileProcessor,
915    /// Intel® Core™ i7 processor
916    IntelCorei7Processor,
917    /// Dual-Core Intel® Celeron® processor
918    DualCoreIntelCeleronProcessor,
919    /// IBM390 Family
920    IBM390Family,
921    /// G4
922    G4,
923    /// G5
924    G5,
925    /// ESA/390 G6
926    ESA390G6,
927    /// z/Architecture base
928    ZArchitecturebase,
929    /// Intel® Core™ i5 processor
930    IntelCorei5processor,
931    /// Intel® Core™ i3 processor
932    IntelCorei3processor,
933    /// Intel® Core™ i9 processor
934    IntelCorei9processor,
935    /// VIA C7™-M Processor Family
936    VIAC7MProcessorFamily,
937    /// VIA C7™-D Processor Family
938    VIAC7DProcessorFamily,
939    /// VIA C7™ Processor Family
940    VIAC7ProcessorFamily,
941    /// VIA Eden™ Processor Family
942    VIAEdenProcessorFamily,
943    /// Multi-Core Intel® Xeon® processor
944    MultiCoreIntelXeonProcessor,
945    /// Dual-Core Intel® Xeon® processor 3xxx Series
946    DualCoreIntelXeonProcessor3xxxSeries,
947    /// Quad-Core Intel® Xeon® processor 3xxx Series
948    QuadCoreIntelXeonProcessor3xxxSeries,
949    /// VIA Nano™ Processor Family
950    VIANanoProcessorFamily,
951    /// Dual-Core Intel® Xeon® processor 5xxx Series
952    DualCoreIntelXeonProcessor5xxxSeries,
953    /// Quad-Core Intel® Xeon® processor 5xxx Series
954    QuadCoreIntelXeonProcessor5xxxSeries,
955    /// Dual-Core Intel® Xeon® processor 7xxx Series
956    DualCoreIntelXeonProcessor7xxxSeries,
957    /// Quad-Core Intel® Xeon® processor 7xxx Series
958    QuadCoreIntelXeonProcessor7xxxSeries,
959    /// Multi-Core Intel® Xeon® processor 7xxx Series
960    MultiCoreIntelXeonProcessor7xxxSeries,
961    /// Multi-Core Intel® Xeon® processor 3400 Series
962    MultiCoreIntelXeonProcessor3400Series,
963    /// AMD Opteron™ 3000 Series Processor
964    AMDOpteron3000SeriesProcessor,
965    /// AMD Sempron™ II Processor
966    AMDSempronIIProcessor,
967    /// Embedded AMD Opteron™ Quad-Core Processor Family
968    EmbeddedAMDOpteronQuadCoreProcessorFamily,
969    /// AMD Phenom™ Triple-Core Processor Family
970    AMDPhenomTripleCoreProcessorFamily,
971    /// AMD Turion™ Ultra Dual-Core Mobile Processor Family
972    AMDTurionUltraDualCoreMobileProcessorFamily,
973    /// AMD Turion™ Dual-Core Mobile Processor Family
974    AMDTurionDualCoreMobileProcessorFamily,
975    /// AMD Athlon™ Dual-Core Processor Family
976    AMDAthlonDualCoreProcessorFamily,
977    /// AMD Sempron™ SI Processor Family
978    AMDSempronSIProcessorFamily,
979    /// AMD Phenom™ II Processor Family
980    AMDPhenomIIProcessorFamily,
981    /// AMD Athlon™ II Processor Family
982    AMDAthlonIIProcessorFamily,
983    /// Six-Core AMD Opteron™ Processor Family
984    SixCoreAMDOpteronProcessorFamily,
985    /// AMD Sempron™ M Processor Family
986    AMDSempronMProcessorFamily,
987    /// i860
988    I860,
989    /// i960
990    I960,
991    /// Indicator to obtain the processor family from the 'processor_family_2' field
992    SeeProcessorFamily2,
993    /// ARMv7
994    ARMv7,
995    /// ARMv8
996    ARMv8,
997    /// ARMv9
998    ARMv9,
999    /// SH-3
1000    SH3,
1001    /// SH-4
1002    SH4,
1003    /// ARM
1004    ARM,
1005    /// StrongARM
1006    StrongARM,
1007    /// 6x86
1008    Cyrix6x86,
1009    /// MediaGX
1010    MediaGX,
1011    /// MII
1012    MII,
1013    /// WinChip
1014    WinChip,
1015    /// DSP
1016    DSP,
1017    /// Video Processor
1018    VideoProcessor,
1019    /// RISC-V RV32
1020    RISCVRV32,
1021    /// RISC-V RV64
1022    RISCVRV64,
1023    /// RISC-V RV128
1024    RISCVRV128,
1025    /// LoongArch
1026    LoongArch,
1027    /// Loongson™ 1 Processor Family
1028    Longsoon1ProcessorFamily,
1029    /// Loongson™ 2 Processor Family
1030    Longsoon2ProcessorFamily,
1031    /// Loongson™ 3 Processor Family
1032    Longsoon3ProcessorFamily,
1033    /// Loongson™ 2K Processor Family
1034    Longsoon2KProcessorFamily,
1035    /// Loongson™ 3A Processor Family
1036    Longsoon3AProcessorFamily,
1037    /// Loongson™ 3B Processor Family
1038    Longsoon3BProcessorFamily,
1039    /// Loongson™ 3C Processor Family
1040    Longsoon3CProcessorFamily,
1041    /// Loongson™ 3D Processor Family
1042    Longsoon3DProcessorFamily,
1043    /// Loongson™ 3E Processor Family
1044    Longsoon3EProcessorFamily,
1045    /// Dual-Core Loongson™ 2K Processor 2xxx Series
1046    DualCoreLoongson2KProcessor2xxxSeries,
1047    /// Quad-Core Loongson™ 3A Processor 5xxx Series
1048    QuadCoreLoongson3AProcessor5xxxSeries,
1049    /// Multi-Core Loongson™ 3A Processor 5xxx Series
1050    MultiCoreLoongson3AProcessor5xxxSeries,
1051    /// Quad-Core Loongson™ 3B Processor 5xxx Series
1052    QuadCoreLoongson3BProcessor5xxxSeries,
1053    /// Multi-Core Loongson™ 3B Processor 5xxx Series
1054    MultiCoreLoongson3BProcessor5xxxSeries,
1055    /// Multi-Core Loongson™ 3C Processor 5xxx Series
1056    MultiCoreLoongson3CProcessor5xxxSeries,
1057    /// Multi-Core Loongson™ 3D Processor 5xxx Series
1058    MultiCoreLoongson3DProcessor5xxxSeries,
1059    /// A value unknown to this standard, check the raw value
1060    None,
1061}
1062
1063impl From<u16> for ProcessorFamily {
1064    fn from(raw: u16) -> Self {
1065        match raw {
1066            0x01 => ProcessorFamily::Other,
1067            0x02 => ProcessorFamily::Unknown,
1068            0x03 => ProcessorFamily::I8086,
1069            0x04 => ProcessorFamily::I80286,
1070            0x05 => ProcessorFamily::Intel386Processor,
1071            0x06 => ProcessorFamily::Intel486Processor,
1072            0x07 => ProcessorFamily::I8087,
1073            0x08 => ProcessorFamily::I80287,
1074            0x09 => ProcessorFamily::I80387,
1075            0x0A => ProcessorFamily::I80487,
1076            0x0B => ProcessorFamily::IntelPentiumProcessor,
1077            0x0C => ProcessorFamily::PentiumProProcessor,
1078            0x0D => ProcessorFamily::PentiumIIProcessor,
1079            0x0E => ProcessorFamily::PentiumprocessorwithMMXtechnology,
1080            0x0F => ProcessorFamily::IntelCeleronProcessor,
1081            0x10 => ProcessorFamily::PentiumIIXeonProcessor,
1082            0x11 => ProcessorFamily::PentiumIIIProcessor,
1083            0x12 => ProcessorFamily::M1Family,
1084            0x13 => ProcessorFamily::M2Family,
1085            0x14 => ProcessorFamily::IntelCeleronMProcessor,
1086            0x15 => ProcessorFamily::IntelPentium4HTProcessor,
1087            0x18 => ProcessorFamily::AMDDuronProcessorFamily,
1088            0x19 => ProcessorFamily::K5Family,
1089            0x1A => ProcessorFamily::K6Family,
1090            0x1B => ProcessorFamily::K62,
1091            0x1C => ProcessorFamily::K63,
1092            0x1D => ProcessorFamily::AMDAthlonProcessorFamily,
1093            0x1E => ProcessorFamily::AMD29000Family,
1094            0x1F => ProcessorFamily::K62Plus,
1095            0x20 => ProcessorFamily::PowerPCFamily,
1096            0x21 => ProcessorFamily::PowerPC601,
1097            0x22 => ProcessorFamily::PowerPC603,
1098            0x23 => ProcessorFamily::PowerPC603Plus,
1099            0x24 => ProcessorFamily::PowerPC604,
1100            0x25 => ProcessorFamily::PowerPC620,
1101            0x26 => ProcessorFamily::PowerPCx704,
1102            0x27 => ProcessorFamily::PowerPC750,
1103            0x28 => ProcessorFamily::IntelCoreDuoProcessor,
1104            0x29 => ProcessorFamily::IntelCoreDuomobileProcessor,
1105            0x2A => ProcessorFamily::IntelCoreSolomobileProcessor,
1106            0x2B => ProcessorFamily::IntelAtomProcessor,
1107            0x2C => ProcessorFamily::IntelCoreMProcessor,
1108            0x2D => ProcessorFamily::IntelCorem3Processor,
1109            0x2E => ProcessorFamily::IntelCorem5Processor,
1110            0x2F => ProcessorFamily::IntelCorem7Processor,
1111            0x30 => ProcessorFamily::AlphaFamily,
1112            0x31 => ProcessorFamily::Alpha21064,
1113            0x32 => ProcessorFamily::Alpha21066,
1114            0x33 => ProcessorFamily::Alpha21164,
1115            0x34 => ProcessorFamily::Alpha21164PC,
1116            0x35 => ProcessorFamily::Alpha21164a,
1117            0x36 => ProcessorFamily::Alpha21264,
1118            0x37 => ProcessorFamily::Alpha21364,
1119            0x38 => ProcessorFamily::AMDTurionIIUltraDualCoreMobileMProcessorFamily,
1120            0x39 => ProcessorFamily::AMDTurionIIDualCoreMobileMProcessorFamily,
1121            0x3A => ProcessorFamily::AMDAthlonIIDualCoreMProcessorFamily,
1122            0x3B => ProcessorFamily::AMDOpteron6100SeriesProcessor,
1123            0x3C => ProcessorFamily::AMDOpteron4100SeriesProcessor,
1124            0x3D => ProcessorFamily::AMDOpteron6200SeriesProcessor,
1125            0x3E => ProcessorFamily::AMDOpteron4200SeriesProcessor,
1126            0x3F => ProcessorFamily::AMDFXSeriesProcessor,
1127            0x40 => ProcessorFamily::MIPSFamily,
1128            0x41 => ProcessorFamily::MIPSR4000,
1129            0x42 => ProcessorFamily::MIPSR4200,
1130            0x43 => ProcessorFamily::MIPSR4400,
1131            0x44 => ProcessorFamily::MIPSR4600,
1132            0x45 => ProcessorFamily::MIPSR10000,
1133            0x46 => ProcessorFamily::AMDCSeriesProcessor,
1134            0x47 => ProcessorFamily::AMDESeriesProcessor,
1135            0x48 => ProcessorFamily::AMDASeriesProcessor,
1136            0x49 => ProcessorFamily::AMDGSeriesProcessor,
1137            0x4A => ProcessorFamily::AMDZSeriesProcessor,
1138            0x4B => ProcessorFamily::AMDRSeriesProcessor,
1139            0x4C => ProcessorFamily::AMDOpteron4300SeriesProcessor,
1140            0x4D => ProcessorFamily::AMDOpteron6300SeriesProcessor,
1141            0x4E => ProcessorFamily::AMDOpteron3300SeriesProcessor,
1142            0x4F => ProcessorFamily::AMDFireProSeriesProcessor,
1143            0x50 => ProcessorFamily::SPARCFamily,
1144            0x51 => ProcessorFamily::SuperSPARC,
1145            0x52 => ProcessorFamily::MicroSparcii,
1146            0x53 => ProcessorFamily::MicroSparciiep,
1147            0x54 => ProcessorFamily::UltraSPARC,
1148            0x55 => ProcessorFamily::UltraSPARCII,
1149            0x56 => ProcessorFamily::UltraSPARCIii,
1150            0x57 => ProcessorFamily::UltraSPARCIII,
1151            0x58 => ProcessorFamily::UltraSPARCIIIi,
1152            0x60 => ProcessorFamily::M68040Family,
1153            0x61 => ProcessorFamily::M68xxx,
1154            0x62 => ProcessorFamily::M68000,
1155            0x63 => ProcessorFamily::M68010,
1156            0x64 => ProcessorFamily::M68020,
1157            0x65 => ProcessorFamily::M68030,
1158            0x66 => ProcessorFamily::AMDAthlonX4QuadCoreProcessorFamily,
1159            0x67 => ProcessorFamily::AMDOpteronX1000SeriesProcessor,
1160            0x68 => ProcessorFamily::AMDOpteronX2000SeriesAPU,
1161            0x69 => ProcessorFamily::AMDOpteronASeriesProcessor,
1162            0x6A => ProcessorFamily::AMDOpteronX3000SeriesAPU,
1163            0x6B => ProcessorFamily::AMDZenProcessorFamily,
1164            0x70 => ProcessorFamily::HobbitFamily,
1165            0x78 => ProcessorFamily::CrusoeTM5000Family,
1166            0x79 => ProcessorFamily::CrusoeTM3000Family,
1167            0x7A => ProcessorFamily::EfficeonTM8000Family,
1168            0x80 => ProcessorFamily::Weitek,
1169            0x82 => ProcessorFamily::Itaniumprocessor,
1170            0x83 => ProcessorFamily::AMDAthlon64ProcessorFamily,
1171            0x84 => ProcessorFamily::AMDOpteronProcessorFamily,
1172            0x85 => ProcessorFamily::AMDSempronProcessorFamily,
1173            0x86 => ProcessorFamily::AMDTurion64MobileTechnology,
1174            0x87 => ProcessorFamily::DualCoreAMDOpteronProcessorFamily,
1175            0x88 => ProcessorFamily::AMDAthlon64X2DualCoreProcessorFamily,
1176            0x89 => ProcessorFamily::AMDTurion64X2MobileTechnology,
1177            0x8A => ProcessorFamily::QuadCoreAMDOpteronProcessorFamily,
1178            0x8B => ProcessorFamily::ThirdGenerationAMDOpteronProcessorFamily,
1179            0x8C => ProcessorFamily::AMDPhenomFXQuadCoreProcessorFamily,
1180            0x8D => ProcessorFamily::AMDPhenomX4QuadCoreProcessorFamily,
1181            0x8E => ProcessorFamily::AMDPhenomX2DualCoreProcessorFamily,
1182            0x8F => ProcessorFamily::AMDAthlonX2DualCoreProcessorFamily,
1183            0x90 => ProcessorFamily::PARISCFamily,
1184            0x91 => ProcessorFamily::PARISC8500,
1185            0x92 => ProcessorFamily::PARISC8000,
1186            0x93 => ProcessorFamily::PARISC7300LC,
1187            0x94 => ProcessorFamily::PARISC7200,
1188            0x95 => ProcessorFamily::PARISC7100LC,
1189            0x96 => ProcessorFamily::PARISC7100,
1190            0xA0 => ProcessorFamily::V30Family,
1191            0xA1 => ProcessorFamily::QuadCoreIntelXeonProcessor3200Series,
1192            0xA2 => ProcessorFamily::DualCoreIntelXeonProcessor3000Series,
1193            0xA3 => ProcessorFamily::QuadCoreIntelXeonProcessor5300Series,
1194            0xA4 => ProcessorFamily::DualCoreIntelXeonProcessor5100Series,
1195            0xA5 => ProcessorFamily::DualCoreIntelXeonProcessor5000Series,
1196            0xA6 => ProcessorFamily::DualCoreIntelXeonProcessorLV,
1197            0xA7 => ProcessorFamily::DualCoreIntelXeonProcessorULV,
1198            0xA8 => ProcessorFamily::DualCoreIntelXeonProcessor7100Series,
1199            0xA9 => ProcessorFamily::QuadCoreIntelXeonProcessor5400Series,
1200            0xAA => ProcessorFamily::QuadCoreIntelXeonProcessor,
1201            0xAB => ProcessorFamily::DualCoreIntelXeonProcessor5200Series,
1202            0xAC => ProcessorFamily::DualCoreIntelXeonProcessor7200Series,
1203            0xAD => ProcessorFamily::QuadCoreIntelXeonProcessor7300Series,
1204            0xAE => ProcessorFamily::QuadCoreIntelXeonProcessor7400Series,
1205            0xAF => ProcessorFamily::MultiCoreIntelXeonProcessor7400Series,
1206            0xB0 => ProcessorFamily::PentiumIIIXeonProcessor,
1207            0xB1 => ProcessorFamily::PentiumIIIProcessorwithIntelSpeedStepTechnology,
1208            0xB2 => ProcessorFamily::Pentium4Processor,
1209            0xB3 => ProcessorFamily::IntelXeonProcessor,
1210            0xB4 => ProcessorFamily::AS400Family,
1211            0xB5 => ProcessorFamily::IntelXeonProcessorMP,
1212            0xB6 => ProcessorFamily::AMDAthlonXPProcessorFamily,
1213            0xB7 => ProcessorFamily::AMDAthlonMPProcessorFamily,
1214            0xB8 => ProcessorFamily::IntelItanium2Processor,
1215            0xB9 => ProcessorFamily::IntelPentiumMProcessor,
1216            0xBA => ProcessorFamily::IntelCeleronDProcessor,
1217            0xBB => ProcessorFamily::IntelPentiumDProcessor,
1218            0xBC => ProcessorFamily::IntelPentiumProcessorExtremeEdition,
1219            0xBD => ProcessorFamily::IntelCoreSoloProcessor,
1220            0xBF => ProcessorFamily::IntelCore2DuoProcessor,
1221            0xC0 => ProcessorFamily::IntelCore2SoloProcessor,
1222            0xC1 => ProcessorFamily::IntelCore2ExtremeProcessor,
1223            0xC2 => ProcessorFamily::IntelCore2QuadProcessor,
1224            0xC3 => ProcessorFamily::IntelCore2ExtremeMobileProcessor,
1225            0xC4 => ProcessorFamily::IntelCore2DuoMobileProcessor,
1226            0xC5 => ProcessorFamily::IntelCore2SoloMobileProcessor,
1227            0xC6 => ProcessorFamily::IntelCorei7Processor,
1228            0xC7 => ProcessorFamily::DualCoreIntelCeleronProcessor,
1229            0xC8 => ProcessorFamily::IBM390Family,
1230            0xC9 => ProcessorFamily::G4,
1231            0xCA => ProcessorFamily::G5,
1232            0xCB => ProcessorFamily::ESA390G6,
1233            0xCC => ProcessorFamily::ZArchitecturebase,
1234            0xCD => ProcessorFamily::IntelCorei5processor,
1235            0xCE => ProcessorFamily::IntelCorei3processor,
1236            0xCF => ProcessorFamily::IntelCorei9processor,
1237            0xD2 => ProcessorFamily::VIAC7MProcessorFamily,
1238            0xD3 => ProcessorFamily::VIAC7DProcessorFamily,
1239            0xD4 => ProcessorFamily::VIAC7ProcessorFamily,
1240            0xD5 => ProcessorFamily::VIAEdenProcessorFamily,
1241            0xD6 => ProcessorFamily::MultiCoreIntelXeonProcessor,
1242            0xD7 => ProcessorFamily::DualCoreIntelXeonProcessor3xxxSeries,
1243            0xD8 => ProcessorFamily::QuadCoreIntelXeonProcessor3xxxSeries,
1244            0xD9 => ProcessorFamily::VIANanoProcessorFamily,
1245            0xDA => ProcessorFamily::DualCoreIntelXeonProcessor5xxxSeries,
1246            0xDB => ProcessorFamily::QuadCoreIntelXeonProcessor5xxxSeries,
1247            0xDD => ProcessorFamily::DualCoreIntelXeonProcessor7xxxSeries,
1248            0xDE => ProcessorFamily::QuadCoreIntelXeonProcessor7xxxSeries,
1249            0xDF => ProcessorFamily::MultiCoreIntelXeonProcessor7xxxSeries,
1250            0xE0 => ProcessorFamily::MultiCoreIntelXeonProcessor3400Series,
1251            0xE4 => ProcessorFamily::AMDOpteron3000SeriesProcessor,
1252            0xE5 => ProcessorFamily::AMDSempronIIProcessor,
1253            0xE6 => ProcessorFamily::EmbeddedAMDOpteronQuadCoreProcessorFamily,
1254            0xE7 => ProcessorFamily::AMDPhenomTripleCoreProcessorFamily,
1255            0xE8 => ProcessorFamily::AMDTurionUltraDualCoreMobileProcessorFamily,
1256            0xE9 => ProcessorFamily::AMDTurionDualCoreMobileProcessorFamily,
1257            0xEA => ProcessorFamily::AMDAthlonDualCoreProcessorFamily,
1258            0xEB => ProcessorFamily::AMDSempronSIProcessorFamily,
1259            0xEC => ProcessorFamily::AMDPhenomIIProcessorFamily,
1260            0xED => ProcessorFamily::AMDAthlonIIProcessorFamily,
1261            0xEE => ProcessorFamily::SixCoreAMDOpteronProcessorFamily,
1262            0xEF => ProcessorFamily::AMDSempronMProcessorFamily,
1263            0xFA => ProcessorFamily::I860,
1264            0xFB => ProcessorFamily::I960,
1265            0xFE => ProcessorFamily::SeeProcessorFamily2,
1266            0x100 => ProcessorFamily::ARMv7,
1267            0x101 => ProcessorFamily::ARMv8,
1268            0x102 => ProcessorFamily::ARMv9,
1269            0x104 => ProcessorFamily::SH3,
1270            0x105 => ProcessorFamily::SH4,
1271            0x118 => ProcessorFamily::ARM,
1272            0x119 => ProcessorFamily::StrongARM,
1273            0x12C => ProcessorFamily::Cyrix6x86,
1274            0x12D => ProcessorFamily::MediaGX,
1275            0x12E => ProcessorFamily::MII,
1276            0x140 => ProcessorFamily::WinChip,
1277            0x15E => ProcessorFamily::DSP,
1278            0x1F4 => ProcessorFamily::VideoProcessor,
1279            0x200 => ProcessorFamily::RISCVRV32,
1280            0x201 => ProcessorFamily::RISCVRV64,
1281            0x202 => ProcessorFamily::RISCVRV128,
1282            0x258 => ProcessorFamily::LoongArch,
1283            0x259 => ProcessorFamily::Longsoon1ProcessorFamily,
1284            0x25A => ProcessorFamily::Longsoon2ProcessorFamily,
1285            0x25B => ProcessorFamily::Longsoon3ProcessorFamily,
1286            0x25C => ProcessorFamily::Longsoon2KProcessorFamily,
1287            0x25D => ProcessorFamily::Longsoon3AProcessorFamily,
1288            0x25E => ProcessorFamily::Longsoon3BProcessorFamily,
1289            0x25F => ProcessorFamily::Longsoon3CProcessorFamily,
1290            0x260 => ProcessorFamily::Longsoon3DProcessorFamily,
1291            0x261 => ProcessorFamily::Longsoon3EProcessorFamily,
1292            0x262 => ProcessorFamily::DualCoreLoongson2KProcessor2xxxSeries,
1293            0x26C => ProcessorFamily::QuadCoreLoongson3AProcessor5xxxSeries,
1294            0x26D => ProcessorFamily::MultiCoreLoongson3AProcessor5xxxSeries,
1295            0x26E => ProcessorFamily::QuadCoreLoongson3BProcessor5xxxSeries,
1296            0x26F => ProcessorFamily::MultiCoreLoongson3BProcessor5xxxSeries,
1297            0x270 => ProcessorFamily::MultiCoreLoongson3CProcessor5xxxSeries,
1298            0x271 => ProcessorFamily::MultiCoreLoongson3DProcessor5xxxSeries,
1299            _ => ProcessorFamily::None,
1300        }
1301    }
1302}
1303
1304/// #
1305pub struct ProcessorUpgradeData {
1306    /// Raw value
1307    ///
1308    /// _raw_ is most useful when _value_ is None.
1309    /// This is most likely to occur when the standard was updated but
1310    /// this library code has not been updated to match the current
1311    /// standard.
1312    pub raw: u8,
1313    /// The contained [ProcessorUpgrade] value
1314    pub value: ProcessorUpgrade,
1315}
1316
1317impl fmt::Debug for ProcessorUpgradeData {
1318    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
1319        fmt.debug_struct(std::any::type_name::<ProcessorUpgradeData>())
1320            .field("raw", &self.raw)
1321            .field("value", &self.value)
1322            .finish()
1323    }
1324}
1325
1326impl Serialize for ProcessorUpgradeData {
1327    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
1328    where
1329        S: Serializer,
1330    {
1331        let mut state = serializer.serialize_struct("ProcessorUpgradeData", 2)?;
1332        state.serialize_field("raw", &self.raw)?;
1333        state.serialize_field("value", &self.value)?;
1334        state.end()
1335    }
1336}
1337
1338impl Deref for ProcessorUpgradeData {
1339    type Target = ProcessorUpgrade;
1340
1341    fn deref(&self) -> &Self::Target {
1342        &self.value
1343    }
1344}
1345
1346/// #
1347#[derive(Serialize, Debug, PartialEq, Eq)]
1348pub enum ProcessorUpgrade {
1349    /// Other
1350    Other,
1351    /// Unknown
1352    Unknown,
1353    /// Daughter Board
1354    DaughterBoard,
1355    /// ZIF Socket
1356    ZIFSocket,
1357    /// Replaceable Piggy Back
1358    ReplaceablePiggyBack,
1359    /// No Upgrade
1360    NoUpgrade,
1361    /// LIF Socket
1362    LIFSocket,
1363    /// Slot 1
1364    Slot1,
1365    /// Slot 2
1366    Slot2,
1367    /// 370-pin socket
1368    PinSocket370,
1369    /// Slot A
1370    SlotA,
1371    /// Slot M
1372    SlotM,
1373    /// Socket 423
1374    Socket423,
1375    /// Socket A (Socket 462)
1376    SocketASocket462,
1377    /// Socket 478
1378    Socket478,
1379    /// Socket 754
1380    Socket754,
1381    /// Socket 940
1382    Socket940,
1383    /// Socket 939
1384    Socket939,
1385    /// Socket mPGA604
1386    SocketmPGA604,
1387    /// Socket LGA771
1388    SocketLGA771,
1389    /// Socket LGA775
1390    SocketLGA775,
1391    /// Socket S1
1392    SocketS1,
1393    /// Socket AM2
1394    SocketAM2,
1395    /// Socket F (1207)
1396    SocketF1207,
1397    /// Socket LGA1366
1398    SocketLGA1366,
1399    /// Socket G34
1400    SocketG34,
1401    /// Socket AM3
1402    SocketAM3,
1403    /// Socket C32
1404    SocketC32,
1405    /// Socket LGA1156
1406    SocketLGA1156,
1407    /// Socket LGA1567
1408    SocketLGA1567,
1409    /// Socket PGA988A
1410    SocketPGA988A,
1411    /// Socket BGA1288
1412    SocketBGA1288,
1413    /// Socket rPGA988B
1414    SocketrPGA988B,
1415    /// Socket BGA1023
1416    SocketBGA1023,
1417    /// Socket BGA1224
1418    SocketBGA1224,
1419    /// Socket LGA1155
1420    SocketLGA1155,
1421    /// Socket LGA1356
1422    SocketLGA1356,
1423    /// Socket LGA2011
1424    SocketLGA2011,
1425    /// Socket FS1
1426    SocketFS1,
1427    /// Socket FS2
1428    SocketFS2,
1429    /// Socket FM1
1430    SocketFM1,
1431    /// Socket FM2
1432    SocketFM2,
1433    /// Socket LGA2011-3
1434    SocketLGA2011_3,
1435    /// Socket LGA1356-3
1436    SocketLGA1356_3,
1437    /// Socket LGA1150
1438    SocketLGA1150,
1439    /// Socket BGA1168
1440    SocketBGA1168,
1441    /// Socket BGA1234
1442    SocketBGA1234,
1443    /// Socket BGA1364
1444    SocketBGA1364,
1445    /// Socket AM4
1446    SocketAM4,
1447    /// Socket LGA1151
1448    SocketLGA1151,
1449    /// Socket BGA1356
1450    SocketBGA1356,
1451    /// Socket BGA1440
1452    SocketBGA1440,
1453    /// Socket BGA1515
1454    SocketBGA1515,
1455    /// Socket LGA3647-1
1456    SocketLGA3647_1,
1457    /// Socket SP3
1458    SocketSP3,
1459    /// Socket SP3r2
1460    SocketSP3r23,
1461    /// Socket LGA2066
1462    SocketLGA2066,
1463    /// Socket BGA1392
1464    SocketBGA1392,
1465    /// Socket BGA1510
1466    SocketBGA1510,
1467    /// Socket BGA1528
1468    SocketBGA1528,
1469    /// Socket LGA4189
1470    SocketLGA4189,
1471    /// Socket LGA1200
1472    SocketLGA1200,
1473    /// Socket LGA4677
1474    SocketLGA4677,
1475    /// Socket LGA1700
1476    SocketLGA1700,
1477    /// Socket BGA1744
1478    SocketBGA1744,
1479    /// Socket BGA1781
1480    SocketBGA1781,
1481    /// Socket BGA1211
1482    SocketBGA1211,
1483    /// Socket BGA2422
1484    SocketBGA2422,
1485    /// Socket LGA1211
1486    SocketLGA1211,
1487    /// Socket LGA2422
1488    SocketLGA2422,
1489    /// Socket LGA5773
1490    SocketLGA5773,
1491    /// Socket BGA5773
1492    SocketBGA5773,
1493    /// Socket AM5
1494    SocketAM5,
1495    /// Socket SP5
1496    SocketSP5,
1497    /// Socket SP6
1498    SocketSP6,
1499    /// Socket BGA883
1500    SocketBGA883,
1501    /// Socket BGA1190
1502    SocketBGA1190,
1503    /// Socket BGA4129
1504    SocketBGA4129,
1505    /// Socket LGA4710
1506    SocketLGA4710,
1507    /// Socket LGA7529
1508    SocketLGA7529,
1509    /// A value unknown to this standard, check the raw value
1510    None,
1511}
1512
1513impl From<u8> for ProcessorUpgradeData {
1514    fn from(raw: u8) -> Self {
1515        ProcessorUpgradeData {
1516            value: match raw {
1517                0x01 => ProcessorUpgrade::Other,
1518                0x02 => ProcessorUpgrade::Unknown,
1519                0x03 => ProcessorUpgrade::DaughterBoard,
1520                0x04 => ProcessorUpgrade::ZIFSocket,
1521                0x05 => ProcessorUpgrade::ReplaceablePiggyBack,
1522                0x06 => ProcessorUpgrade::NoUpgrade,
1523                0x07 => ProcessorUpgrade::LIFSocket,
1524                0x08 => ProcessorUpgrade::Slot1,
1525                0x09 => ProcessorUpgrade::Slot2,
1526                0x0A => ProcessorUpgrade::PinSocket370,
1527                0x0B => ProcessorUpgrade::SlotA,
1528                0x0C => ProcessorUpgrade::SlotM,
1529                0x0D => ProcessorUpgrade::Socket423,
1530                0x0E => ProcessorUpgrade::SocketASocket462,
1531                0x0F => ProcessorUpgrade::Socket478,
1532                0x10 => ProcessorUpgrade::Socket754,
1533                0x11 => ProcessorUpgrade::Socket940,
1534                0x12 => ProcessorUpgrade::Socket939,
1535                0x13 => ProcessorUpgrade::SocketmPGA604,
1536                0x14 => ProcessorUpgrade::SocketLGA771,
1537                0x15 => ProcessorUpgrade::SocketLGA775,
1538                0x16 => ProcessorUpgrade::SocketS1,
1539                0x17 => ProcessorUpgrade::SocketAM2,
1540                0x18 => ProcessorUpgrade::SocketF1207,
1541                0x19 => ProcessorUpgrade::SocketLGA1366,
1542                0x1A => ProcessorUpgrade::SocketG34,
1543                0x1B => ProcessorUpgrade::SocketAM3,
1544                0x1C => ProcessorUpgrade::SocketC32,
1545                0x1D => ProcessorUpgrade::SocketLGA1156,
1546                0x1E => ProcessorUpgrade::SocketLGA1567,
1547                0x1F => ProcessorUpgrade::SocketPGA988A,
1548                0x20 => ProcessorUpgrade::SocketBGA1288,
1549                0x21 => ProcessorUpgrade::SocketrPGA988B,
1550                0x22 => ProcessorUpgrade::SocketBGA1023,
1551                0x23 => ProcessorUpgrade::SocketBGA1224,
1552                0x24 => ProcessorUpgrade::SocketLGA1155,
1553                0x25 => ProcessorUpgrade::SocketLGA1356,
1554                0x26 => ProcessorUpgrade::SocketLGA2011,
1555                0x27 => ProcessorUpgrade::SocketFS1,
1556                0x28 => ProcessorUpgrade::SocketFS2,
1557                0x29 => ProcessorUpgrade::SocketFM1,
1558                0x2A => ProcessorUpgrade::SocketFM2,
1559                0x2B => ProcessorUpgrade::SocketLGA2011_3,
1560                0x2C => ProcessorUpgrade::SocketLGA1356_3,
1561                0x2D => ProcessorUpgrade::SocketLGA1150,
1562                0x2E => ProcessorUpgrade::SocketBGA1168,
1563                0x2F => ProcessorUpgrade::SocketBGA1234,
1564                0x30 => ProcessorUpgrade::SocketBGA1364,
1565                0x31 => ProcessorUpgrade::SocketAM4,
1566                0x32 => ProcessorUpgrade::SocketLGA1151,
1567                0x33 => ProcessorUpgrade::SocketBGA1356,
1568                0x34 => ProcessorUpgrade::SocketBGA1440,
1569                0x35 => ProcessorUpgrade::SocketBGA1515,
1570                0x36 => ProcessorUpgrade::SocketLGA3647_1,
1571                0x37 => ProcessorUpgrade::SocketSP3,
1572                0x38 => ProcessorUpgrade::SocketSP3r23,
1573                0x39 => ProcessorUpgrade::SocketLGA2066,
1574                0x3A => ProcessorUpgrade::SocketBGA1392,
1575                0x3B => ProcessorUpgrade::SocketBGA1510,
1576                0x3C => ProcessorUpgrade::SocketBGA1528,
1577                0x3D => ProcessorUpgrade::SocketLGA4189,
1578                0x3E => ProcessorUpgrade::SocketLGA1200,
1579                0x3F => ProcessorUpgrade::SocketLGA4677,
1580                0x40 => ProcessorUpgrade::SocketLGA1700,
1581                0x41 => ProcessorUpgrade::SocketBGA1744,
1582                0x42 => ProcessorUpgrade::SocketBGA1781,
1583                0x43 => ProcessorUpgrade::SocketBGA1211,
1584                0x44 => ProcessorUpgrade::SocketBGA2422,
1585                0x45 => ProcessorUpgrade::SocketLGA1211,
1586                0x46 => ProcessorUpgrade::SocketLGA2422,
1587                0x47 => ProcessorUpgrade::SocketLGA5773,
1588                0x48 => ProcessorUpgrade::SocketBGA5773,
1589                0x49 => ProcessorUpgrade::SocketAM5,
1590                0x4A => ProcessorUpgrade::SocketSP5,
1591                0x4B => ProcessorUpgrade::SocketSP6,
1592                0x4C => ProcessorUpgrade::SocketBGA883,
1593                0x4D => ProcessorUpgrade::SocketBGA1190,
1594                0x4E => ProcessorUpgrade::SocketBGA4129,
1595                0x4F => ProcessorUpgrade::SocketLGA4710,
1596                0x50 => ProcessorUpgrade::SocketLGA7529,
1597                _ => ProcessorUpgrade::None,
1598            },
1599            raw,
1600        }
1601    }
1602}
1603
1604/// # Processor Characteristics
1605#[derive(PartialEq, Eq)]
1606pub struct ProcessorCharacteristics {
1607    /// Raw value
1608    pub raw: u16,
1609}
1610
1611impl Deref for ProcessorCharacteristics {
1612    type Target = u16;
1613
1614    fn deref(&self) -> &Self::Target {
1615        &self.raw
1616    }
1617}
1618
1619impl From<u16> for ProcessorCharacteristics {
1620    fn from(raw: u16) -> Self {
1621        ProcessorCharacteristics { raw }
1622    }
1623}
1624
1625impl ProcessorCharacteristics {
1626    /// Bit 1 Unknown
1627    pub fn unknown(&self) -> bool {
1628        self.raw & 0x0002 == 0x0002
1629    }
1630
1631    /// Bit 2 64-bit Capable
1632    pub fn bit_64capable(&self) -> bool {
1633        self.raw & 0x0004 == 0x0004
1634    }
1635
1636    /// Bit 3 Multi-Core
1637    pub fn multi_core(&self) -> bool {
1638        self.raw & 0x0008 == 0x0008
1639    }
1640
1641    /// Bit 4 Hardware Thread
1642    pub fn hardware_thread(&self) -> bool {
1643        self.raw & 0x0010 == 0x0010
1644    }
1645
1646    /// Bit 5 Execute Protection
1647    pub fn execute_protection(&self) -> bool {
1648        self.raw & 0x0020 == 0x0020
1649    }
1650
1651    /// Bit 6 Enhanced Virtualization
1652    pub fn enhanced_virtualization(&self) -> bool {
1653        self.raw & 0x0040 == 0x0040
1654    }
1655
1656    /// Bit 7 Power/Performance Control
1657    pub fn power_performance_control(&self) -> bool {
1658        self.raw & 0x0080 == 0x0080
1659    }
1660
1661    /// Bit 8 128-bit Capable
1662    pub fn bit_128capable(&self) -> bool {
1663        self.raw & 0x0100 == 0x0100
1664    }
1665
1666    /// Bit 9 Arm64 SoC ID
1667    pub fn arm_64soc_id(&self) -> bool {
1668        self.raw & 0x200 == 0x200
1669    }
1670}
1671
1672impl fmt::Debug for ProcessorCharacteristics {
1673    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
1674        fmt.debug_struct(std::any::type_name::<ProcessorCharacteristics>())
1675            .field("raw", &self.raw)
1676            .field("unknown", &self.unknown())
1677            .field("bit_64capable", &self.bit_64capable())
1678            .field("multi_core", &self.multi_core())
1679            .field("hardware_thread", &self.hardware_thread())
1680            .field("execute_protection", &self.execute_protection())
1681            .field("enhanced_virtualization", &self.enhanced_virtualization())
1682            .field(
1683                "power_performance_control",
1684                &self.power_performance_control(),
1685            )
1686            .field("bit_128capable", &self.bit_128capable())
1687            .field("arm_64soc_id", &self.arm_64soc_id())
1688            .finish()
1689    }
1690}
1691
1692impl Serialize for ProcessorCharacteristics {
1693    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
1694    where
1695        S: Serializer,
1696    {
1697        let mut state = serializer.serialize_struct("ProcessorCharacteristics", 10)?;
1698        state.serialize_field("raw", &self.raw)?;
1699        state.serialize_field("unknown", &self.unknown())?;
1700        state.serialize_field("bit_64capable", &self.bit_64capable())?;
1701        state.serialize_field("multi_core", &self.multi_core())?;
1702        state.serialize_field("hardware_thread", &self.hardware_thread())?;
1703        state.serialize_field("execute_protection", &self.execute_protection())?;
1704        state.serialize_field("enhanced_virtualization", &self.enhanced_virtualization())?;
1705        state.serialize_field(
1706            "power_performance_control",
1707            &self.power_performance_control(),
1708        )?;
1709        state.serialize_field("bit_128capable", &self.bit_128capable())?;
1710        state.serialize_field("arm_64soc_id", &self.arm_64soc_id())?;
1711        state.end()
1712    }
1713}
1714
1715/// # Processor Voltage
1716#[derive(Serialize, Debug)]
1717pub enum ProcessorVoltage {
1718    /// Current Processor Voltage
1719    CurrentVolts(f32),
1720    /// Processor Supported Voltages
1721    SupportedVolts(ProcessorSupportedVoltages),
1722}
1723
1724impl From<u8> for ProcessorVoltage {
1725    fn from(raw: u8) -> Self {
1726        if raw & 0b1000_0000 == 0b1000_0000 {
1727            ProcessorVoltage::CurrentVolts((raw & 0b0111_1111) as f32 / 10.0)
1728        } else {
1729            ProcessorVoltage::SupportedVolts(ProcessorSupportedVoltages::from(raw))
1730        }
1731    }
1732}
1733
1734/// # Processor Supported Voltages
1735#[derive(PartialEq, Eq)]
1736pub struct ProcessorSupportedVoltages {
1737    /// Raw value
1738    pub raw: u8,
1739}
1740
1741impl Deref for ProcessorSupportedVoltages {
1742    type Target = u8;
1743
1744    fn deref(&self) -> &Self::Target {
1745        &self.raw
1746    }
1747}
1748
1749impl From<u8> for ProcessorSupportedVoltages {
1750    fn from(raw: u8) -> Self {
1751        debug_assert_eq!(raw, raw & 0b0111_1111);
1752        ProcessorSupportedVoltages { raw }
1753    }
1754}
1755
1756impl ProcessorSupportedVoltages {
1757    /// Bit 0 – 5V
1758    pub fn volts_5_0(&self) -> bool {
1759        self.raw & 0x01 == 0x01
1760    }
1761
1762    /// Bit 1 – 3.3V
1763    pub fn volts_3_3(&self) -> bool {
1764        self.raw & 0x02 == 0x02
1765    }
1766
1767    /// Bit 2 – 2.9V
1768    pub fn volts_2_9(&self) -> bool {
1769        self.raw & 0x04 == 0x04
1770    }
1771
1772    /// Available Voltages
1773    pub fn voltages(&self) -> Vec<f32> {
1774        let mut result = Vec::new();
1775
1776        if self.volts_2_9() {
1777            result.push(2.9);
1778        }
1779
1780        if self.volts_3_3() {
1781            result.push(3.3);
1782        }
1783
1784        if self.volts_5_0() {
1785            result.push(5.0);
1786        }
1787
1788        result
1789    }
1790}
1791
1792impl fmt::Debug for ProcessorSupportedVoltages {
1793    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
1794        fmt.debug_struct(std::any::type_name::<ProcessorSupportedVoltages>())
1795            .field("raw", &self.raw)
1796            .field("voltages", &self.voltages().as_slice())
1797            .finish()
1798    }
1799}
1800
1801impl Serialize for ProcessorSupportedVoltages {
1802    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
1803    where
1804        S: Serializer,
1805    {
1806        let mut state = serializer.serialize_struct("ProcessorSupportedVoltages", 2)?;
1807        state.serialize_field("raw", &self.raw)?;
1808        state.serialize_field("voltages", &self.voltages().as_slice())?;
1809        state.end()
1810    }
1811}
1812
1813/// External Clock Frequency in MHz
1814#[derive(Serialize)]
1815pub enum ProcessorExternalClock {
1816    /// The value is unknown
1817    Unknown,
1818    /// External Clock Frequency in MHz
1819    MHz(u16),
1820}
1821
1822impl From<u16> for ProcessorExternalClock {
1823    fn from(raw: u16) -> Self {
1824        match raw {
1825            0 => ProcessorExternalClock::Unknown,
1826            _ => ProcessorExternalClock::MHz(raw),
1827        }
1828    }
1829}
1830
1831impl fmt::Debug for ProcessorExternalClock {
1832    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
1833        use ProcessorExternalClock::*;
1834        match self {
1835            Unknown => write! {fmt, "Unknown"},
1836            MHz(n) => write! {fmt, "{} MHz", n},
1837        }
1838    }
1839}
1840
1841/// Processor Speed in MHz
1842#[derive(Serialize)]
1843pub enum ProcessorSpeed {
1844    /// The value is unknown
1845    Unknown,
1846    /// The Processor Speed in MHz
1847    MHz(u16),
1848}
1849
1850impl From<u16> for ProcessorSpeed {
1851    fn from(raw: u16) -> Self {
1852        match raw {
1853            0 => ProcessorSpeed::Unknown,
1854            _ => ProcessorSpeed::MHz(raw),
1855        }
1856    }
1857}
1858
1859impl fmt::Debug for ProcessorSpeed {
1860    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
1861        use ProcessorSpeed::*;
1862        match self {
1863            Unknown => write! {fmt, "Unknown"},
1864            MHz(n) => write! {fmt, "{} MHz", n},
1865        }
1866    }
1867}
1868
1869/// # Processor Socket and CPU Status
1870#[derive(PartialEq, Eq)]
1871pub struct ProcessorStatus {
1872    /// Raw value
1873    pub raw: u8,
1874}
1875
1876impl Deref for ProcessorStatus {
1877    type Target = u8;
1878
1879    fn deref(&self) -> &Self::Target {
1880        &self.raw
1881    }
1882}
1883
1884impl From<u8> for ProcessorStatus {
1885    fn from(raw: u8) -> Self {
1886        ProcessorStatus { raw }
1887    }
1888}
1889
1890impl ProcessorStatus {
1891    /// CPU Socket Populated
1892    pub fn socket_populated(&self) -> bool {
1893        self.raw & 0b0100_0000 == 0b0100_0000
1894    }
1895
1896    /// CPU Status
1897    pub fn cpu_status(&self) -> CpuStatus {
1898        CpuStatus::from(self.raw)
1899    }
1900}
1901
1902impl fmt::Debug for ProcessorStatus {
1903    fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
1904        fmt.debug_struct(std::any::type_name::<ProcessorStatus>())
1905            .field("raw", &self.raw)
1906            .field("socket_populated", &self.socket_populated())
1907            .field("cpu_status", &self.cpu_status())
1908            .finish()
1909    }
1910}
1911
1912impl Serialize for ProcessorStatus {
1913    fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
1914    where
1915        S: Serializer,
1916    {
1917        let mut state = serializer.serialize_struct("ProcessorStatus", 3)?;
1918        state.serialize_field("raw", &self.raw)?;
1919        state.serialize_field("socket_populated", &self.socket_populated())?;
1920        state.serialize_field("cpu_status", &self.cpu_status())?;
1921        state.end()
1922    }
1923}
1924
1925/// CPU Status
1926#[derive(Serialize, Debug, PartialEq, Eq)]
1927pub enum CpuStatus {
1928    /// 0h – Unknown
1929    Unknown,
1930    /// 1h – CPU Enabled
1931    Enabled,
1932    /// 2h – CPU Disabled by User through BIOS Setup
1933    UserDisabled,
1934    /// 3h – CPU Disabled By BIOS (POST Error)
1935    BiosDisabled,
1936    /// 4h – CPU is Idle, waiting to be enabled.
1937    Idle,
1938    /// 7h – Other
1939    Other,
1940    /// A value unknown to this standard, check the raw value
1941    None,
1942}
1943
1944impl From<u8> for CpuStatus {
1945    fn from(raw: u8) -> Self {
1946        match raw & 0b0000_0111 {
1947            0 => CpuStatus::Unknown,
1948            1 => CpuStatus::Enabled,
1949            2 => CpuStatus::UserDisabled,
1950            3 => CpuStatus::BiosDisabled,
1951            4 => CpuStatus::Idle,
1952            7 => CpuStatus::Other,
1953            _ => CpuStatus::None,
1954        }
1955    }
1956}
1957
1958/// Processor Core Count
1959#[derive(Serialize, Debug)]
1960pub enum CoreCount {
1961    /// The value is unknown
1962    Unknown,
1963    /// Number of cores per processor socket
1964    Count(u8),
1965    /// For core counts of 256 or greater the 'core_count_2' field
1966    /// is set to the number of cores.
1967    SeeCoreCount2,
1968}
1969
1970impl From<u8> for CoreCount {
1971    fn from(raw: u8) -> Self {
1972        match raw {
1973            0 => CoreCount::Unknown,
1974            0xFF => CoreCount::SeeCoreCount2,
1975            _ => CoreCount::Count(raw),
1976        }
1977    }
1978}
1979
1980/// Processor Core Count #2
1981#[derive(Serialize, Debug)]
1982pub enum CoreCount2 {
1983    /// The value is unknown
1984    Unknown,
1985    /// Number of cores per processor socket
1986    Count(u16),
1987    /// Reserved (0xFFFF)
1988    Reserved,
1989}
1990
1991impl From<u16> for CoreCount2 {
1992    fn from(raw: u16) -> Self {
1993        match raw {
1994            0 => CoreCount2::Unknown,
1995            0xFFFF => CoreCount2::Reserved,
1996            _ => CoreCount2::Count(raw),
1997        }
1998    }
1999}
2000
2001/// Processor Cores Enabled
2002#[derive(Serialize, Debug)]
2003pub enum CoresEnabled {
2004    /// The value is unknown
2005    Unknown,
2006    /// Number of cores enabled
2007    Count(u8),
2008    /// For core counts of 256 or greater the 'cores_enabled_2' field
2009    /// is set to the number of enabled cores.
2010    SeeCoresEnabled2,
2011}
2012
2013impl From<u8> for CoresEnabled {
2014    fn from(raw: u8) -> Self {
2015        match raw {
2016            0 => CoresEnabled::Unknown,
2017            0xFF => CoresEnabled::SeeCoresEnabled2,
2018            _ => CoresEnabled::Count(raw),
2019        }
2020    }
2021}
2022
2023/// Processor Cores Enabled #2
2024#[derive(Serialize, Debug)]
2025pub enum CoresEnabled2 {
2026    /// The value is unknown
2027    Unknown,
2028    /// Number of cores enabled
2029    Count(u16),
2030    /// Reserved (0xFFFF)
2031    Reserved,
2032}
2033
2034impl From<u16> for CoresEnabled2 {
2035    fn from(raw: u16) -> Self {
2036        match raw {
2037            0 => CoresEnabled2::Unknown,
2038            0xFFFF => CoresEnabled2::Reserved,
2039            _ => CoresEnabled2::Count(raw),
2040        }
2041    }
2042}
2043
2044/// Processor Thread Count
2045#[derive(Serialize, Debug)]
2046pub enum ThreadCount {
2047    /// The value is unknown
2048    Unknown,
2049    /// Number of threads per processor socket
2050    Count(u8),
2051    /// For thread counts of 256 or greater the 'thread_count_2' field
2052    /// is set to the number of cores.
2053    SeeThreadCount2,
2054}
2055
2056impl From<u8> for ThreadCount {
2057    fn from(raw: u8) -> Self {
2058        match raw {
2059            0 => ThreadCount::Unknown,
2060            0xFF => ThreadCount::SeeThreadCount2,
2061            _ => ThreadCount::Count(raw),
2062        }
2063    }
2064}
2065
2066/// Processor Thread Count #2
2067#[derive(Serialize, Debug)]
2068pub enum ThreadCount2 {
2069    /// The value is unknown
2070    Unknown,
2071    /// Number of threads per processor socket
2072    Count(u16),
2073    /// Reserved (0xFFFF)
2074    Reserved,
2075}
2076
2077impl From<u16> for ThreadCount2 {
2078    fn from(raw: u16) -> Self {
2079        match raw {
2080            0 => ThreadCount2::Unknown,
2081            0xFFFF => ThreadCount2::Reserved,
2082            _ => ThreadCount2::Count(raw),
2083        }
2084    }
2085}
2086
2087/// Thread Enabled
2088#[derive(Serialize, Debug)]
2089pub enum ThreadEnabled {
2090    /// The value is unknown (0x0000)
2091    Unknown,
2092    /// thread enabled counts 1 to 65534, respectively
2093    Count(u16),
2094    /// Reserved (0xFFFF)
2095    Reserved,
2096}
2097
2098impl From<u16> for ThreadEnabled {
2099    fn from(raw: u16) -> Self {
2100        match raw {
2101            0 => ThreadEnabled::Unknown,
2102            0xFFFF => ThreadEnabled::Reserved,
2103            _ => ThreadEnabled::Count(raw),
2104        }
2105    }
2106}
2107
2108#[cfg(test)]
2109mod tests {
2110    use super::*;
2111
2112    #[test]
2113    fn unit_test() {
2114        let struct_type4 = vec![
2115            0x04, 0x30, 0x56, 0x00, 0x01, 0x03, 0xB3, 0x02, 0x54, 0x06, 0x05, 0x00, 0xFF, 0xFB,
2116            0xEB, 0xBF, 0x03, 0x90, 0x64, 0x00, 0x3C, 0x0F, 0x10, 0x0E, 0x41, 0x01, 0x53, 0x00,
2117            0x54, 0x00, 0x55, 0x00, 0x00, 0x04, 0x00, 0x06, 0x06, 0x0C, 0xFC, 0x00, 0xB3, 0x00,
2118            0x06, 0x00, 0x06, 0x00, 0x0C, 0x00, 0x43, 0x50, 0x55, 0x30, 0x00, 0x49, 0x6E, 0x74,
2119            0x65, 0x6C, 0x28, 0x52, 0x29, 0x20, 0x43, 0x6F, 0x72, 0x70, 0x6F, 0x72, 0x61, 0x74,
2120            0x69, 0x6F, 0x6E, 0x00, 0x49, 0x6E, 0x74, 0x65, 0x6C, 0x28, 0x52, 0x29, 0x20, 0x58,
2121            0x65, 0x6F, 0x6E, 0x28, 0x52, 0x29, 0x20, 0x57, 0x2D, 0x32, 0x31, 0x33, 0x33, 0x20,
2122            0x43, 0x50, 0x55, 0x20, 0x40, 0x20, 0x33, 0x2E, 0x36, 0x30, 0x47, 0x48, 0x7A, 0x00,
2123            0x55, 0x4E, 0x4B, 0x4E, 0x4F, 0x57, 0x4E, 0x00, 0x00,
2124        ];
2125
2126        let parts = UndefinedStruct::new(&struct_type4);
2127        let test_struct = SMBiosProcessorInformation::new(&parts);
2128
2129        assert_eq!(
2130            test_struct.socket_designation().to_string(),
2131            "CPU0".to_string()
2132        );
2133        assert_eq!(
2134            *test_struct.processor_type().unwrap(),
2135            ProcessorType::CentralProcessor
2136        );
2137        assert_eq!(
2138            *test_struct.processor_family().unwrap(),
2139            ProcessorFamily::IntelXeonProcessor
2140        );
2141        assert_eq!(
2142            test_struct.processor_manufacturer().to_string(),
2143            "Intel(R) Corporation".to_string()
2144        );
2145        assert_eq!(
2146            test_struct.processor_id(),
2147            Some(&[0x54u8, 0x06, 0x05, 0x00, 0xFF, 0xFB, 0xEB, 0xBF])
2148        );
2149        assert_eq!(
2150            test_struct.processor_version().to_string(),
2151            "Intel(R) Xeon(R) W-2133 CPU @ 3.60GHz".to_string()
2152        );
2153        match test_struct.voltage().unwrap() {
2154            ProcessorVoltage::CurrentVolts(volts) => assert_eq!(volts, 1.6),
2155            ProcessorVoltage::SupportedVolts(_) => panic!("expected current volts"),
2156        }
2157        match test_struct.external_clock().unwrap() {
2158            ProcessorExternalClock::MHz(mhz) => assert_eq!(mhz, 100),
2159            ProcessorExternalClock::Unknown => panic!("expected MHz"),
2160        }
2161        match test_struct.max_speed().unwrap() {
2162            ProcessorSpeed::MHz(mhz) => assert_eq!(mhz, 3900),
2163            ProcessorSpeed::Unknown => panic!("expected MHz"),
2164        }
2165        match test_struct.current_speed().unwrap() {
2166            ProcessorSpeed::MHz(mhz) => assert_eq!(mhz, 3600),
2167            ProcessorSpeed::Unknown => panic!("expected MHz"),
2168        }
2169        let processor_status = test_struct.status().unwrap();
2170        assert!(processor_status.socket_populated());
2171        assert_eq!(processor_status.cpu_status(), CpuStatus::Enabled);
2172        assert_eq!(
2173            *test_struct.processor_upgrade().unwrap(),
2174            ProcessorUpgrade::Other
2175        );
2176        assert_eq!(*test_struct.l1cache_handle().unwrap(), 83);
2177        assert_eq!(*test_struct.l2cache_handle().unwrap(), 84);
2178        assert_eq!(*test_struct.l3cache_handle().unwrap(), 85);
2179        assert_eq!(test_struct.serial_number().to_string(), "".to_string());
2180        assert_eq!(test_struct.asset_tag().to_string(), "UNKNOWN".to_string());
2181        assert_eq!(test_struct.part_number().to_string(), "".to_string());
2182        match test_struct.core_count().unwrap() {
2183            CoreCount::Count(number) => assert_eq!(number, 6),
2184            CoreCount::Unknown => panic!("expected number"),
2185            CoreCount::SeeCoreCount2 => panic!("expected number"),
2186        }
2187        match test_struct.cores_enabled().unwrap() {
2188            CoresEnabled::Count(number) => assert_eq!(number, 6),
2189            CoresEnabled::Unknown => panic!("expected number"),
2190            CoresEnabled::SeeCoresEnabled2 => panic!("expected number"),
2191        }
2192        match test_struct.thread_count().unwrap() {
2193            ThreadCount::Count(number) => assert_eq!(number, 12),
2194            ThreadCount::Unknown => panic!("expected number"),
2195            ThreadCount::SeeThreadCount2 => panic!("expected number"),
2196        }
2197        assert_eq!(
2198            test_struct.processor_characteristics(),
2199            Some(ProcessorCharacteristics::from(252))
2200        );
2201        assert_eq!(
2202            *test_struct.processor_family_2().unwrap(),
2203            ProcessorFamily::IntelXeonProcessor
2204        );
2205
2206        match test_struct.core_count_2().unwrap() {
2207            CoreCount2::Count(number) => assert_eq!(number, 6),
2208            CoreCount2::Unknown => panic!("expected number"),
2209            CoreCount2::Reserved => panic!("expected number"),
2210        }
2211        match test_struct.cores_enabled_2().unwrap() {
2212            CoresEnabled2::Count(number) => assert_eq!(number, 6),
2213            CoresEnabled2::Unknown => panic!("expected number"),
2214            CoresEnabled2::Reserved => panic!("expected number"),
2215        }
2216        match test_struct.thread_count_2().unwrap() {
2217            ThreadCount2::Count(number) => assert_eq!(number, 12),
2218            ThreadCount2::Unknown => panic!("expected number"),
2219            ThreadCount2::Reserved => panic!("expected number"),
2220        }
2221    }
2222}
smbioslib/structs/types/processor_information.rs

smbioslib/structs/types/
processor_information.rs
