sifive_fe310_g002/
spi.rs

1#[repr(C)]
2/// The SPI controls on the core
3///
4/// Each field matches the definitions in the core specification
5pub struct SpiControls {
6    pub sckdiv: u32,
7    pub sckmode: u32,
8    _reserved_1: u32,
9    _reserved_2: u32,
10    pub csid: u32,
11    pub csdef: u32,
12    pub csmode: u32,
13    _reserved_3: u32,
14    _reserved_4: u32,
15    _reserved_5: u32,
16    pub delay0: u32,
17    pub delay1: u32,
18    _reserved_6: u32,
19    _reserved_7: u32,
20    _reserved_8: u32,
21    _reserved_9: u32,
22    pub fmt: u32,
23    _reserved_10: u32,
24    pub txdata: u32,
25    pub rxdata: u32,
26    pub txmark: u32,
27    pub rxmark: u32,
28    _reserved_11: u32,
29    _reserved_12: u32,
30    pub fctrl: u32,
31    pub ffmt: u32,
32    _reserved_13: u32,
33    _reserved_14: u32,
34    pub ie: u32,
35    pub ip: u32,
36}
37/// Pointer to the QSPI0 address
38pub const QSPI0: *mut SpiControls = 0x10014000 as *mut SpiControls;
39/// Pointer to the SPI1 address
40pub const SPI1: *mut SpiControls = 0x10024000 as *mut SpiControls;
41/// Pointer to the SPI2 address
42pub const SPI2: *mut SpiControls = 0x10034000 as *mut SpiControls;
sifive_fe310_g002/spi.rs

sifive_fe310_g002/
spi.rs
