seminix 0.1.54

seminix 内核标准库
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65

use core::arch::asm;

#[inline(always)]
pub(crate) fn arch_set_my_processor_id(id: usize) {
    unsafe {
        asm!(
            "msr tpidr_el1, {0}",
            in(reg) id
        );
    }
}

#[inline(always)]
pub(crate) fn arch_my_processor_id() -> usize {
    let id;
    unsafe {
        asm!(
            "mrs {0}, tpidr_el1",
            out(reg) id
        );
    }
    id
}

#[inline(always)]
pub(crate) fn arch_cpu_relax() {
    unsafe {
        core::arch::aarch64::__yield();
    }
}

#[inline(always)]
pub(crate) fn arch_cpu_wfe() {
    unsafe {
        core::arch::aarch64::__wfe();
    }
}

#[inline(always)]
pub(crate) fn arch_smp_mb_acquire() {
    unsafe {
        core::arch::aarch64::__dmb(core::arch::aarch64::ISHLD);
    }
}

#[inline(always)]
pub(crate) fn arch_smp_mb_release() {
    unsafe {
        core::arch::aarch64::__dmb(core::arch::aarch64::ISHST);
    }
}

#[inline(always)]
pub(crate) fn arch_smp_mb() {
    unsafe {
        core::arch::aarch64::__dmb(core::arch::aarch64::ISH);
    }
}

#[inline(always)]
pub(crate) fn arch_isb() {
    unsafe {
        core::arch::aarch64::__isb(core::arch::aarch64::SY);
    }
}