selium-switchboard-protocol 0.4.3

Selium module for abstracting channel management and messaging patterns
Documentation 
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// automatically generated by the FlatBuffers compiler, do not modify
// @generated
extern crate alloc;
use super::*;
pub enum WiringEgressOffset {}
#[derive(Copy, Clone, PartialEq)]

pub struct WiringEgress<'a> {
  pub _tab: ::flatbuffers::Table<'a>,
}

impl<'a> ::flatbuffers::Follow<'a> for WiringEgress<'a> {
  type Inner = WiringEgress<'a>;
  #[inline]
  unsafe fn follow(buf: &'a [u8], loc: usize) -> Self::Inner {
    Self { _tab: unsafe { ::flatbuffers::Table::new(buf, loc) } }
  }
}

impl<'a> WiringEgress<'a> {
  pub const VT_TO: ::flatbuffers::VOffsetT = 4;
  pub const VT_CHANNEL: ::flatbuffers::VOffsetT = 6;

  #[inline]
  pub unsafe fn init_from_table(table: ::flatbuffers::Table<'a>) -> Self {
    WiringEgress { _tab: table }
  }
  #[allow(unused_mut)]
  pub fn create<'bldr: 'args, 'args: 'mut_bldr, 'mut_bldr, A: ::flatbuffers::Allocator + 'bldr>(
    _fbb: &'mut_bldr mut ::flatbuffers::FlatBufferBuilder<'bldr, A>,
    args: &'args WiringEgressArgs
  ) -> ::flatbuffers::WIPOffset<WiringEgress<'bldr>> {
    let mut builder = WiringEgressBuilder::new(_fbb);
    builder.add_channel(args.channel);
    builder.add_to(args.to);
    builder.finish()
  }


  #[inline]
  pub fn to(&self) -> u32 {
    // Safety:
    // Created from valid Table for this object
    // which contains a valid value in this slot
    unsafe { self._tab.get::<u32>(WiringEgress::VT_TO, Some(0)).unwrap()}
  }
  #[inline]
  pub fn channel(&self) -> u64 {
    // Safety:
    // Created from valid Table for this object
    // which contains a valid value in this slot
    unsafe { self._tab.get::<u64>(WiringEgress::VT_CHANNEL, Some(0)).unwrap()}
  }
}

impl ::flatbuffers::Verifiable for WiringEgress<'_> {
  #[inline]
  fn run_verifier(
    v: &mut ::flatbuffers::Verifier, pos: usize
  ) -> Result<(), ::flatbuffers::InvalidFlatbuffer> {
    v.visit_table(pos)?
     .visit_field::<u32>("to", Self::VT_TO, false)?
     .visit_field::<u64>("channel", Self::VT_CHANNEL, false)?
     .finish();
    Ok(())
  }
}
pub struct WiringEgressArgs {
    pub to: u32,
    pub channel: u64,
}
impl<'a> Default for WiringEgressArgs {
  #[inline]
  fn default() -> Self {
    WiringEgressArgs {
      to: 0,
      channel: 0,
    }
  }
}

pub struct WiringEgressBuilder<'a: 'b, 'b, A: ::flatbuffers::Allocator + 'a> {
  fbb_: &'b mut ::flatbuffers::FlatBufferBuilder<'a, A>,
  start_: ::flatbuffers::WIPOffset<::flatbuffers::TableUnfinishedWIPOffset>,
}
impl<'a: 'b, 'b, A: ::flatbuffers::Allocator + 'a> WiringEgressBuilder<'a, 'b, A> {
  #[inline]
  pub fn add_to(&mut self, to: u32) {
    self.fbb_.push_slot::<u32>(WiringEgress::VT_TO, to, 0);
  }
  #[inline]
  pub fn add_channel(&mut self, channel: u64) {
    self.fbb_.push_slot::<u64>(WiringEgress::VT_CHANNEL, channel, 0);
  }
  #[inline]
  pub fn new(_fbb: &'b mut ::flatbuffers::FlatBufferBuilder<'a, A>) -> WiringEgressBuilder<'a, 'b, A> {
    let start = _fbb.start_table();
    WiringEgressBuilder {
      fbb_: _fbb,
      start_: start,
    }
  }
  #[inline]
  pub fn finish(self) -> ::flatbuffers::WIPOffset<WiringEgress<'a>> {
    let o = self.fbb_.end_table(self.start_);
    ::flatbuffers::WIPOffset::new(o.value())
  }
}

impl ::core::fmt::Debug for WiringEgress<'_> {
  fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
    let mut ds = f.debug_struct("WiringEgress");
      ds.field("to", &self.to());
      ds.field("channel", &self.channel());
      ds.finish()
  }
}