#[doc = "Reader of register OSC16MCTRL"]
pub type R = crate::R<u8, super::OSC16MCTRL>;
#[doc = "Writer for register OSC16MCTRL"]
pub type W = crate::W<u8, super::OSC16MCTRL>;
#[doc = "Register OSC16MCTRL `reset()`'s with value 0x82"]
impl crate::ResetValue for super::OSC16MCTRL {
type Type = u8;
#[inline(always)]
fn reset_value() -> Self::Type {
0x82
}
}
#[doc = "Reader of field `ENABLE`"]
pub type ENABLE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ENABLE`"]
pub struct ENABLE_W<'a> {
w: &'a mut W,
}
impl<'a> ENABLE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1);
self.w
}
}
#[doc = "Possible values of the field `FSEL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FSEL_A {
#[doc = "4MHz"]
_4,
#[doc = "8MHz"]
_8,
#[doc = "12MHz"]
_12,
#[doc = "16MHz"]
_16,
}
impl crate::ToBits<u8> for FSEL_A {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
FSEL_A::_4 => 0,
FSEL_A::_8 => 1,
FSEL_A::_12 => 2,
FSEL_A::_16 => 3,
}
}
}
#[doc = "Reader of field `FSEL`"]
pub type FSEL_R = crate::R<u8, FSEL_A>;
impl FSEL_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> FSEL_A {
match self.bits {
0 => FSEL_A::_4,
1 => FSEL_A::_8,
2 => FSEL_A::_12,
3 => FSEL_A::_16,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_4`"]
#[inline(always)]
pub fn is_4(&self) -> bool {
*self == FSEL_A::_4
}
#[doc = "Checks if the value of the field is `_8`"]
#[inline(always)]
pub fn is_8(&self) -> bool {
*self == FSEL_A::_8
}
#[doc = "Checks if the value of the field is `_12`"]
#[inline(always)]
pub fn is_12(&self) -> bool {
*self == FSEL_A::_12
}
#[doc = "Checks if the value of the field is `_16`"]
#[inline(always)]
pub fn is_16(&self) -> bool {
*self == FSEL_A::_16
}
}
#[doc = "Write proxy for field `FSEL`"]
pub struct FSEL_W<'a> {
w: &'a mut W,
}
impl<'a> FSEL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: FSEL_A) -> &'a mut W {
use crate::ToBits;
{
self.bits(variant._bits())
}
}
#[doc = "4MHz"]
#[inline(always)]
pub fn _4(self) -> &'a mut W {
self.variant(FSEL_A::_4)
}
#[doc = "8MHz"]
#[inline(always)]
pub fn _8(self) -> &'a mut W {
self.variant(FSEL_A::_8)
}
#[doc = "12MHz"]
#[inline(always)]
pub fn _12(self) -> &'a mut W {
self.variant(FSEL_A::_12)
}
#[doc = "16MHz"]
#[inline(always)]
pub fn _16(self) -> &'a mut W {
self.variant(FSEL_A::_16)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u8) & 0x03) << 2);
self.w
}
}
#[doc = "Reader of field `RUNSTDBY`"]
pub type RUNSTDBY_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RUNSTDBY`"]
pub struct RUNSTDBY_W<'a> {
w: &'a mut W,
}
impl<'a> RUNSTDBY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6);
self.w
}
}
#[doc = "Reader of field `ONDEMAND`"]
pub type ONDEMAND_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ONDEMAND`"]
pub struct ONDEMAND_W<'a> {
w: &'a mut W,
}
impl<'a> ONDEMAND_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7);
self.w
}
}
impl R {
#[doc = "Bit 1 - Oscillator Enable"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bits 2:3 - Oscillator Frequency Selection"]
#[inline(always)]
pub fn fsel(&self) -> FSEL_R {
FSEL_R::new(((self.bits >> 2) & 0x03) as u8)
}
#[doc = "Bit 6 - Run in Standby"]
#[inline(always)]
pub fn runstdby(&self) -> RUNSTDBY_R {
RUNSTDBY_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - On Demand Control"]
#[inline(always)]
pub fn ondemand(&self) -> ONDEMAND_R {
ONDEMAND_R::new(((self.bits >> 7) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 1 - Oscillator Enable"]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W {
ENABLE_W { w: self }
}
#[doc = "Bits 2:3 - Oscillator Frequency Selection"]
#[inline(always)]
pub fn fsel(&mut self) -> FSEL_W {
FSEL_W { w: self }
}
#[doc = "Bit 6 - Run in Standby"]
#[inline(always)]
pub fn runstdby(&mut self) -> RUNSTDBY_W {
RUNSTDBY_W { w: self }
}
#[doc = "Bit 7 - On Demand Control"]
#[inline(always)]
pub fn ondemand(&mut self) -> ONDEMAND_W {
ONDEMAND_W { w: self }
}
}