#[doc = "Reader of register OPAMPCTRL[%s]"]
pub type R = crate::R<u32, super::OPAMPCTRL>;
#[doc = "Writer for register OPAMPCTRL[%s]"]
pub type W = crate::W<u32, super::OPAMPCTRL>;
#[doc = "Register OPAMPCTRL[%s] `reset()`'s with value 0"]
impl crate::ResetValue for super::OPAMPCTRL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `ENABLE`"]
pub type ENABLE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ENABLE`"]
pub struct ENABLE_W<'a> {
w: &'a mut W,
}
impl<'a> ENABLE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `ANAOUT`"]
pub type ANAOUT_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ANAOUT`"]
pub struct ANAOUT_W<'a> {
w: &'a mut W,
}
impl<'a> ANAOUT_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `BIAS`"]
pub type BIAS_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `BIAS`"]
pub struct BIAS_W<'a> {
w: &'a mut W,
}
impl<'a> BIAS_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 3)) | (((value as u32) & 0x03) << 3);
self.w
}
}
#[doc = "Reader of field `RES2VCC`"]
pub type RES2VCC_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RES2VCC`"]
pub struct RES2VCC_W<'a> {
w: &'a mut W,
}
impl<'a> RES2VCC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Reader of field `RUNSTDBY`"]
pub type RUNSTDBY_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RUNSTDBY`"]
pub struct RUNSTDBY_W<'a> {
w: &'a mut W,
}
impl<'a> RUNSTDBY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
self.w
}
}
#[doc = "Reader of field `ONDEMAND`"]
pub type ONDEMAND_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ONDEMAND`"]
pub struct ONDEMAND_W<'a> {
w: &'a mut W,
}
impl<'a> ONDEMAND_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "Reader of field `RES2OUT`"]
pub type RES2OUT_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RES2OUT`"]
pub struct RES2OUT_W<'a> {
w: &'a mut W,
}
impl<'a> RES2OUT_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Reader of field `RES1EN`"]
pub type RES1EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RES1EN`"]
pub struct RES1EN_W<'a> {
w: &'a mut W,
}
impl<'a> RES1EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "Reader of field `RES1MUX`"]
pub type RES1MUX_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RES1MUX`"]
pub struct RES1MUX_W<'a> {
w: &'a mut W,
}
impl<'a> RES1MUX_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 10)) | (((value as u32) & 0x07) << 10);
self.w
}
}
#[doc = "Reader of field `POTMUX`"]
pub type POTMUX_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `POTMUX`"]
pub struct POTMUX_W<'a> {
w: &'a mut W,
}
impl<'a> POTMUX_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 13)) | (((value as u32) & 0x07) << 13);
self.w
}
}
#[doc = "Reader of field `MUXPOS`"]
pub type MUXPOS_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `MUXPOS`"]
pub struct MUXPOS_W<'a> {
w: &'a mut W,
}
impl<'a> MUXPOS_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
self.w
}
}
#[doc = "Reader of field `MUXNEG`"]
pub type MUXNEG_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `MUXNEG`"]
pub struct MUXNEG_W<'a> {
w: &'a mut W,
}
impl<'a> MUXNEG_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 20)) | (((value as u32) & 0x0f) << 20);
self.w
}
}
impl R {
#[doc = "Bit 1 - Operational Amplifier Enable"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - Analog Output"]
#[inline(always)]
pub fn anaout(&self) -> ANAOUT_R {
ANAOUT_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bits 3:4 - Bias Selection"]
#[inline(always)]
pub fn bias(&self) -> BIAS_R {
BIAS_R::new(((self.bits >> 3) & 0x03) as u8)
}
#[doc = "Bit 5 - Resistor ladder To VCC"]
#[inline(always)]
pub fn res2vcc(&self) -> RES2VCC_R {
RES2VCC_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - Run in Standby"]
#[inline(always)]
pub fn runstdby(&self) -> RUNSTDBY_R {
RUNSTDBY_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - On Demand Control"]
#[inline(always)]
pub fn ondemand(&self) -> ONDEMAND_R {
ONDEMAND_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - Resistor ladder To Output"]
#[inline(always)]
pub fn res2out(&self) -> RES2OUT_R {
RES2OUT_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - Resistor 1 Enable"]
#[inline(always)]
pub fn res1en(&self) -> RES1EN_R {
RES1EN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bits 10:12 - Resistor 1 Mux"]
#[inline(always)]
pub fn res1mux(&self) -> RES1MUX_R {
RES1MUX_R::new(((self.bits >> 10) & 0x07) as u8)
}
#[doc = "Bits 13:15 - Potentiometer Selection"]
#[inline(always)]
pub fn potmux(&self) -> POTMUX_R {
POTMUX_R::new(((self.bits >> 13) & 0x07) as u8)
}
#[doc = "Bits 16:19 - Positive Input Mux Selection"]
#[inline(always)]
pub fn muxpos(&self) -> MUXPOS_R {
MUXPOS_R::new(((self.bits >> 16) & 0x0f) as u8)
}
#[doc = "Bits 20:23 - Negative Input Mux Selection"]
#[inline(always)]
pub fn muxneg(&self) -> MUXNEG_R {
MUXNEG_R::new(((self.bits >> 20) & 0x0f) as u8)
}
}
impl W {
#[doc = "Bit 1 - Operational Amplifier Enable"]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W {
ENABLE_W { w: self }
}
#[doc = "Bit 2 - Analog Output"]
#[inline(always)]
pub fn anaout(&mut self) -> ANAOUT_W {
ANAOUT_W { w: self }
}
#[doc = "Bits 3:4 - Bias Selection"]
#[inline(always)]
pub fn bias(&mut self) -> BIAS_W {
BIAS_W { w: self }
}
#[doc = "Bit 5 - Resistor ladder To VCC"]
#[inline(always)]
pub fn res2vcc(&mut self) -> RES2VCC_W {
RES2VCC_W { w: self }
}
#[doc = "Bit 6 - Run in Standby"]
#[inline(always)]
pub fn runstdby(&mut self) -> RUNSTDBY_W {
RUNSTDBY_W { w: self }
}
#[doc = "Bit 7 - On Demand Control"]
#[inline(always)]
pub fn ondemand(&mut self) -> ONDEMAND_W {
ONDEMAND_W { w: self }
}
#[doc = "Bit 8 - Resistor ladder To Output"]
#[inline(always)]
pub fn res2out(&mut self) -> RES2OUT_W {
RES2OUT_W { w: self }
}
#[doc = "Bit 9 - Resistor 1 Enable"]
#[inline(always)]
pub fn res1en(&mut self) -> RES1EN_W {
RES1EN_W { w: self }
}
#[doc = "Bits 10:12 - Resistor 1 Mux"]
#[inline(always)]
pub fn res1mux(&mut self) -> RES1MUX_W {
RES1MUX_W { w: self }
}
#[doc = "Bits 13:15 - Potentiometer Selection"]
#[inline(always)]
pub fn potmux(&mut self) -> POTMUX_W {
POTMUX_W { w: self }
}
#[doc = "Bits 16:19 - Positive Input Mux Selection"]
#[inline(always)]
pub fn muxpos(&mut self) -> MUXPOS_W {
MUXPOS_W { w: self }
}
#[doc = "Bits 20:23 - Negative Input Mux Selection"]
#[inline(always)]
pub fn muxneg(&mut self) -> MUXNEG_W {
MUXNEG_W { w: self }
}
}