saml10e16a/sercom0/spi/
ctrlb.rs1#[doc = "Reader of register CTRLB"]
2pub type R = crate::R<u32, super::CTRLB>;
3#[doc = "Writer for register CTRLB"]
4pub type W = crate::W<u32, super::CTRLB>;
5#[doc = "Register CTRLB `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRLB {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `CHSIZE`"]
14pub type CHSIZE_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `CHSIZE`"]
16pub struct CHSIZE_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> CHSIZE_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
24 self.w
25 }
26}
27#[doc = "Reader of field `PLOADEN`"]
28pub type PLOADEN_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `PLOADEN`"]
30pub struct PLOADEN_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> PLOADEN_W<'a> {
34 #[doc = r"Sets the field bit"]
35 #[inline(always)]
36 pub fn set_bit(self) -> &'a mut W {
37 self.bit(true)
38 }
39 #[doc = r"Clears the field bit"]
40 #[inline(always)]
41 pub fn clear_bit(self) -> &'a mut W {
42 self.bit(false)
43 }
44 #[doc = r"Writes raw bits to the field"]
45 #[inline(always)]
46 pub fn bit(self, value: bool) -> &'a mut W {
47 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
48 self.w
49 }
50}
51#[doc = "Reader of field `SSDE`"]
52pub type SSDE_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `SSDE`"]
54pub struct SSDE_W<'a> {
55 w: &'a mut W,
56}
57impl<'a> SSDE_W<'a> {
58 #[doc = r"Sets the field bit"]
59 #[inline(always)]
60 pub fn set_bit(self) -> &'a mut W {
61 self.bit(true)
62 }
63 #[doc = r"Clears the field bit"]
64 #[inline(always)]
65 pub fn clear_bit(self) -> &'a mut W {
66 self.bit(false)
67 }
68 #[doc = r"Writes raw bits to the field"]
69 #[inline(always)]
70 pub fn bit(self, value: bool) -> &'a mut W {
71 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
72 self.w
73 }
74}
75#[doc = "Reader of field `MSSEN`"]
76pub type MSSEN_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `MSSEN`"]
78pub struct MSSEN_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> MSSEN_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
96 self.w
97 }
98}
99#[doc = "Reader of field `AMODE`"]
100pub type AMODE_R = crate::R<u8, u8>;
101#[doc = "Write proxy for field `AMODE`"]
102pub struct AMODE_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> AMODE_W<'a> {
106 #[doc = r"Writes raw bits to the field"]
107 #[inline(always)]
108 pub unsafe fn bits(self, value: u8) -> &'a mut W {
109 self.w.bits = (self.w.bits & !(0x03 << 14)) | (((value as u32) & 0x03) << 14);
110 self.w
111 }
112}
113#[doc = "Reader of field `RXEN`"]
114pub type RXEN_R = crate::R<bool, bool>;
115#[doc = "Write proxy for field `RXEN`"]
116pub struct RXEN_W<'a> {
117 w: &'a mut W,
118}
119impl<'a> RXEN_W<'a> {
120 #[doc = r"Sets the field bit"]
121 #[inline(always)]
122 pub fn set_bit(self) -> &'a mut W {
123 self.bit(true)
124 }
125 #[doc = r"Clears the field bit"]
126 #[inline(always)]
127 pub fn clear_bit(self) -> &'a mut W {
128 self.bit(false)
129 }
130 #[doc = r"Writes raw bits to the field"]
131 #[inline(always)]
132 pub fn bit(self, value: bool) -> &'a mut W {
133 self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
134 self.w
135 }
136}
137impl R {
138 #[doc = "Bits 0:2 - Character Size"]
139 #[inline(always)]
140 pub fn chsize(&self) -> CHSIZE_R {
141 CHSIZE_R::new((self.bits & 0x07) as u8)
142 }
143 #[doc = "Bit 6 - Data Preload Enable"]
144 #[inline(always)]
145 pub fn ploaden(&self) -> PLOADEN_R {
146 PLOADEN_R::new(((self.bits >> 6) & 0x01) != 0)
147 }
148 #[doc = "Bit 9 - Slave Select Low Detect Enable"]
149 #[inline(always)]
150 pub fn ssde(&self) -> SSDE_R {
151 SSDE_R::new(((self.bits >> 9) & 0x01) != 0)
152 }
153 #[doc = "Bit 13 - Master Slave Select Enable"]
154 #[inline(always)]
155 pub fn mssen(&self) -> MSSEN_R {
156 MSSEN_R::new(((self.bits >> 13) & 0x01) != 0)
157 }
158 #[doc = "Bits 14:15 - Address Mode"]
159 #[inline(always)]
160 pub fn amode(&self) -> AMODE_R {
161 AMODE_R::new(((self.bits >> 14) & 0x03) as u8)
162 }
163 #[doc = "Bit 17 - Receiver Enable"]
164 #[inline(always)]
165 pub fn rxen(&self) -> RXEN_R {
166 RXEN_R::new(((self.bits >> 17) & 0x01) != 0)
167 }
168}
169impl W {
170 #[doc = "Bits 0:2 - Character Size"]
171 #[inline(always)]
172 pub fn chsize(&mut self) -> CHSIZE_W {
173 CHSIZE_W { w: self }
174 }
175 #[doc = "Bit 6 - Data Preload Enable"]
176 #[inline(always)]
177 pub fn ploaden(&mut self) -> PLOADEN_W {
178 PLOADEN_W { w: self }
179 }
180 #[doc = "Bit 9 - Slave Select Low Detect Enable"]
181 #[inline(always)]
182 pub fn ssde(&mut self) -> SSDE_W {
183 SSDE_W { w: self }
184 }
185 #[doc = "Bit 13 - Master Slave Select Enable"]
186 #[inline(always)]
187 pub fn mssen(&mut self) -> MSSEN_W {
188 MSSEN_W { w: self }
189 }
190 #[doc = "Bits 14:15 - Address Mode"]
191 #[inline(always)]
192 pub fn amode(&mut self) -> AMODE_W {
193 AMODE_W { w: self }
194 }
195 #[doc = "Bit 17 - Receiver Enable"]
196 #[inline(always)]
197 pub fn rxen(&mut self) -> RXEN_W {
198 RXEN_W { w: self }
199 }
200}