saml10e14a/port/group/
pmux.rs1#[doc = "Reader of register PMUX[%s]"]
2pub type R = crate::R<u8, super::PMUX>;
3#[doc = "Writer for register PMUX[%s]"]
4pub type W = crate::W<u8, super::PMUX>;
5#[doc = "Register PMUX[%s] `reset()`'s with value 0"]
6impl crate::ResetValue for super::PMUX {
7 type Type = u8;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `PMUXE`"]
14pub type PMUXE_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `PMUXE`"]
16pub struct PMUXE_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> PMUXE_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x0f) | ((value as u8) & 0x0f);
24 self.w
25 }
26}
27#[doc = "Reader of field `PMUXO`"]
28pub type PMUXO_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `PMUXO`"]
30pub struct PMUXO_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> PMUXO_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u8) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u8) & 0x0f) << 4);
38 self.w
39 }
40}
41impl R {
42 #[doc = "Bits 0:3 - Peripheral Multiplexing for Even-Numbered Pin"]
43 #[inline(always)]
44 pub fn pmuxe(&self) -> PMUXE_R {
45 PMUXE_R::new((self.bits & 0x0f) as u8)
46 }
47 #[doc = "Bits 4:7 - Peripheral Multiplexing for Odd-Numbered Pin"]
48 #[inline(always)]
49 pub fn pmuxo(&self) -> PMUXO_R {
50 PMUXO_R::new(((self.bits >> 4) & 0x0f) as u8)
51 }
52}
53impl W {
54 #[doc = "Bits 0:3 - Peripheral Multiplexing for Even-Numbered Pin"]
55 #[inline(always)]
56 pub fn pmuxe(&mut self) -> PMUXE_W {
57 PMUXE_W { w: self }
58 }
59 #[doc = "Bits 4:7 - Peripheral Multiplexing for Odd-Numbered Pin"]
60 #[inline(always)]
61 pub fn pmuxo(&mut self) -> PMUXO_W {
62 PMUXO_W { w: self }
63 }
64}