saml10d16a/rtc/mode0/
intenclr.rs

1#[doc = "Reader of register INTENCLR"]
2pub type R = crate::R<u16, super::INTENCLR>;
3#[doc = "Writer for register INTENCLR"]
4pub type W = crate::W<u16, super::INTENCLR>;
5#[doc = "Register INTENCLR `reset()`'s with value 0"]
6impl crate::ResetValue for super::INTENCLR {
7    type Type = u16;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `PER0`"]
14pub type PER0_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `PER0`"]
16pub struct PER0_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> PER0_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u16) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `PER1`"]
38pub type PER1_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `PER1`"]
40pub struct PER1_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> PER1_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u16) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `PER2`"]
62pub type PER2_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `PER2`"]
64pub struct PER2_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> PER2_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u16) & 0x01) << 2);
82        self.w
83    }
84}
85#[doc = "Reader of field `PER3`"]
86pub type PER3_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `PER3`"]
88pub struct PER3_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> PER3_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u16) & 0x01) << 3);
106        self.w
107    }
108}
109#[doc = "Reader of field `PER4`"]
110pub type PER4_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `PER4`"]
112pub struct PER4_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> PER4_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u16) & 0x01) << 4);
130        self.w
131    }
132}
133#[doc = "Reader of field `PER5`"]
134pub type PER5_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `PER5`"]
136pub struct PER5_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> PER5_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u16) & 0x01) << 5);
154        self.w
155    }
156}
157#[doc = "Reader of field `PER6`"]
158pub type PER6_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `PER6`"]
160pub struct PER6_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> PER6_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u16) & 0x01) << 6);
178        self.w
179    }
180}
181#[doc = "Reader of field `PER7`"]
182pub type PER7_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `PER7`"]
184pub struct PER7_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> PER7_W<'a> {
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u16) & 0x01) << 7);
202        self.w
203    }
204}
205#[doc = "Reader of field `CMP0`"]
206pub type CMP0_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `CMP0`"]
208pub struct CMP0_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> CMP0_W<'a> {
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u16) & 0x01) << 8);
226        self.w
227    }
228}
229#[doc = "Reader of field `TAMPER`"]
230pub type TAMPER_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `TAMPER`"]
232pub struct TAMPER_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> TAMPER_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u16) & 0x01) << 14);
250        self.w
251    }
252}
253#[doc = "Reader of field `OVF`"]
254pub type OVF_R = crate::R<bool, bool>;
255#[doc = "Write proxy for field `OVF`"]
256pub struct OVF_W<'a> {
257    w: &'a mut W,
258}
259impl<'a> OVF_W<'a> {
260    #[doc = r"Sets the field bit"]
261    #[inline(always)]
262    pub fn set_bit(self) -> &'a mut W {
263        self.bit(true)
264    }
265    #[doc = r"Clears the field bit"]
266    #[inline(always)]
267    pub fn clear_bit(self) -> &'a mut W {
268        self.bit(false)
269    }
270    #[doc = r"Writes raw bits to the field"]
271    #[inline(always)]
272    pub fn bit(self, value: bool) -> &'a mut W {
273        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u16) & 0x01) << 15);
274        self.w
275    }
276}
277impl R {
278    #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"]
279    #[inline(always)]
280    pub fn per0(&self) -> PER0_R {
281        PER0_R::new((self.bits & 0x01) != 0)
282    }
283    #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"]
284    #[inline(always)]
285    pub fn per1(&self) -> PER1_R {
286        PER1_R::new(((self.bits >> 1) & 0x01) != 0)
287    }
288    #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"]
289    #[inline(always)]
290    pub fn per2(&self) -> PER2_R {
291        PER2_R::new(((self.bits >> 2) & 0x01) != 0)
292    }
293    #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"]
294    #[inline(always)]
295    pub fn per3(&self) -> PER3_R {
296        PER3_R::new(((self.bits >> 3) & 0x01) != 0)
297    }
298    #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"]
299    #[inline(always)]
300    pub fn per4(&self) -> PER4_R {
301        PER4_R::new(((self.bits >> 4) & 0x01) != 0)
302    }
303    #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"]
304    #[inline(always)]
305    pub fn per5(&self) -> PER5_R {
306        PER5_R::new(((self.bits >> 5) & 0x01) != 0)
307    }
308    #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"]
309    #[inline(always)]
310    pub fn per6(&self) -> PER6_R {
311        PER6_R::new(((self.bits >> 6) & 0x01) != 0)
312    }
313    #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"]
314    #[inline(always)]
315    pub fn per7(&self) -> PER7_R {
316        PER7_R::new(((self.bits >> 7) & 0x01) != 0)
317    }
318    #[doc = "Bit 8 - Compare 0 Interrupt Enable"]
319    #[inline(always)]
320    pub fn cmp0(&self) -> CMP0_R {
321        CMP0_R::new(((self.bits >> 8) & 0x01) != 0)
322    }
323    #[doc = "Bit 14 - Tamper Enable"]
324    #[inline(always)]
325    pub fn tamper(&self) -> TAMPER_R {
326        TAMPER_R::new(((self.bits >> 14) & 0x01) != 0)
327    }
328    #[doc = "Bit 15 - Overflow Interrupt Enable"]
329    #[inline(always)]
330    pub fn ovf(&self) -> OVF_R {
331        OVF_R::new(((self.bits >> 15) & 0x01) != 0)
332    }
333}
334impl W {
335    #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"]
336    #[inline(always)]
337    pub fn per0(&mut self) -> PER0_W {
338        PER0_W { w: self }
339    }
340    #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"]
341    #[inline(always)]
342    pub fn per1(&mut self) -> PER1_W {
343        PER1_W { w: self }
344    }
345    #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"]
346    #[inline(always)]
347    pub fn per2(&mut self) -> PER2_W {
348        PER2_W { w: self }
349    }
350    #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"]
351    #[inline(always)]
352    pub fn per3(&mut self) -> PER3_W {
353        PER3_W { w: self }
354    }
355    #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"]
356    #[inline(always)]
357    pub fn per4(&mut self) -> PER4_W {
358        PER4_W { w: self }
359    }
360    #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"]
361    #[inline(always)]
362    pub fn per5(&mut self) -> PER5_W {
363        PER5_W { w: self }
364    }
365    #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"]
366    #[inline(always)]
367    pub fn per6(&mut self) -> PER6_W {
368        PER6_W { w: self }
369    }
370    #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"]
371    #[inline(always)]
372    pub fn per7(&mut self) -> PER7_W {
373        PER7_W { w: self }
374    }
375    #[doc = "Bit 8 - Compare 0 Interrupt Enable"]
376    #[inline(always)]
377    pub fn cmp0(&mut self) -> CMP0_W {
378        CMP0_W { w: self }
379    }
380    #[doc = "Bit 14 - Tamper Enable"]
381    #[inline(always)]
382    pub fn tamper(&mut self) -> TAMPER_W {
383        TAMPER_W { w: self }
384    }
385    #[doc = "Bit 15 - Overflow Interrupt Enable"]
386    #[inline(always)]
387    pub fn ovf(&mut self) -> OVF_W {
388        OVF_W { w: self }
389    }
390}
saml10d16a/rtc/mode0/intenclr.rs

saml10d16a/rtc/mode0/
intenclr.rs
