saml10d14a/oscctrl/
intflag.rs

1#[doc = "Reader of register INTFLAG"]
2pub type R = crate::R<u32, super::INTFLAG>;
3#[doc = "Writer for register INTFLAG"]
4pub type W = crate::W<u32, super::INTFLAG>;
5#[doc = "Register INTFLAG `reset()`'s with value 0"]
6impl crate::ResetValue for super::INTFLAG {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `XOSCRDY`"]
14pub type XOSCRDY_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `XOSCRDY`"]
16pub struct XOSCRDY_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> XOSCRDY_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `XOSCFAIL`"]
38pub type XOSCFAIL_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `XOSCFAIL`"]
40pub struct XOSCFAIL_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> XOSCFAIL_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `OSC16MRDY`"]
62pub type OSC16MRDY_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `OSC16MRDY`"]
64pub struct OSC16MRDY_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> OSC16MRDY_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
82        self.w
83    }
84}
85#[doc = "Reader of field `DFLLULPRDY`"]
86pub type DFLLULPRDY_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `DFLLULPRDY`"]
88pub struct DFLLULPRDY_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> DFLLULPRDY_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
106        self.w
107    }
108}
109#[doc = "Reader of field `DFLLULPLOCK`"]
110pub type DFLLULPLOCK_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `DFLLULPLOCK`"]
112pub struct DFLLULPLOCK_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> DFLLULPLOCK_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
130        self.w
131    }
132}
133#[doc = "Reader of field `DFLLULPNOLOCK`"]
134pub type DFLLULPNOLOCK_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `DFLLULPNOLOCK`"]
136pub struct DFLLULPNOLOCK_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> DFLLULPNOLOCK_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
154        self.w
155    }
156}
157#[doc = "Reader of field `DPLLLCKR`"]
158pub type DPLLLCKR_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `DPLLLCKR`"]
160pub struct DPLLLCKR_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> DPLLLCKR_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
178        self.w
179    }
180}
181#[doc = "Reader of field `DPLLLCKF`"]
182pub type DPLLLCKF_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `DPLLLCKF`"]
184pub struct DPLLLCKF_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> DPLLLCKF_W<'a> {
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
202        self.w
203    }
204}
205#[doc = "Reader of field `DPLLLTO`"]
206pub type DPLLLTO_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `DPLLLTO`"]
208pub struct DPLLLTO_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> DPLLLTO_W<'a> {
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
226        self.w
227    }
228}
229#[doc = "Reader of field `DPLLLDRTO`"]
230pub type DPLLLDRTO_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `DPLLLDRTO`"]
232pub struct DPLLLDRTO_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> DPLLLDRTO_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
250        self.w
251    }
252}
253impl R {
254    #[doc = "Bit 0 - XOSC Ready"]
255    #[inline(always)]
256    pub fn xoscrdy(&self) -> XOSCRDY_R {
257        XOSCRDY_R::new((self.bits & 0x01) != 0)
258    }
259    #[doc = "Bit 1 - XOSC Clock Failure Detector"]
260    #[inline(always)]
261    pub fn xoscfail(&self) -> XOSCFAIL_R {
262        XOSCFAIL_R::new(((self.bits >> 1) & 0x01) != 0)
263    }
264    #[doc = "Bit 4 - OSC16M Ready"]
265    #[inline(always)]
266    pub fn osc16mrdy(&self) -> OSC16MRDY_R {
267        OSC16MRDY_R::new(((self.bits >> 4) & 0x01) != 0)
268    }
269    #[doc = "Bit 8 - DFLLULP Ready"]
270    #[inline(always)]
271    pub fn dfllulprdy(&self) -> DFLLULPRDY_R {
272        DFLLULPRDY_R::new(((self.bits >> 8) & 0x01) != 0)
273    }
274    #[doc = "Bit 9 - DFLLULP Lock"]
275    #[inline(always)]
276    pub fn dfllulplock(&self) -> DFLLULPLOCK_R {
277        DFLLULPLOCK_R::new(((self.bits >> 9) & 0x01) != 0)
278    }
279    #[doc = "Bit 10 - DFLLULP No Lock"]
280    #[inline(always)]
281    pub fn dfllulpnolock(&self) -> DFLLULPNOLOCK_R {
282        DFLLULPNOLOCK_R::new(((self.bits >> 10) & 0x01) != 0)
283    }
284    #[doc = "Bit 16 - DPLL Lock Rise"]
285    #[inline(always)]
286    pub fn dplllckr(&self) -> DPLLLCKR_R {
287        DPLLLCKR_R::new(((self.bits >> 16) & 0x01) != 0)
288    }
289    #[doc = "Bit 17 - DPLL Lock Fall"]
290    #[inline(always)]
291    pub fn dplllckf(&self) -> DPLLLCKF_R {
292        DPLLLCKF_R::new(((self.bits >> 17) & 0x01) != 0)
293    }
294    #[doc = "Bit 18 - DPLL Lock Timeout"]
295    #[inline(always)]
296    pub fn dplllto(&self) -> DPLLLTO_R {
297        DPLLLTO_R::new(((self.bits >> 18) & 0x01) != 0)
298    }
299    #[doc = "Bit 19 - DPLL Loop Divider Ratio Update Complete"]
300    #[inline(always)]
301    pub fn dpllldrto(&self) -> DPLLLDRTO_R {
302        DPLLLDRTO_R::new(((self.bits >> 19) & 0x01) != 0)
303    }
304}
305impl W {
306    #[doc = "Bit 0 - XOSC Ready"]
307    #[inline(always)]
308    pub fn xoscrdy(&mut self) -> XOSCRDY_W {
309        XOSCRDY_W { w: self }
310    }
311    #[doc = "Bit 1 - XOSC Clock Failure Detector"]
312    #[inline(always)]
313    pub fn xoscfail(&mut self) -> XOSCFAIL_W {
314        XOSCFAIL_W { w: self }
315    }
316    #[doc = "Bit 4 - OSC16M Ready"]
317    #[inline(always)]
318    pub fn osc16mrdy(&mut self) -> OSC16MRDY_W {
319        OSC16MRDY_W { w: self }
320    }
321    #[doc = "Bit 8 - DFLLULP Ready"]
322    #[inline(always)]
323    pub fn dfllulprdy(&mut self) -> DFLLULPRDY_W {
324        DFLLULPRDY_W { w: self }
325    }
326    #[doc = "Bit 9 - DFLLULP Lock"]
327    #[inline(always)]
328    pub fn dfllulplock(&mut self) -> DFLLULPLOCK_W {
329        DFLLULPLOCK_W { w: self }
330    }
331    #[doc = "Bit 10 - DFLLULP No Lock"]
332    #[inline(always)]
333    pub fn dfllulpnolock(&mut self) -> DFLLULPNOLOCK_W {
334        DFLLULPNOLOCK_W { w: self }
335    }
336    #[doc = "Bit 16 - DPLL Lock Rise"]
337    #[inline(always)]
338    pub fn dplllckr(&mut self) -> DPLLLCKR_W {
339        DPLLLCKR_W { w: self }
340    }
341    #[doc = "Bit 17 - DPLL Lock Fall"]
342    #[inline(always)]
343    pub fn dplllckf(&mut self) -> DPLLLCKF_W {
344        DPLLLCKF_W { w: self }
345    }
346    #[doc = "Bit 18 - DPLL Lock Timeout"]
347    #[inline(always)]
348    pub fn dplllto(&mut self) -> DPLLLTO_W {
349        DPLLLTO_W { w: self }
350    }
351    #[doc = "Bit 19 - DPLL Loop Divider Ratio Update Complete"]
352    #[inline(always)]
353    pub fn dpllldrto(&mut self) -> DPLLLDRTO_W {
354        DPLLLDRTO_W { w: self }
355    }
356}
saml10d14a/oscctrl/intflag.rs

saml10d14a/oscctrl/
intflag.rs
