#[doc = "Power Management Controller"]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pmc {
ptr: *mut u8,
}
unsafe impl Send for Pmc {}
unsafe impl Sync for Pmc {}
impl Pmc {
#[inline(always)]
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
Self { ptr: ptr as _ }
}
#[inline(always)]
pub const fn as_ptr(&self) -> *mut () {
self.ptr as _
}
#[doc = "System Clock Enable Register"]
#[inline(always)]
pub const fn scer(self) -> crate::common::Reg<regs::Scer, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0usize) as _) }
}
#[doc = "System Clock Disable Register"]
#[inline(always)]
pub const fn scdr(self) -> crate::common::Reg<regs::Scdr, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x04usize) as _) }
}
#[doc = "System Clock Status Register"]
#[inline(always)]
pub const fn scsr(self) -> crate::common::Reg<regs::Scsr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x08usize) as _) }
}
#[doc = "Peripheral Clock Enable Register 0"]
#[inline(always)]
pub const fn pcer0(self) -> crate::common::Reg<regs::Pcer0, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x10usize) as _) }
}
#[doc = "Peripheral Clock Disable Register 0"]
#[inline(always)]
pub const fn pcdr0(self) -> crate::common::Reg<regs::Pcdr0, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x14usize) as _) }
}
#[doc = "Peripheral Clock Status Register 0"]
#[inline(always)]
pub const fn pcsr0(self) -> crate::common::Reg<regs::Pcsr0, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x18usize) as _) }
}
#[doc = "UTMI Clock Register"]
#[inline(always)]
pub const fn ckgr_uckr(self) -> crate::common::Reg<regs::CkgrUckr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x1cusize) as _) }
}
#[doc = "Main Oscillator Register"]
#[inline(always)]
pub const fn ckgr_mor(self) -> crate::common::Reg<regs::CkgrMor, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x20usize) as _) }
}
#[doc = "Main Clock Frequency Register"]
#[inline(always)]
pub const fn ckgr_mcfr(self) -> crate::common::Reg<regs::CkgrMcfr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x24usize) as _) }
}
#[doc = "PLLA Register"]
#[inline(always)]
pub const fn ckgr_pllar(self) -> crate::common::Reg<regs::CkgrPllar, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x28usize) as _) }
}
#[doc = "Master Clock Register"]
#[inline(always)]
pub const fn mckr(self) -> crate::common::Reg<regs::Mckr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x30usize) as _) }
}
#[doc = "USB Clock Register"]
#[inline(always)]
pub const fn usb(self) -> crate::common::Reg<regs::Usb, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x38usize) as _) }
}
#[doc = "Programmable Clock 0 Register"]
#[inline(always)]
pub const fn pck(self, n: usize) -> crate::common::Reg<regs::Pck, crate::common::RW> {
assert!(n < 3usize);
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x40usize + n * 4usize) as _) }
}
#[doc = "Interrupt Enable Register"]
#[inline(always)]
pub const fn ier(self) -> crate::common::Reg<regs::Ier, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x60usize) as _) }
}
#[doc = "Interrupt Disable Register"]
#[inline(always)]
pub const fn idr(self) -> crate::common::Reg<regs::Idr, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x64usize) as _) }
}
#[doc = "Status Register"]
#[inline(always)]
pub const fn sr(self) -> crate::common::Reg<regs::Sr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x68usize) as _) }
}
#[doc = "Interrupt Mask Register"]
#[inline(always)]
pub const fn imr(self) -> crate::common::Reg<regs::Imr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x6cusize) as _) }
}
#[doc = "Fast Start-up Mode Register"]
#[inline(always)]
pub const fn fsmr(self) -> crate::common::Reg<regs::Fsmr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x70usize) as _) }
}
#[doc = "Fast Start-up Polarity Register"]
#[inline(always)]
pub const fn fspr(self) -> crate::common::Reg<regs::Fspr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x74usize) as _) }
}
#[doc = "Fault Output Clear Register"]
#[inline(always)]
pub const fn focr(self) -> crate::common::Reg<regs::Focr, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x78usize) as _) }
}
#[doc = "Write Protect Mode Register"]
#[inline(always)]
pub const fn wpmr(self) -> crate::common::Reg<regs::Wpmr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0xe4usize) as _) }
}
#[doc = "Write Protect Status Register"]
#[inline(always)]
pub const fn wpsr(self) -> crate::common::Reg<regs::Wpsr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0xe8usize) as _) }
}
#[doc = "Peripheral Clock Enable Register 1"]
#[inline(always)]
pub const fn pcer1(self) -> crate::common::Reg<regs::Pcer1, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0100usize) as _) }
}
#[doc = "Peripheral Clock Disable Register 1"]
#[inline(always)]
pub const fn pcdr1(self) -> crate::common::Reg<regs::Pcdr1, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0104usize) as _) }
}
#[doc = "Peripheral Clock Status Register 1"]
#[inline(always)]
pub const fn pcsr1(self) -> crate::common::Reg<regs::Pcsr1, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0108usize) as _) }
}
#[doc = "Peripheral Control Register"]
#[inline(always)]
pub const fn pcr(self) -> crate::common::Reg<regs::Pcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x010cusize) as _) }
}
}
pub mod regs;
pub mod vals;