#[doc = "Pulse Width Modulation Controller"]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pwm {
ptr: *mut u8,
}
unsafe impl Send for Pwm {}
unsafe impl Sync for Pwm {}
impl Pwm {
#[inline(always)]
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
Self { ptr: ptr as _ }
}
#[inline(always)]
pub const fn as_ptr(&self) -> *mut () {
self.ptr as _
}
#[doc = "PWM Clock Register"]
#[inline(always)]
pub const fn clk(self) -> crate::common::Reg<regs::Clk, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0usize) as _) }
}
#[doc = "PWM Enable Register"]
#[inline(always)]
pub const fn ena(self) -> crate::common::Reg<regs::Ena, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x04usize) as _) }
}
#[doc = "PWM Disable Register"]
#[inline(always)]
pub const fn dis(self) -> crate::common::Reg<regs::Dis, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x08usize) as _) }
}
#[doc = "PWM Status Register"]
#[inline(always)]
pub const fn sr(self) -> crate::common::Reg<regs::Sr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0cusize) as _) }
}
#[doc = "PWM Interrupt Enable Register 1"]
#[inline(always)]
pub const fn ier1(self) -> crate::common::Reg<regs::Ier1, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x10usize) as _) }
}
#[doc = "PWM Interrupt Disable Register 1"]
#[inline(always)]
pub const fn idr1(self) -> crate::common::Reg<regs::Idr1, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x14usize) as _) }
}
#[doc = "PWM Interrupt Mask Register 1"]
#[inline(always)]
pub const fn imr1(self) -> crate::common::Reg<regs::Imr1, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x18usize) as _) }
}
#[doc = "PWM Interrupt Status Register 1"]
#[inline(always)]
pub const fn isr1(self) -> crate::common::Reg<regs::Isr1, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x1cusize) as _) }
}
#[doc = "PWM Sync Channels Mode Register"]
#[inline(always)]
pub const fn scm(self) -> crate::common::Reg<regs::Scm, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x20usize) as _) }
}
#[doc = "PWM Sync Channels Update Control Register"]
#[inline(always)]
pub const fn scuc(self) -> crate::common::Reg<regs::Scuc, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x28usize) as _) }
}
#[doc = "PWM Sync Channels Update Period Register"]
#[inline(always)]
pub const fn scup(self) -> crate::common::Reg<regs::Scup, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x2cusize) as _) }
}
#[doc = "PWM Sync Channels Update Period Update Register"]
#[inline(always)]
pub const fn scupupd(self) -> crate::common::Reg<regs::Scupupd, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x30usize) as _) }
}
#[doc = "PWM Interrupt Enable Register 2"]
#[inline(always)]
pub const fn ier2(self) -> crate::common::Reg<regs::Ier2, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x34usize) as _) }
}
#[doc = "PWM Interrupt Disable Register 2"]
#[inline(always)]
pub const fn idr2(self) -> crate::common::Reg<regs::Idr2, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x38usize) as _) }
}
#[doc = "PWM Interrupt Mask Register 2"]
#[inline(always)]
pub const fn imr2(self) -> crate::common::Reg<regs::Imr2, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x3cusize) as _) }
}
#[doc = "PWM Interrupt Status Register 2"]
#[inline(always)]
pub const fn isr2(self) -> crate::common::Reg<regs::Isr2, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x40usize) as _) }
}
#[doc = "PWM Output Override Value Register"]
#[inline(always)]
pub const fn oov(self) -> crate::common::Reg<regs::Oov, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x44usize) as _) }
}
#[doc = "PWM Output Selection Register"]
#[inline(always)]
pub const fn os(self) -> crate::common::Reg<regs::Os, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x48usize) as _) }
}
#[doc = "PWM Output Selection Set Register"]
#[inline(always)]
pub const fn oss(self) -> crate::common::Reg<regs::Oss, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x4cusize) as _) }
}
#[doc = "PWM Output Selection Clear Register"]
#[inline(always)]
pub const fn osc(self) -> crate::common::Reg<regs::Osc, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x50usize) as _) }
}
#[doc = "PWM Output Selection Set Update Register"]
#[inline(always)]
pub const fn ossupd(self) -> crate::common::Reg<regs::Ossupd, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x54usize) as _) }
}
#[doc = "PWM Output Selection Clear Update Register"]
#[inline(always)]
pub const fn oscupd(self) -> crate::common::Reg<regs::Oscupd, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x58usize) as _) }
}
#[doc = "PWM Fault Mode Register"]
#[inline(always)]
pub const fn fmr(self) -> crate::common::Reg<regs::Fmr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x5cusize) as _) }
}
#[doc = "PWM Fault Status Register"]
#[inline(always)]
pub const fn fsr(self) -> crate::common::Reg<regs::Fsr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x60usize) as _) }
}
#[doc = "PWM Fault Clear Register"]
#[inline(always)]
pub const fn fcr(self) -> crate::common::Reg<regs::Fcr, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x64usize) as _) }
}
#[doc = "PWM Fault Protection Value Register"]
#[inline(always)]
pub const fn fpv(self) -> crate::common::Reg<regs::Fpv, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x68usize) as _) }
}
#[doc = "PWM Fault Protection Enable Register 1"]
#[inline(always)]
pub const fn fpe1(self) -> crate::common::Reg<regs::Fpe1, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x6cusize) as _) }
}
#[doc = "PWM Fault Protection Enable Register 2"]
#[inline(always)]
pub const fn fpe2(self) -> crate::common::Reg<regs::Fpe2, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x70usize) as _) }
}
#[doc = "PWM Event Line 0 Mode Register"]
#[inline(always)]
pub const fn elmr(self, n: usize) -> crate::common::Reg<regs::Elmr, crate::common::RW> {
assert!(n < 2usize);
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x7cusize + n * 4usize) as _) }
}
#[doc = "PWM Stepper Motor Mode Register"]
#[inline(always)]
pub const fn smmr(self) -> crate::common::Reg<regs::Smmr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0xb0usize) as _) }
}
#[doc = "PWM Write Protect Control Register"]
#[inline(always)]
pub const fn wpcr(self) -> crate::common::Reg<regs::Wpcr, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0xe4usize) as _) }
}
#[doc = "PWM Write Protect Status Register"]
#[inline(always)]
pub const fn wpsr(self) -> crate::common::Reg<regs::Wpsr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0xe8usize) as _) }
}
#[doc = "Transmit Pointer Register"]
#[inline(always)]
pub const fn tpr(self) -> crate::common::Reg<regs::Tpr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0108usize) as _) }
}
#[doc = "Transmit Counter Register"]
#[inline(always)]
pub const fn tcr(self) -> crate::common::Reg<regs::Tcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x010cusize) as _) }
}
#[doc = "Transmit Next Pointer Register"]
#[inline(always)]
pub const fn tnpr(self) -> crate::common::Reg<regs::Tnpr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0118usize) as _) }
}
#[doc = "Transmit Next Counter Register"]
#[inline(always)]
pub const fn tncr(self) -> crate::common::Reg<regs::Tncr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x011cusize) as _) }
}
#[doc = "Transfer Control Register"]
#[inline(always)]
pub const fn ptcr(self) -> crate::common::Reg<regs::Ptcr, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0120usize) as _) }
}
#[doc = "Transfer Status Register"]
#[inline(always)]
pub const fn ptsr(self) -> crate::common::Reg<regs::Ptsr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0124usize) as _) }
}
#[doc = "PWM Comparison 0 Value Register"]
#[inline(always)]
pub const fn cmpv(self, n: usize) -> crate::common::Reg<regs::Cmpv, crate::common::RW> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0130usize + n * 16usize) as _)
}
}
#[doc = "PWM Comparison 0 Value Update Register"]
#[inline(always)]
pub const fn cmpvupd(self, n: usize) -> crate::common::Reg<regs::Cmpvupd, crate::common::W> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0134usize + n * 16usize) as _)
}
}
#[doc = "PWM Comparison 0 Mode Register"]
#[inline(always)]
pub const fn cmpm(self, n: usize) -> crate::common::Reg<regs::Cmpm, crate::common::RW> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0138usize + n * 16usize) as _)
}
}
#[doc = "PWM Comparison 0 Mode Update Register"]
#[inline(always)]
pub const fn cmpmupd(self, n: usize) -> crate::common::Reg<regs::Cmpmupd, crate::common::W> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x013cusize + n * 16usize) as _)
}
}
#[doc = "PWM Channel Mode Register (ch_num = 0)"]
#[inline(always)]
pub const fn cmr(self, n: usize) -> crate::common::Reg<regs::Cmr, crate::common::RW> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0200usize + n * 32usize) as _)
}
}
#[doc = "PWM Channel Duty Cycle Register (ch_num = 0)"]
#[inline(always)]
pub const fn cdty(self, n: usize) -> crate::common::Reg<regs::Cdty, crate::common::RW> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0204usize + n * 32usize) as _)
}
}
#[doc = "PWM Channel Duty Cycle Update Register (ch_num = 0)"]
#[inline(always)]
pub const fn cdtyupd(self, n: usize) -> crate::common::Reg<regs::Cdtyupd, crate::common::W> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0208usize + n * 32usize) as _)
}
}
#[doc = "PWM Channel Period Register (ch_num = 0)"]
#[inline(always)]
pub const fn cprd(self, n: usize) -> crate::common::Reg<regs::Cprd, crate::common::RW> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x020cusize + n * 32usize) as _)
}
}
#[doc = "PWM Channel Period Update Register (ch_num = 0)"]
#[inline(always)]
pub const fn cprdupd(self, n: usize) -> crate::common::Reg<regs::Cprdupd, crate::common::W> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0210usize + n * 32usize) as _)
}
}
#[doc = "PWM Channel Counter Register (ch_num = 0)"]
#[inline(always)]
pub const fn ccnt(self, n: usize) -> crate::common::Reg<regs::Ccnt, crate::common::R> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0214usize + n * 32usize) as _)
}
}
#[doc = "PWM Channel Dead Time Register (ch_num = 0)"]
#[inline(always)]
pub const fn dt(self, n: usize) -> crate::common::Reg<regs::Dt, crate::common::RW> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x0218usize + n * 32usize) as _)
}
}
#[doc = "PWM Channel Dead Time Update Register (ch_num = 0)"]
#[inline(always)]
pub const fn dtupd(self, n: usize) -> crate::common::Reg<regs::Dtupd, crate::common::W> {
assert!(n < 8usize);
unsafe {
crate::common::Reg::from_ptr(self.ptr.wrapping_add(0x021cusize + n * 32usize) as _)
}
}
}
pub mod regs;
pub mod vals;