#[doc = "Argument Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Argr(pub u32);
impl Argr {
#[doc = "Command Argument"]
#[must_use]
#[inline(always)]
pub const fn arg(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Command Argument"]
#[inline(always)]
pub const fn set_arg(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Argr {
#[inline(always)]
fn default() -> Argr {
Argr(0)
}
}
impl core::fmt::Debug for Argr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Argr").field("arg", &self.arg()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Argr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Argr {{ arg: {=u32:?} }}", self.arg())
}
}
#[doc = "Block Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Blkr(pub u32);
impl Blkr {
#[doc = "MMC/SDIO Block Count - SDIO Byte Count"]
#[must_use]
#[inline(always)]
pub const fn bcnt(&self) -> u16 {
let val = (self.0 >> 0usize) & 0xffff;
val as u16
}
#[doc = "MMC/SDIO Block Count - SDIO Byte Count"]
#[inline(always)]
pub const fn set_bcnt(&mut self, val: u16) {
self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize);
}
#[doc = "Data Block Length"]
#[must_use]
#[inline(always)]
pub const fn blklen(&self) -> u16 {
let val = (self.0 >> 16usize) & 0xffff;
val as u16
}
#[doc = "Data Block Length"]
#[inline(always)]
pub const fn set_blklen(&mut self, val: u16) {
self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize);
}
}
impl Default for Blkr {
#[inline(always)]
fn default() -> Blkr {
Blkr(0)
}
}
impl core::fmt::Debug for Blkr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Blkr")
.field("bcnt", &self.bcnt())
.field("blklen", &self.blklen())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Blkr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Blkr {{ bcnt: {=u16:?}, blklen: {=u16:?} }}",
self.bcnt(),
self.blklen()
)
}
}
#[doc = "Configuration Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cfg(pub u32);
impl Cfg {
#[doc = "HSMCI Internal FIFO control mode"]
#[must_use]
#[inline(always)]
pub const fn fifomode(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "HSMCI Internal FIFO control mode"]
#[inline(always)]
pub const fn set_fifomode(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Flow Error flag reset control mode"]
#[must_use]
#[inline(always)]
pub const fn ferrctrl(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Flow Error flag reset control mode"]
#[inline(always)]
pub const fn set_ferrctrl(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "High Speed Mode"]
#[must_use]
#[inline(always)]
pub const fn hsmode(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "High Speed Mode"]
#[inline(always)]
pub const fn set_hsmode(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "Synchronize on the last block"]
#[must_use]
#[inline(always)]
pub const fn lsync(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "Synchronize on the last block"]
#[inline(always)]
pub const fn set_lsync(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
}
impl Default for Cfg {
#[inline(always)]
fn default() -> Cfg {
Cfg(0)
}
}
impl core::fmt::Debug for Cfg {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cfg")
.field("fifomode", &self.fifomode())
.field("ferrctrl", &self.ferrctrl())
.field("hsmode", &self.hsmode())
.field("lsync", &self.lsync())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cfg {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Cfg {{ fifomode: {=bool:?}, ferrctrl: {=bool:?}, hsmode: {=bool:?}, lsync: {=bool:?} }}",
self.fifomode(),
self.ferrctrl(),
self.hsmode(),
self.lsync()
)
}
}
#[doc = "Command Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cmdr(pub u32);
impl Cmdr {
#[doc = "Command Number"]
#[must_use]
#[inline(always)]
pub const fn cmdnb(&self) -> u8 {
let val = (self.0 >> 0usize) & 0x3f;
val as u8
}
#[doc = "Command Number"]
#[inline(always)]
pub const fn set_cmdnb(&mut self, val: u8) {
self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize);
}
#[doc = "Response Type"]
#[must_use]
#[inline(always)]
pub const fn rsptyp(&self) -> super::vals::Rsptyp {
let val = (self.0 >> 6usize) & 0x03;
super::vals::Rsptyp::from_bits(val as u8)
}
#[doc = "Response Type"]
#[inline(always)]
pub const fn set_rsptyp(&mut self, val: super::vals::Rsptyp) {
self.0 = (self.0 & !(0x03 << 6usize)) | (((val.to_bits() as u32) & 0x03) << 6usize);
}
#[doc = "Special Command"]
#[must_use]
#[inline(always)]
pub const fn spcmd(&self) -> super::vals::Spcmd {
let val = (self.0 >> 8usize) & 0x07;
super::vals::Spcmd::from_bits(val as u8)
}
#[doc = "Special Command"]
#[inline(always)]
pub const fn set_spcmd(&mut self, val: super::vals::Spcmd) {
self.0 = (self.0 & !(0x07 << 8usize)) | (((val.to_bits() as u32) & 0x07) << 8usize);
}
#[doc = "Open Drain Command"]
#[must_use]
#[inline(always)]
pub const fn opdcmd(&self) -> super::vals::Opdcmd {
let val = (self.0 >> 11usize) & 0x01;
super::vals::Opdcmd::from_bits(val as u8)
}
#[doc = "Open Drain Command"]
#[inline(always)]
pub const fn set_opdcmd(&mut self, val: super::vals::Opdcmd) {
self.0 = (self.0 & !(0x01 << 11usize)) | (((val.to_bits() as u32) & 0x01) << 11usize);
}
#[doc = "Max Latency for Command to Response"]
#[must_use]
#[inline(always)]
pub const fn maxlat(&self) -> super::vals::Maxlat {
let val = (self.0 >> 12usize) & 0x01;
super::vals::Maxlat::from_bits(val as u8)
}
#[doc = "Max Latency for Command to Response"]
#[inline(always)]
pub const fn set_maxlat(&mut self, val: super::vals::Maxlat) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val.to_bits() as u32) & 0x01) << 12usize);
}
#[doc = "Transfer Command"]
#[must_use]
#[inline(always)]
pub const fn trcmd(&self) -> super::vals::Trcmd {
let val = (self.0 >> 16usize) & 0x03;
super::vals::Trcmd::from_bits(val as u8)
}
#[doc = "Transfer Command"]
#[inline(always)]
pub const fn set_trcmd(&mut self, val: super::vals::Trcmd) {
self.0 = (self.0 & !(0x03 << 16usize)) | (((val.to_bits() as u32) & 0x03) << 16usize);
}
#[doc = "Transfer Direction"]
#[must_use]
#[inline(always)]
pub const fn trdir(&self) -> super::vals::Trdir {
let val = (self.0 >> 18usize) & 0x01;
super::vals::Trdir::from_bits(val as u8)
}
#[doc = "Transfer Direction"]
#[inline(always)]
pub const fn set_trdir(&mut self, val: super::vals::Trdir) {
self.0 = (self.0 & !(0x01 << 18usize)) | (((val.to_bits() as u32) & 0x01) << 18usize);
}
#[doc = "Transfer Type"]
#[must_use]
#[inline(always)]
pub const fn trtyp(&self) -> super::vals::Trtyp {
let val = (self.0 >> 19usize) & 0x07;
super::vals::Trtyp::from_bits(val as u8)
}
#[doc = "Transfer Type"]
#[inline(always)]
pub const fn set_trtyp(&mut self, val: super::vals::Trtyp) {
self.0 = (self.0 & !(0x07 << 19usize)) | (((val.to_bits() as u32) & 0x07) << 19usize);
}
#[doc = "SDIO Special Command"]
#[must_use]
#[inline(always)]
pub const fn iospcmd(&self) -> super::vals::Iospcmd {
let val = (self.0 >> 24usize) & 0x03;
super::vals::Iospcmd::from_bits(val as u8)
}
#[doc = "SDIO Special Command"]
#[inline(always)]
pub const fn set_iospcmd(&mut self, val: super::vals::Iospcmd) {
self.0 = (self.0 & !(0x03 << 24usize)) | (((val.to_bits() as u32) & 0x03) << 24usize);
}
#[doc = "ATA with Command Completion Signal"]
#[must_use]
#[inline(always)]
pub const fn atacs(&self) -> super::vals::Atacs {
let val = (self.0 >> 26usize) & 0x01;
super::vals::Atacs::from_bits(val as u8)
}
#[doc = "ATA with Command Completion Signal"]
#[inline(always)]
pub const fn set_atacs(&mut self, val: super::vals::Atacs) {
self.0 = (self.0 & !(0x01 << 26usize)) | (((val.to_bits() as u32) & 0x01) << 26usize);
}
#[doc = "Boot Operation Acknowledge"]
#[must_use]
#[inline(always)]
pub const fn boot_ack(&self) -> bool {
let val = (self.0 >> 27usize) & 0x01;
val != 0
}
#[doc = "Boot Operation Acknowledge"]
#[inline(always)]
pub const fn set_boot_ack(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
}
}
impl Default for Cmdr {
#[inline(always)]
fn default() -> Cmdr {
Cmdr(0)
}
}
impl core::fmt::Debug for Cmdr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cmdr")
.field("cmdnb", &self.cmdnb())
.field("rsptyp", &self.rsptyp())
.field("spcmd", &self.spcmd())
.field("opdcmd", &self.opdcmd())
.field("maxlat", &self.maxlat())
.field("trcmd", &self.trcmd())
.field("trdir", &self.trdir())
.field("trtyp", &self.trtyp())
.field("iospcmd", &self.iospcmd())
.field("atacs", &self.atacs())
.field("boot_ack", &self.boot_ack())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cmdr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Cmdr {{ cmdnb: {=u8:?}, rsptyp: {:?}, spcmd: {:?}, opdcmd: {:?}, maxlat: {:?}, trcmd: {:?}, trdir: {:?}, trtyp: {:?}, iospcmd: {:?}, atacs: {:?}, boot_ack: {=bool:?} }}",
self.cmdnb(),
self.rsptyp(),
self.spcmd(),
self.opdcmd(),
self.maxlat(),
self.trcmd(),
self.trdir(),
self.trtyp(),
self.iospcmd(),
self.atacs(),
self.boot_ack()
)
}
}
#[doc = "Control Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cr(pub u32);
impl Cr {
#[doc = "Multi-Media Interface Enable"]
#[must_use]
#[inline(always)]
pub const fn mcien(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Multi-Media Interface Enable"]
#[inline(always)]
pub const fn set_mcien(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Multi-Media Interface Disable"]
#[must_use]
#[inline(always)]
pub const fn mcidis(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Multi-Media Interface Disable"]
#[inline(always)]
pub const fn set_mcidis(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Power Save Mode Enable"]
#[must_use]
#[inline(always)]
pub const fn pwsen(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "Power Save Mode Enable"]
#[inline(always)]
pub const fn set_pwsen(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "Power Save Mode Disable"]
#[must_use]
#[inline(always)]
pub const fn pwsdis(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Power Save Mode Disable"]
#[inline(always)]
pub const fn set_pwsdis(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Software Reset"]
#[must_use]
#[inline(always)]
pub const fn swrst(&self) -> bool {
let val = (self.0 >> 7usize) & 0x01;
val != 0
}
#[doc = "Software Reset"]
#[inline(always)]
pub const fn set_swrst(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
}
}
impl Default for Cr {
#[inline(always)]
fn default() -> Cr {
Cr(0)
}
}
impl core::fmt::Debug for Cr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cr")
.field("mcien", &self.mcien())
.field("mcidis", &self.mcidis())
.field("pwsen", &self.pwsen())
.field("pwsdis", &self.pwsdis())
.field("swrst", &self.swrst())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Cr {{ mcien: {=bool:?}, mcidis: {=bool:?}, pwsen: {=bool:?}, pwsdis: {=bool:?}, swrst: {=bool:?} }}",
self.mcien(),
self.mcidis(),
self.pwsen(),
self.pwsdis(),
self.swrst()
)
}
}
#[doc = "Completion Signal Timeout Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cstor(pub u32);
impl Cstor {
#[doc = "Completion Signal Timeout Cycle Number"]
#[must_use]
#[inline(always)]
pub const fn cstocyc(&self) -> u8 {
let val = (self.0 >> 0usize) & 0x0f;
val as u8
}
#[doc = "Completion Signal Timeout Cycle Number"]
#[inline(always)]
pub const fn set_cstocyc(&mut self, val: u8) {
self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize);
}
#[doc = "Completion Signal Timeout Multiplier"]
#[must_use]
#[inline(always)]
pub const fn cstomul(&self) -> super::vals::Cstomul {
let val = (self.0 >> 4usize) & 0x07;
super::vals::Cstomul::from_bits(val as u8)
}
#[doc = "Completion Signal Timeout Multiplier"]
#[inline(always)]
pub const fn set_cstomul(&mut self, val: super::vals::Cstomul) {
self.0 = (self.0 & !(0x07 << 4usize)) | (((val.to_bits() as u32) & 0x07) << 4usize);
}
}
impl Default for Cstor {
#[inline(always)]
fn default() -> Cstor {
Cstor(0)
}
}
impl core::fmt::Debug for Cstor {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cstor")
.field("cstocyc", &self.cstocyc())
.field("cstomul", &self.cstomul())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cstor {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Cstor {{ cstocyc: {=u8:?}, cstomul: {:?} }}",
self.cstocyc(),
self.cstomul()
)
}
}
#[doc = "DMA Configuration Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dma(pub u32);
impl Dma {
#[doc = "DMA Write Buffer Offset"]
#[must_use]
#[inline(always)]
pub const fn offset(&self) -> u8 {
let val = (self.0 >> 0usize) & 0x03;
val as u8
}
#[doc = "DMA Write Buffer Offset"]
#[inline(always)]
pub const fn set_offset(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize);
}
#[doc = "DMA Channel Read and Write Chunk Size"]
#[must_use]
#[inline(always)]
pub const fn chksize(&self) -> super::vals::Chksize {
let val = (self.0 >> 4usize) & 0x01;
super::vals::Chksize::from_bits(val as u8)
}
#[doc = "DMA Channel Read and Write Chunk Size"]
#[inline(always)]
pub const fn set_chksize(&mut self, val: super::vals::Chksize) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val.to_bits() as u32) & 0x01) << 4usize);
}
#[doc = "DMA Hardware Handshaking Enable"]
#[must_use]
#[inline(always)]
pub const fn dmaen(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "DMA Hardware Handshaking Enable"]
#[inline(always)]
pub const fn set_dmaen(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "Read Optimization with padding"]
#[must_use]
#[inline(always)]
pub const fn ropt(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "Read Optimization with padding"]
#[inline(always)]
pub const fn set_ropt(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
}
impl Default for Dma {
#[inline(always)]
fn default() -> Dma {
Dma(0)
}
}
impl core::fmt::Debug for Dma {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Dma")
.field("offset", &self.offset())
.field("chksize", &self.chksize())
.field("dmaen", &self.dmaen())
.field("ropt", &self.ropt())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Dma {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Dma {{ offset: {=u8:?}, chksize: {:?}, dmaen: {=bool:?}, ropt: {=bool:?} }}",
self.offset(),
self.chksize(),
self.dmaen(),
self.ropt()
)
}
}
#[doc = "Data Timeout Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dtor(pub u32);
impl Dtor {
#[doc = "Data Timeout Cycle Number"]
#[must_use]
#[inline(always)]
pub const fn dtocyc(&self) -> u8 {
let val = (self.0 >> 0usize) & 0x0f;
val as u8
}
#[doc = "Data Timeout Cycle Number"]
#[inline(always)]
pub const fn set_dtocyc(&mut self, val: u8) {
self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize);
}
#[doc = "Data Timeout Multiplier"]
#[must_use]
#[inline(always)]
pub const fn dtomul(&self) -> super::vals::Dtomul {
let val = (self.0 >> 4usize) & 0x07;
super::vals::Dtomul::from_bits(val as u8)
}
#[doc = "Data Timeout Multiplier"]
#[inline(always)]
pub const fn set_dtomul(&mut self, val: super::vals::Dtomul) {
self.0 = (self.0 & !(0x07 << 4usize)) | (((val.to_bits() as u32) & 0x07) << 4usize);
}
}
impl Default for Dtor {
#[inline(always)]
fn default() -> Dtor {
Dtor(0)
}
}
impl core::fmt::Debug for Dtor {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Dtor")
.field("dtocyc", &self.dtocyc())
.field("dtomul", &self.dtomul())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Dtor {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Dtor {{ dtocyc: {=u8:?}, dtomul: {:?} }}",
self.dtocyc(),
self.dtomul()
)
}
}
#[doc = "FIFO Memory Aperture0"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Fifo(pub u32);
impl Fifo {
#[doc = "Data to Read or Data to Write"]
#[must_use]
#[inline(always)]
pub const fn data(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Data to Read or Data to Write"]
#[inline(always)]
pub const fn set_data(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Fifo {
#[inline(always)]
fn default() -> Fifo {
Fifo(0)
}
}
impl core::fmt::Debug for Fifo {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Fifo").field("data", &self.data()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Fifo {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Fifo {{ data: {=u32:?} }}", self.data())
}
}
#[doc = "Interrupt Disable Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Idr(pub u32);
impl Idr {
#[doc = "Command Ready Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn cmdrdy(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Command Ready Interrupt Disable"]
#[inline(always)]
pub const fn set_cmdrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Receiver Ready Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn rxrdy(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Receiver Ready Interrupt Disable"]
#[inline(always)]
pub const fn set_rxrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Transmit Ready Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn txrdy(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "Transmit Ready Interrupt Disable"]
#[inline(always)]
pub const fn set_txrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "Data Block Ended Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn blke(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Data Block Ended Interrupt Disable"]
#[inline(always)]
pub const fn set_blke(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Data Transfer in Progress Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn dtip(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Data Transfer in Progress Interrupt Disable"]
#[inline(always)]
pub const fn set_dtip(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "Data Not Busy Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn notbusy(&self) -> bool {
let val = (self.0 >> 5usize) & 0x01;
val != 0
}
#[doc = "Data Not Busy Interrupt Disable"]
#[inline(always)]
pub const fn set_notbusy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_a(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_a(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_b(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_b(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "SDIO Read Wait Operation Status Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn sdiowait(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "SDIO Read Wait Operation Status Interrupt Disable"]
#[inline(always)]
pub const fn set_sdiowait(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Completion Signal received interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn csrcv(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "Completion Signal received interrupt Disable"]
#[inline(always)]
pub const fn set_csrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "Response Index Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn rinde(&self) -> bool {
let val = (self.0 >> 16usize) & 0x01;
val != 0
}
#[doc = "Response Index Error Interrupt Disable"]
#[inline(always)]
pub const fn set_rinde(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
}
#[doc = "Response Direction Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn rdire(&self) -> bool {
let val = (self.0 >> 17usize) & 0x01;
val != 0
}
#[doc = "Response Direction Error Interrupt Disable"]
#[inline(always)]
pub const fn set_rdire(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
}
#[doc = "Response CRC Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn rcrce(&self) -> bool {
let val = (self.0 >> 18usize) & 0x01;
val != 0
}
#[doc = "Response CRC Error Interrupt Disable"]
#[inline(always)]
pub const fn set_rcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
}
#[doc = "Response End Bit Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn rende(&self) -> bool {
let val = (self.0 >> 19usize) & 0x01;
val != 0
}
#[doc = "Response End Bit Error Interrupt Disable"]
#[inline(always)]
pub const fn set_rende(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize);
}
#[doc = "Response Time-out Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn rtoe(&self) -> bool {
let val = (self.0 >> 20usize) & 0x01;
val != 0
}
#[doc = "Response Time-out Error Interrupt Disable"]
#[inline(always)]
pub const fn set_rtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
}
#[doc = "Data CRC Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn dcrce(&self) -> bool {
let val = (self.0 >> 21usize) & 0x01;
val != 0
}
#[doc = "Data CRC Error Interrupt Disable"]
#[inline(always)]
pub const fn set_dcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize);
}
#[doc = "Data Time-out Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn dtoe(&self) -> bool {
let val = (self.0 >> 22usize) & 0x01;
val != 0
}
#[doc = "Data Time-out Error Interrupt Disable"]
#[inline(always)]
pub const fn set_dtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
}
#[doc = "Completion Signal Time out Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn cstoe(&self) -> bool {
let val = (self.0 >> 23usize) & 0x01;
val != 0
}
#[doc = "Completion Signal Time out Error Interrupt Disable"]
#[inline(always)]
pub const fn set_cstoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
}
#[doc = "DMA Block Overrun Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn blkovre(&self) -> bool {
let val = (self.0 >> 24usize) & 0x01;
val != 0
}
#[doc = "DMA Block Overrun Error Interrupt Disable"]
#[inline(always)]
pub const fn set_blkovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize);
}
#[doc = "DMA Transfer completed Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn dmadone(&self) -> bool {
let val = (self.0 >> 25usize) & 0x01;
val != 0
}
#[doc = "DMA Transfer completed Interrupt Disable"]
#[inline(always)]
pub const fn set_dmadone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize);
}
#[doc = "FIFO empty Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn fifoempty(&self) -> bool {
let val = (self.0 >> 26usize) & 0x01;
val != 0
}
#[doc = "FIFO empty Interrupt Disable"]
#[inline(always)]
pub const fn set_fifoempty(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
}
#[doc = "Transfer Done Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn xfrdone(&self) -> bool {
let val = (self.0 >> 27usize) & 0x01;
val != 0
}
#[doc = "Transfer Done Interrupt Disable"]
#[inline(always)]
pub const fn set_xfrdone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
}
#[doc = "Boot Acknowledge Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn ackrcv(&self) -> bool {
let val = (self.0 >> 28usize) & 0x01;
val != 0
}
#[doc = "Boot Acknowledge Interrupt Disable"]
#[inline(always)]
pub const fn set_ackrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize);
}
#[doc = "Boot Acknowledge Error Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn ackrcve(&self) -> bool {
let val = (self.0 >> 29usize) & 0x01;
val != 0
}
#[doc = "Boot Acknowledge Error Interrupt Disable"]
#[inline(always)]
pub const fn set_ackrcve(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize);
}
#[doc = "Overrun Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn ovre(&self) -> bool {
let val = (self.0 >> 30usize) & 0x01;
val != 0
}
#[doc = "Overrun Interrupt Disable"]
#[inline(always)]
pub const fn set_ovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
}
#[doc = "Underrun Interrupt Disable"]
#[must_use]
#[inline(always)]
pub const fn unre(&self) -> bool {
let val = (self.0 >> 31usize) & 0x01;
val != 0
}
#[doc = "Underrun Interrupt Disable"]
#[inline(always)]
pub const fn set_unre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
}
}
impl Default for Idr {
#[inline(always)]
fn default() -> Idr {
Idr(0)
}
}
impl core::fmt::Debug for Idr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Idr")
.field("cmdrdy", &self.cmdrdy())
.field("rxrdy", &self.rxrdy())
.field("txrdy", &self.txrdy())
.field("blke", &self.blke())
.field("dtip", &self.dtip())
.field("notbusy", &self.notbusy())
.field("sdioirqfor_slot_a", &self.sdioirqfor_slot_a())
.field("sdioirqfor_slot_b", &self.sdioirqfor_slot_b())
.field("sdiowait", &self.sdiowait())
.field("csrcv", &self.csrcv())
.field("rinde", &self.rinde())
.field("rdire", &self.rdire())
.field("rcrce", &self.rcrce())
.field("rende", &self.rende())
.field("rtoe", &self.rtoe())
.field("dcrce", &self.dcrce())
.field("dtoe", &self.dtoe())
.field("cstoe", &self.cstoe())
.field("blkovre", &self.blkovre())
.field("dmadone", &self.dmadone())
.field("fifoempty", &self.fifoempty())
.field("xfrdone", &self.xfrdone())
.field("ackrcv", &self.ackrcv())
.field("ackrcve", &self.ackrcve())
.field("ovre", &self.ovre())
.field("unre", &self.unre())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Idr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Idr {{ cmdrdy: {=bool:?}, rxrdy: {=bool:?}, txrdy: {=bool:?}, blke: {=bool:?}, dtip: {=bool:?}, notbusy: {=bool:?}, sdioirqfor_slot_a: {=bool:?}, sdioirqfor_slot_b: {=bool:?}, sdiowait: {=bool:?}, csrcv: {=bool:?}, rinde: {=bool:?}, rdire: {=bool:?}, rcrce: {=bool:?}, rende: {=bool:?}, rtoe: {=bool:?}, dcrce: {=bool:?}, dtoe: {=bool:?}, cstoe: {=bool:?}, blkovre: {=bool:?}, dmadone: {=bool:?}, fifoempty: {=bool:?}, xfrdone: {=bool:?}, ackrcv: {=bool:?}, ackrcve: {=bool:?}, ovre: {=bool:?}, unre: {=bool:?} }}",
self.cmdrdy(),
self.rxrdy(),
self.txrdy(),
self.blke(),
self.dtip(),
self.notbusy(),
self.sdioirqfor_slot_a(),
self.sdioirqfor_slot_b(),
self.sdiowait(),
self.csrcv(),
self.rinde(),
self.rdire(),
self.rcrce(),
self.rende(),
self.rtoe(),
self.dcrce(),
self.dtoe(),
self.cstoe(),
self.blkovre(),
self.dmadone(),
self.fifoempty(),
self.xfrdone(),
self.ackrcv(),
self.ackrcve(),
self.ovre(),
self.unre()
)
}
}
#[doc = "Interrupt Enable Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ier(pub u32);
impl Ier {
#[doc = "Command Ready Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn cmdrdy(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Command Ready Interrupt Enable"]
#[inline(always)]
pub const fn set_cmdrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Receiver Ready Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn rxrdy(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Receiver Ready Interrupt Enable"]
#[inline(always)]
pub const fn set_rxrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Transmit Ready Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn txrdy(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "Transmit Ready Interrupt Enable"]
#[inline(always)]
pub const fn set_txrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "Data Block Ended Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn blke(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Data Block Ended Interrupt Enable"]
#[inline(always)]
pub const fn set_blke(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Data Transfer in Progress Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn dtip(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Data Transfer in Progress Interrupt Enable"]
#[inline(always)]
pub const fn set_dtip(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "Data Not Busy Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn notbusy(&self) -> bool {
let val = (self.0 >> 5usize) & 0x01;
val != 0
}
#[doc = "Data Not Busy Interrupt Enable"]
#[inline(always)]
pub const fn set_notbusy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_a(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_a(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_b(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_b(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "SDIO Read Wait Operation Status Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn sdiowait(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "SDIO Read Wait Operation Status Interrupt Enable"]
#[inline(always)]
pub const fn set_sdiowait(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Completion Signal Received Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn csrcv(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "Completion Signal Received Interrupt Enable"]
#[inline(always)]
pub const fn set_csrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "Response Index Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn rinde(&self) -> bool {
let val = (self.0 >> 16usize) & 0x01;
val != 0
}
#[doc = "Response Index Error Interrupt Enable"]
#[inline(always)]
pub const fn set_rinde(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
}
#[doc = "Response Direction Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn rdire(&self) -> bool {
let val = (self.0 >> 17usize) & 0x01;
val != 0
}
#[doc = "Response Direction Error Interrupt Enable"]
#[inline(always)]
pub const fn set_rdire(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
}
#[doc = "Response CRC Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn rcrce(&self) -> bool {
let val = (self.0 >> 18usize) & 0x01;
val != 0
}
#[doc = "Response CRC Error Interrupt Enable"]
#[inline(always)]
pub const fn set_rcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
}
#[doc = "Response End Bit Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn rende(&self) -> bool {
let val = (self.0 >> 19usize) & 0x01;
val != 0
}
#[doc = "Response End Bit Error Interrupt Enable"]
#[inline(always)]
pub const fn set_rende(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize);
}
#[doc = "Response Time-out Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn rtoe(&self) -> bool {
let val = (self.0 >> 20usize) & 0x01;
val != 0
}
#[doc = "Response Time-out Error Interrupt Enable"]
#[inline(always)]
pub const fn set_rtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
}
#[doc = "Data CRC Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn dcrce(&self) -> bool {
let val = (self.0 >> 21usize) & 0x01;
val != 0
}
#[doc = "Data CRC Error Interrupt Enable"]
#[inline(always)]
pub const fn set_dcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize);
}
#[doc = "Data Time-out Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn dtoe(&self) -> bool {
let val = (self.0 >> 22usize) & 0x01;
val != 0
}
#[doc = "Data Time-out Error Interrupt Enable"]
#[inline(always)]
pub const fn set_dtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
}
#[doc = "Completion Signal Timeout Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn cstoe(&self) -> bool {
let val = (self.0 >> 23usize) & 0x01;
val != 0
}
#[doc = "Completion Signal Timeout Error Interrupt Enable"]
#[inline(always)]
pub const fn set_cstoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
}
#[doc = "DMA Block Overrun Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn blkovre(&self) -> bool {
let val = (self.0 >> 24usize) & 0x01;
val != 0
}
#[doc = "DMA Block Overrun Error Interrupt Enable"]
#[inline(always)]
pub const fn set_blkovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize);
}
#[doc = "DMA Transfer completed Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn dmadone(&self) -> bool {
let val = (self.0 >> 25usize) & 0x01;
val != 0
}
#[doc = "DMA Transfer completed Interrupt Enable"]
#[inline(always)]
pub const fn set_dmadone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize);
}
#[doc = "FIFO empty Interrupt enable"]
#[must_use]
#[inline(always)]
pub const fn fifoempty(&self) -> bool {
let val = (self.0 >> 26usize) & 0x01;
val != 0
}
#[doc = "FIFO empty Interrupt enable"]
#[inline(always)]
pub const fn set_fifoempty(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
}
#[doc = "Transfer Done Interrupt enable"]
#[must_use]
#[inline(always)]
pub const fn xfrdone(&self) -> bool {
let val = (self.0 >> 27usize) & 0x01;
val != 0
}
#[doc = "Transfer Done Interrupt enable"]
#[inline(always)]
pub const fn set_xfrdone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
}
#[doc = "Boot Acknowledge Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn ackrcv(&self) -> bool {
let val = (self.0 >> 28usize) & 0x01;
val != 0
}
#[doc = "Boot Acknowledge Interrupt Enable"]
#[inline(always)]
pub const fn set_ackrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize);
}
#[doc = "Boot Acknowledge Error Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn ackrcve(&self) -> bool {
let val = (self.0 >> 29usize) & 0x01;
val != 0
}
#[doc = "Boot Acknowledge Error Interrupt Enable"]
#[inline(always)]
pub const fn set_ackrcve(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize);
}
#[doc = "Overrun Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn ovre(&self) -> bool {
let val = (self.0 >> 30usize) & 0x01;
val != 0
}
#[doc = "Overrun Interrupt Enable"]
#[inline(always)]
pub const fn set_ovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
}
#[doc = "Underrun Interrupt Enable"]
#[must_use]
#[inline(always)]
pub const fn unre(&self) -> bool {
let val = (self.0 >> 31usize) & 0x01;
val != 0
}
#[doc = "Underrun Interrupt Enable"]
#[inline(always)]
pub const fn set_unre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
}
}
impl Default for Ier {
#[inline(always)]
fn default() -> Ier {
Ier(0)
}
}
impl core::fmt::Debug for Ier {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Ier")
.field("cmdrdy", &self.cmdrdy())
.field("rxrdy", &self.rxrdy())
.field("txrdy", &self.txrdy())
.field("blke", &self.blke())
.field("dtip", &self.dtip())
.field("notbusy", &self.notbusy())
.field("sdioirqfor_slot_a", &self.sdioirqfor_slot_a())
.field("sdioirqfor_slot_b", &self.sdioirqfor_slot_b())
.field("sdiowait", &self.sdiowait())
.field("csrcv", &self.csrcv())
.field("rinde", &self.rinde())
.field("rdire", &self.rdire())
.field("rcrce", &self.rcrce())
.field("rende", &self.rende())
.field("rtoe", &self.rtoe())
.field("dcrce", &self.dcrce())
.field("dtoe", &self.dtoe())
.field("cstoe", &self.cstoe())
.field("blkovre", &self.blkovre())
.field("dmadone", &self.dmadone())
.field("fifoempty", &self.fifoempty())
.field("xfrdone", &self.xfrdone())
.field("ackrcv", &self.ackrcv())
.field("ackrcve", &self.ackrcve())
.field("ovre", &self.ovre())
.field("unre", &self.unre())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Ier {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Ier {{ cmdrdy: {=bool:?}, rxrdy: {=bool:?}, txrdy: {=bool:?}, blke: {=bool:?}, dtip: {=bool:?}, notbusy: {=bool:?}, sdioirqfor_slot_a: {=bool:?}, sdioirqfor_slot_b: {=bool:?}, sdiowait: {=bool:?}, csrcv: {=bool:?}, rinde: {=bool:?}, rdire: {=bool:?}, rcrce: {=bool:?}, rende: {=bool:?}, rtoe: {=bool:?}, dcrce: {=bool:?}, dtoe: {=bool:?}, cstoe: {=bool:?}, blkovre: {=bool:?}, dmadone: {=bool:?}, fifoempty: {=bool:?}, xfrdone: {=bool:?}, ackrcv: {=bool:?}, ackrcve: {=bool:?}, ovre: {=bool:?}, unre: {=bool:?} }}",
self.cmdrdy(),
self.rxrdy(),
self.txrdy(),
self.blke(),
self.dtip(),
self.notbusy(),
self.sdioirqfor_slot_a(),
self.sdioirqfor_slot_b(),
self.sdiowait(),
self.csrcv(),
self.rinde(),
self.rdire(),
self.rcrce(),
self.rende(),
self.rtoe(),
self.dcrce(),
self.dtoe(),
self.cstoe(),
self.blkovre(),
self.dmadone(),
self.fifoempty(),
self.xfrdone(),
self.ackrcv(),
self.ackrcve(),
self.ovre(),
self.unre()
)
}
}
#[doc = "Interrupt Mask Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Imr(pub u32);
impl Imr {
#[doc = "Command Ready Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn cmdrdy(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Command Ready Interrupt Mask"]
#[inline(always)]
pub const fn set_cmdrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Receiver Ready Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn rxrdy(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Receiver Ready Interrupt Mask"]
#[inline(always)]
pub const fn set_rxrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Transmit Ready Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn txrdy(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "Transmit Ready Interrupt Mask"]
#[inline(always)]
pub const fn set_txrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "Data Block Ended Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn blke(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Data Block Ended Interrupt Mask"]
#[inline(always)]
pub const fn set_blke(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Data Transfer in Progress Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn dtip(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Data Transfer in Progress Interrupt Mask"]
#[inline(always)]
pub const fn set_dtip(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "Data Not Busy Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn notbusy(&self) -> bool {
let val = (self.0 >> 5usize) & 0x01;
val != 0
}
#[doc = "Data Not Busy Interrupt Mask"]
#[inline(always)]
pub const fn set_notbusy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_a(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_a(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_b(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_b(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "SDIO Read Wait Operation Status Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn sdiowait(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "SDIO Read Wait Operation Status Interrupt Mask"]
#[inline(always)]
pub const fn set_sdiowait(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Completion Signal Received Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn csrcv(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "Completion Signal Received Interrupt Mask"]
#[inline(always)]
pub const fn set_csrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "Response Index Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn rinde(&self) -> bool {
let val = (self.0 >> 16usize) & 0x01;
val != 0
}
#[doc = "Response Index Error Interrupt Mask"]
#[inline(always)]
pub const fn set_rinde(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
}
#[doc = "Response Direction Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn rdire(&self) -> bool {
let val = (self.0 >> 17usize) & 0x01;
val != 0
}
#[doc = "Response Direction Error Interrupt Mask"]
#[inline(always)]
pub const fn set_rdire(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
}
#[doc = "Response CRC Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn rcrce(&self) -> bool {
let val = (self.0 >> 18usize) & 0x01;
val != 0
}
#[doc = "Response CRC Error Interrupt Mask"]
#[inline(always)]
pub const fn set_rcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
}
#[doc = "Response End Bit Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn rende(&self) -> bool {
let val = (self.0 >> 19usize) & 0x01;
val != 0
}
#[doc = "Response End Bit Error Interrupt Mask"]
#[inline(always)]
pub const fn set_rende(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize);
}
#[doc = "Response Time-out Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn rtoe(&self) -> bool {
let val = (self.0 >> 20usize) & 0x01;
val != 0
}
#[doc = "Response Time-out Error Interrupt Mask"]
#[inline(always)]
pub const fn set_rtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
}
#[doc = "Data CRC Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn dcrce(&self) -> bool {
let val = (self.0 >> 21usize) & 0x01;
val != 0
}
#[doc = "Data CRC Error Interrupt Mask"]
#[inline(always)]
pub const fn set_dcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize);
}
#[doc = "Data Time-out Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn dtoe(&self) -> bool {
let val = (self.0 >> 22usize) & 0x01;
val != 0
}
#[doc = "Data Time-out Error Interrupt Mask"]
#[inline(always)]
pub const fn set_dtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
}
#[doc = "Completion Signal Time-out Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn cstoe(&self) -> bool {
let val = (self.0 >> 23usize) & 0x01;
val != 0
}
#[doc = "Completion Signal Time-out Error Interrupt Mask"]
#[inline(always)]
pub const fn set_cstoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
}
#[doc = "DMA Block Overrun Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn blkovre(&self) -> bool {
let val = (self.0 >> 24usize) & 0x01;
val != 0
}
#[doc = "DMA Block Overrun Error Interrupt Mask"]
#[inline(always)]
pub const fn set_blkovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize);
}
#[doc = "DMA Transfer Completed Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn dmadone(&self) -> bool {
let val = (self.0 >> 25usize) & 0x01;
val != 0
}
#[doc = "DMA Transfer Completed Interrupt Mask"]
#[inline(always)]
pub const fn set_dmadone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize);
}
#[doc = "FIFO Empty Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn fifoempty(&self) -> bool {
let val = (self.0 >> 26usize) & 0x01;
val != 0
}
#[doc = "FIFO Empty Interrupt Mask"]
#[inline(always)]
pub const fn set_fifoempty(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
}
#[doc = "Transfer Done Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn xfrdone(&self) -> bool {
let val = (self.0 >> 27usize) & 0x01;
val != 0
}
#[doc = "Transfer Done Interrupt Mask"]
#[inline(always)]
pub const fn set_xfrdone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
}
#[doc = "Boot Operation Acknowledge Received Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn ackrcv(&self) -> bool {
let val = (self.0 >> 28usize) & 0x01;
val != 0
}
#[doc = "Boot Operation Acknowledge Received Interrupt Mask"]
#[inline(always)]
pub const fn set_ackrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize);
}
#[doc = "Boot Operation Acknowledge Error Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn ackrcve(&self) -> bool {
let val = (self.0 >> 29usize) & 0x01;
val != 0
}
#[doc = "Boot Operation Acknowledge Error Interrupt Mask"]
#[inline(always)]
pub const fn set_ackrcve(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize);
}
#[doc = "Overrun Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn ovre(&self) -> bool {
let val = (self.0 >> 30usize) & 0x01;
val != 0
}
#[doc = "Overrun Interrupt Mask"]
#[inline(always)]
pub const fn set_ovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
}
#[doc = "Underrun Interrupt Mask"]
#[must_use]
#[inline(always)]
pub const fn unre(&self) -> bool {
let val = (self.0 >> 31usize) & 0x01;
val != 0
}
#[doc = "Underrun Interrupt Mask"]
#[inline(always)]
pub const fn set_unre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
}
}
impl Default for Imr {
#[inline(always)]
fn default() -> Imr {
Imr(0)
}
}
impl core::fmt::Debug for Imr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Imr")
.field("cmdrdy", &self.cmdrdy())
.field("rxrdy", &self.rxrdy())
.field("txrdy", &self.txrdy())
.field("blke", &self.blke())
.field("dtip", &self.dtip())
.field("notbusy", &self.notbusy())
.field("sdioirqfor_slot_a", &self.sdioirqfor_slot_a())
.field("sdioirqfor_slot_b", &self.sdioirqfor_slot_b())
.field("sdiowait", &self.sdiowait())
.field("csrcv", &self.csrcv())
.field("rinde", &self.rinde())
.field("rdire", &self.rdire())
.field("rcrce", &self.rcrce())
.field("rende", &self.rende())
.field("rtoe", &self.rtoe())
.field("dcrce", &self.dcrce())
.field("dtoe", &self.dtoe())
.field("cstoe", &self.cstoe())
.field("blkovre", &self.blkovre())
.field("dmadone", &self.dmadone())
.field("fifoempty", &self.fifoempty())
.field("xfrdone", &self.xfrdone())
.field("ackrcv", &self.ackrcv())
.field("ackrcve", &self.ackrcve())
.field("ovre", &self.ovre())
.field("unre", &self.unre())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Imr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Imr {{ cmdrdy: {=bool:?}, rxrdy: {=bool:?}, txrdy: {=bool:?}, blke: {=bool:?}, dtip: {=bool:?}, notbusy: {=bool:?}, sdioirqfor_slot_a: {=bool:?}, sdioirqfor_slot_b: {=bool:?}, sdiowait: {=bool:?}, csrcv: {=bool:?}, rinde: {=bool:?}, rdire: {=bool:?}, rcrce: {=bool:?}, rende: {=bool:?}, rtoe: {=bool:?}, dcrce: {=bool:?}, dtoe: {=bool:?}, cstoe: {=bool:?}, blkovre: {=bool:?}, dmadone: {=bool:?}, fifoempty: {=bool:?}, xfrdone: {=bool:?}, ackrcv: {=bool:?}, ackrcve: {=bool:?}, ovre: {=bool:?}, unre: {=bool:?} }}",
self.cmdrdy(),
self.rxrdy(),
self.txrdy(),
self.blke(),
self.dtip(),
self.notbusy(),
self.sdioirqfor_slot_a(),
self.sdioirqfor_slot_b(),
self.sdiowait(),
self.csrcv(),
self.rinde(),
self.rdire(),
self.rcrce(),
self.rende(),
self.rtoe(),
self.dcrce(),
self.dtoe(),
self.cstoe(),
self.blkovre(),
self.dmadone(),
self.fifoempty(),
self.xfrdone(),
self.ackrcv(),
self.ackrcve(),
self.ovre(),
self.unre()
)
}
}
#[doc = "Mode Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mr(pub u32);
impl Mr {
#[doc = "Clock Divider"]
#[must_use]
#[inline(always)]
pub const fn clkdiv(&self) -> u8 {
let val = (self.0 >> 0usize) & 0xff;
val as u8
}
#[doc = "Clock Divider"]
#[inline(always)]
pub const fn set_clkdiv(&mut self, val: u8) {
self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
}
#[doc = "Power Saving Divider"]
#[must_use]
#[inline(always)]
pub const fn pwsdiv(&self) -> u8 {
let val = (self.0 >> 8usize) & 0x07;
val as u8
}
#[doc = "Power Saving Divider"]
#[inline(always)]
pub const fn set_pwsdiv(&mut self, val: u8) {
self.0 = (self.0 & !(0x07 << 8usize)) | (((val as u32) & 0x07) << 8usize);
}
#[doc = "Read Proof Enable"]
#[must_use]
#[inline(always)]
pub const fn rdproof(&self) -> bool {
let val = (self.0 >> 11usize) & 0x01;
val != 0
}
#[doc = "Read Proof Enable"]
#[inline(always)]
pub const fn set_rdproof(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
}
#[doc = "Write Proof Enable"]
#[must_use]
#[inline(always)]
pub const fn wrproof(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "Write Proof Enable"]
#[inline(always)]
pub const fn set_wrproof(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Force Byte Transfer"]
#[must_use]
#[inline(always)]
pub const fn fbyte(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "Force Byte Transfer"]
#[inline(always)]
pub const fn set_fbyte(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "Padding Value"]
#[must_use]
#[inline(always)]
pub const fn padv(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "Padding Value"]
#[inline(always)]
pub const fn set_padv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
}
impl Default for Mr {
#[inline(always)]
fn default() -> Mr {
Mr(0)
}
}
impl core::fmt::Debug for Mr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Mr")
.field("clkdiv", &self.clkdiv())
.field("pwsdiv", &self.pwsdiv())
.field("rdproof", &self.rdproof())
.field("wrproof", &self.wrproof())
.field("fbyte", &self.fbyte())
.field("padv", &self.padv())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Mr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Mr {{ clkdiv: {=u8:?}, pwsdiv: {=u8:?}, rdproof: {=bool:?}, wrproof: {=bool:?}, fbyte: {=bool:?}, padv: {=bool:?} }}",
self.clkdiv(),
self.pwsdiv(),
self.rdproof(),
self.wrproof(),
self.fbyte(),
self.padv()
)
}
}
#[doc = "Receive Data Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Rdr(pub u32);
impl Rdr {
#[doc = "Data to Read"]
#[must_use]
#[inline(always)]
pub const fn data(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Data to Read"]
#[inline(always)]
pub const fn set_data(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Rdr {
#[inline(always)]
fn default() -> Rdr {
Rdr(0)
}
}
impl core::fmt::Debug for Rdr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Rdr").field("data", &self.data()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Rdr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Rdr {{ data: {=u32:?} }}", self.data())
}
}
#[doc = "Response Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Rspr(pub u32);
impl Rspr {
#[doc = "Response"]
#[must_use]
#[inline(always)]
pub const fn rsp(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Response"]
#[inline(always)]
pub const fn set_rsp(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Rspr {
#[inline(always)]
fn default() -> Rspr {
Rspr(0)
}
}
impl core::fmt::Debug for Rspr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Rspr").field("rsp", &self.rsp()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Rspr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Rspr {{ rsp: {=u32:?} }}", self.rsp())
}
}
#[doc = "SD/SDIO Card Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Sdcr(pub u32);
impl Sdcr {
#[doc = "SDCard/SDIO Slot"]
#[must_use]
#[inline(always)]
pub const fn sdcsel(&self) -> super::vals::Sdcsel {
let val = (self.0 >> 0usize) & 0x03;
super::vals::Sdcsel::from_bits(val as u8)
}
#[doc = "SDCard/SDIO Slot"]
#[inline(always)]
pub const fn set_sdcsel(&mut self, val: super::vals::Sdcsel) {
self.0 = (self.0 & !(0x03 << 0usize)) | (((val.to_bits() as u32) & 0x03) << 0usize);
}
#[doc = "SDCard/SDIO Bus Width"]
#[must_use]
#[inline(always)]
pub const fn sdcbus(&self) -> super::vals::Sdcbus {
let val = (self.0 >> 6usize) & 0x03;
super::vals::Sdcbus::from_bits(val as u8)
}
#[doc = "SDCard/SDIO Bus Width"]
#[inline(always)]
pub const fn set_sdcbus(&mut self, val: super::vals::Sdcbus) {
self.0 = (self.0 & !(0x03 << 6usize)) | (((val.to_bits() as u32) & 0x03) << 6usize);
}
}
impl Default for Sdcr {
#[inline(always)]
fn default() -> Sdcr {
Sdcr(0)
}
}
impl core::fmt::Debug for Sdcr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Sdcr")
.field("sdcsel", &self.sdcsel())
.field("sdcbus", &self.sdcbus())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Sdcr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Sdcr {{ sdcsel: {:?}, sdcbus: {:?} }}",
self.sdcsel(),
self.sdcbus()
)
}
}
#[doc = "Status Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Sr(pub u32);
impl Sr {
#[doc = "Command Ready"]
#[must_use]
#[inline(always)]
pub const fn cmdrdy(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Command Ready"]
#[inline(always)]
pub const fn set_cmdrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Receiver Ready"]
#[must_use]
#[inline(always)]
pub const fn rxrdy(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Receiver Ready"]
#[inline(always)]
pub const fn set_rxrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Transmit Ready"]
#[must_use]
#[inline(always)]
pub const fn txrdy(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "Transmit Ready"]
#[inline(always)]
pub const fn set_txrdy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "Data Block Ended"]
#[must_use]
#[inline(always)]
pub const fn blke(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Data Block Ended"]
#[inline(always)]
pub const fn set_blke(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Data Transfer in Progress"]
#[must_use]
#[inline(always)]
pub const fn dtip(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Data Transfer in Progress"]
#[inline(always)]
pub const fn set_dtip(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "HSMCI Not Busy"]
#[must_use]
#[inline(always)]
pub const fn notbusy(&self) -> bool {
let val = (self.0 >> 5usize) & 0x01;
val != 0
}
#[doc = "HSMCI Not Busy"]
#[inline(always)]
pub const fn set_notbusy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_a(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_a(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[must_use]
#[inline(always)]
pub const fn sdioirqfor_slot_b(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[inline(always)]
pub const fn set_sdioirqfor_slot_b(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "SDIO Read Wait Operation Status"]
#[must_use]
#[inline(always)]
pub const fn sdiowait(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "SDIO Read Wait Operation Status"]
#[inline(always)]
pub const fn set_sdiowait(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "CE-ATA Completion Signal Received"]
#[must_use]
#[inline(always)]
pub const fn csrcv(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "CE-ATA Completion Signal Received"]
#[inline(always)]
pub const fn set_csrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "Response Index Error"]
#[must_use]
#[inline(always)]
pub const fn rinde(&self) -> bool {
let val = (self.0 >> 16usize) & 0x01;
val != 0
}
#[doc = "Response Index Error"]
#[inline(always)]
pub const fn set_rinde(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
}
#[doc = "Response Direction Error"]
#[must_use]
#[inline(always)]
pub const fn rdire(&self) -> bool {
let val = (self.0 >> 17usize) & 0x01;
val != 0
}
#[doc = "Response Direction Error"]
#[inline(always)]
pub const fn set_rdire(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
}
#[doc = "Response CRC Error"]
#[must_use]
#[inline(always)]
pub const fn rcrce(&self) -> bool {
let val = (self.0 >> 18usize) & 0x01;
val != 0
}
#[doc = "Response CRC Error"]
#[inline(always)]
pub const fn set_rcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
}
#[doc = "Response End Bit Error"]
#[must_use]
#[inline(always)]
pub const fn rende(&self) -> bool {
let val = (self.0 >> 19usize) & 0x01;
val != 0
}
#[doc = "Response End Bit Error"]
#[inline(always)]
pub const fn set_rende(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize);
}
#[doc = "Response Time-out Error"]
#[must_use]
#[inline(always)]
pub const fn rtoe(&self) -> bool {
let val = (self.0 >> 20usize) & 0x01;
val != 0
}
#[doc = "Response Time-out Error"]
#[inline(always)]
pub const fn set_rtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
}
#[doc = "Data CRC Error"]
#[must_use]
#[inline(always)]
pub const fn dcrce(&self) -> bool {
let val = (self.0 >> 21usize) & 0x01;
val != 0
}
#[doc = "Data CRC Error"]
#[inline(always)]
pub const fn set_dcrce(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize);
}
#[doc = "Data Time-out Error"]
#[must_use]
#[inline(always)]
pub const fn dtoe(&self) -> bool {
let val = (self.0 >> 22usize) & 0x01;
val != 0
}
#[doc = "Data Time-out Error"]
#[inline(always)]
pub const fn set_dtoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
}
#[doc = "Completion Signal Time-out Error"]
#[must_use]
#[inline(always)]
pub const fn cstoe(&self) -> bool {
let val = (self.0 >> 23usize) & 0x01;
val != 0
}
#[doc = "Completion Signal Time-out Error"]
#[inline(always)]
pub const fn set_cstoe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
}
#[doc = "DMA Block Overrun Error"]
#[must_use]
#[inline(always)]
pub const fn blkovre(&self) -> bool {
let val = (self.0 >> 24usize) & 0x01;
val != 0
}
#[doc = "DMA Block Overrun Error"]
#[inline(always)]
pub const fn set_blkovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize);
}
#[doc = "DMA Transfer done"]
#[must_use]
#[inline(always)]
pub const fn dmadone(&self) -> bool {
let val = (self.0 >> 25usize) & 0x01;
val != 0
}
#[doc = "DMA Transfer done"]
#[inline(always)]
pub const fn set_dmadone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize);
}
#[doc = "FIFO empty flag"]
#[must_use]
#[inline(always)]
pub const fn fifoempty(&self) -> bool {
let val = (self.0 >> 26usize) & 0x01;
val != 0
}
#[doc = "FIFO empty flag"]
#[inline(always)]
pub const fn set_fifoempty(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
}
#[doc = "Transfer Done flag"]
#[must_use]
#[inline(always)]
pub const fn xfrdone(&self) -> bool {
let val = (self.0 >> 27usize) & 0x01;
val != 0
}
#[doc = "Transfer Done flag"]
#[inline(always)]
pub const fn set_xfrdone(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
}
#[doc = "Boot Operation Acknowledge Received"]
#[must_use]
#[inline(always)]
pub const fn ackrcv(&self) -> bool {
let val = (self.0 >> 28usize) & 0x01;
val != 0
}
#[doc = "Boot Operation Acknowledge Received"]
#[inline(always)]
pub const fn set_ackrcv(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize);
}
#[doc = "Boot Operation Acknowledge Error"]
#[must_use]
#[inline(always)]
pub const fn ackrcve(&self) -> bool {
let val = (self.0 >> 29usize) & 0x01;
val != 0
}
#[doc = "Boot Operation Acknowledge Error"]
#[inline(always)]
pub const fn set_ackrcve(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize);
}
#[doc = "Overrun"]
#[must_use]
#[inline(always)]
pub const fn ovre(&self) -> bool {
let val = (self.0 >> 30usize) & 0x01;
val != 0
}
#[doc = "Overrun"]
#[inline(always)]
pub const fn set_ovre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
}
#[doc = "Underrun"]
#[must_use]
#[inline(always)]
pub const fn unre(&self) -> bool {
let val = (self.0 >> 31usize) & 0x01;
val != 0
}
#[doc = "Underrun"]
#[inline(always)]
pub const fn set_unre(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
}
}
impl Default for Sr {
#[inline(always)]
fn default() -> Sr {
Sr(0)
}
}
impl core::fmt::Debug for Sr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Sr")
.field("cmdrdy", &self.cmdrdy())
.field("rxrdy", &self.rxrdy())
.field("txrdy", &self.txrdy())
.field("blke", &self.blke())
.field("dtip", &self.dtip())
.field("notbusy", &self.notbusy())
.field("sdioirqfor_slot_a", &self.sdioirqfor_slot_a())
.field("sdioirqfor_slot_b", &self.sdioirqfor_slot_b())
.field("sdiowait", &self.sdiowait())
.field("csrcv", &self.csrcv())
.field("rinde", &self.rinde())
.field("rdire", &self.rdire())
.field("rcrce", &self.rcrce())
.field("rende", &self.rende())
.field("rtoe", &self.rtoe())
.field("dcrce", &self.dcrce())
.field("dtoe", &self.dtoe())
.field("cstoe", &self.cstoe())
.field("blkovre", &self.blkovre())
.field("dmadone", &self.dmadone())
.field("fifoempty", &self.fifoempty())
.field("xfrdone", &self.xfrdone())
.field("ackrcv", &self.ackrcv())
.field("ackrcve", &self.ackrcve())
.field("ovre", &self.ovre())
.field("unre", &self.unre())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Sr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Sr {{ cmdrdy: {=bool:?}, rxrdy: {=bool:?}, txrdy: {=bool:?}, blke: {=bool:?}, dtip: {=bool:?}, notbusy: {=bool:?}, sdioirqfor_slot_a: {=bool:?}, sdioirqfor_slot_b: {=bool:?}, sdiowait: {=bool:?}, csrcv: {=bool:?}, rinde: {=bool:?}, rdire: {=bool:?}, rcrce: {=bool:?}, rende: {=bool:?}, rtoe: {=bool:?}, dcrce: {=bool:?}, dtoe: {=bool:?}, cstoe: {=bool:?}, blkovre: {=bool:?}, dmadone: {=bool:?}, fifoempty: {=bool:?}, xfrdone: {=bool:?}, ackrcv: {=bool:?}, ackrcve: {=bool:?}, ovre: {=bool:?}, unre: {=bool:?} }}",
self.cmdrdy(),
self.rxrdy(),
self.txrdy(),
self.blke(),
self.dtip(),
self.notbusy(),
self.sdioirqfor_slot_a(),
self.sdioirqfor_slot_b(),
self.sdiowait(),
self.csrcv(),
self.rinde(),
self.rdire(),
self.rcrce(),
self.rende(),
self.rtoe(),
self.dcrce(),
self.dtoe(),
self.cstoe(),
self.blkovre(),
self.dmadone(),
self.fifoempty(),
self.xfrdone(),
self.ackrcv(),
self.ackrcve(),
self.ovre(),
self.unre()
)
}
}
#[doc = "Transmit Data Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Tdr(pub u32);
impl Tdr {
#[doc = "Data to Write"]
#[must_use]
#[inline(always)]
pub const fn data(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Data to Write"]
#[inline(always)]
pub const fn set_data(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Tdr {
#[inline(always)]
fn default() -> Tdr {
Tdr(0)
}
}
impl core::fmt::Debug for Tdr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Tdr").field("data", &self.data()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Tdr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Tdr {{ data: {=u32:?} }}", self.data())
}
}
#[doc = "Write Protection Mode Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Wpmr(pub u32);
impl Wpmr {
#[doc = "Write Protect Enable"]
#[must_use]
#[inline(always)]
pub const fn wpen(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Write Protect Enable"]
#[inline(always)]
pub const fn set_wpen(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Write Protect Key"]
#[must_use]
#[inline(always)]
pub const fn wpkey(&self) -> super::vals::Wpkey {
let val = (self.0 >> 8usize) & 0x00ff_ffff;
super::vals::Wpkey::from_bits(val as u32)
}
#[doc = "Write Protect Key"]
#[inline(always)]
pub const fn set_wpkey(&mut self, val: super::vals::Wpkey) {
self.0 = (self.0 & !(0x00ff_ffff << 8usize))
| (((val.to_bits() as u32) & 0x00ff_ffff) << 8usize);
}
}
impl Default for Wpmr {
#[inline(always)]
fn default() -> Wpmr {
Wpmr(0)
}
}
impl core::fmt::Debug for Wpmr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Wpmr")
.field("wpen", &self.wpen())
.field("wpkey", &self.wpkey())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Wpmr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Wpmr {{ wpen: {=bool:?}, wpkey: {:?} }}",
self.wpen(),
self.wpkey()
)
}
}
#[doc = "Write Protection Status Register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Wpsr(pub u32);
impl Wpsr {
#[doc = "Write Protection Violation Status"]
#[must_use]
#[inline(always)]
pub const fn wpvs(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Write Protection Violation Status"]
#[inline(always)]
pub const fn set_wpvs(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Write Protection Violation Source"]
#[must_use]
#[inline(always)]
pub const fn wpvsrc(&self) -> u16 {
let val = (self.0 >> 8usize) & 0xffff;
val as u16
}
#[doc = "Write Protection Violation Source"]
#[inline(always)]
pub const fn set_wpvsrc(&mut self, val: u16) {
self.0 = (self.0 & !(0xffff << 8usize)) | (((val as u32) & 0xffff) << 8usize);
}
}
impl Default for Wpsr {
#[inline(always)]
fn default() -> Wpsr {
Wpsr(0)
}
}
impl core::fmt::Debug for Wpsr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Wpsr")
.field("wpvs", &self.wpvs())
.field("wpvsrc", &self.wpvsrc())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Wpsr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Wpsr {{ wpvs: {=bool:?}, wpvsrc: {=u16:?} }}",
self.wpvs(),
self.wpvsrc()
)
}
}