#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum ArbCfg {
#[doc = "Fixed priority arbiter (see \"Basic Definitions\" )"]
FIXED = 0x0,
#[doc = "Modified round robin arbiter."]
ROUND_ROBIN = 0x01,
}
impl ArbCfg {
#[inline(always)]
pub const fn from_bits(val: u8) -> ArbCfg {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for ArbCfg {
#[inline(always)]
fn from(val: u8) -> ArbCfg {
ArbCfg::from_bits(val)
}
}
impl From<ArbCfg> for u8 {
#[inline(always)]
fn from(val: ArbCfg) -> u8 {
ArbCfg::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg0DstH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg0DstH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg0DstH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg0DstH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg0DstH2sel {
Cfg0DstH2sel::from_bits(val)
}
}
impl From<Cfg0DstH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg0DstH2sel) -> u8 {
Cfg0DstH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg0Fifocfg {
#[doc = "The largest defined length AHB burst is performed on the destination AHB interface."]
ALAP_CFG = 0x0,
#[doc = "When half FIFO size is available/filled, a source/destination request is serviced."]
HALF_CFG = 0x01,
#[doc = "When there is enough space/data available to perform a single AHB access, then the request is serviced."]
ASAP_CFG = 0x02,
_RESERVED_3 = 0x03,
}
impl Cfg0Fifocfg {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg0Fifocfg {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg0Fifocfg {
#[inline(always)]
fn from(val: u8) -> Cfg0Fifocfg {
Cfg0Fifocfg::from_bits(val)
}
}
impl From<Cfg0Fifocfg> for u8 {
#[inline(always)]
fn from(val: Cfg0Fifocfg) -> u8 {
Cfg0Fifocfg::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg0LockB {
#[doc = "AHB Bus Locking capability is disabled."]
DISABLE = 0x0,
_RESERVED_1 = 0x01,
}
impl Cfg0LockB {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg0LockB {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg0LockB {
#[inline(always)]
fn from(val: u8) -> Cfg0LockB {
Cfg0LockB::from_bits(val)
}
}
impl From<Cfg0LockB> for u8 {
#[inline(always)]
fn from(val: Cfg0LockB) -> u8 {
Cfg0LockB::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg0LockIf {
#[doc = "Interface Lock capability is disabled"]
DISABLE = 0x0,
#[doc = "Interface Lock capability is enabled"]
ENABLE = 0x01,
}
impl Cfg0LockIf {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg0LockIf {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg0LockIf {
#[inline(always)]
fn from(val: u8) -> Cfg0LockIf {
Cfg0LockIf::from_bits(val)
}
}
impl From<Cfg0LockIf> for u8 {
#[inline(always)]
fn from(val: Cfg0LockIf) -> u8 {
Cfg0LockIf::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg0LockIfL {
#[doc = "The Master Interface Arbiter is locked by the channel x for a chunk transfer."]
CHUNK = 0x0,
#[doc = "The Master Interface Arbiter is locked by the channel x for a buffer transfer."]
BUFFER = 0x01,
}
impl Cfg0LockIfL {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg0LockIfL {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg0LockIfL {
#[inline(always)]
fn from(val: u8) -> Cfg0LockIfL {
Cfg0LockIfL::from_bits(val)
}
}
impl From<Cfg0LockIfL> for u8 {
#[inline(always)]
fn from(val: Cfg0LockIfL) -> u8 {
Cfg0LockIfL::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg0Sod {
#[doc = "STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register."]
DISABLE = 0x0,
#[doc = "STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1."]
ENABLE = 0x01,
}
impl Cfg0Sod {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg0Sod {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg0Sod {
#[inline(always)]
fn from(val: u8) -> Cfg0Sod {
Cfg0Sod::from_bits(val)
}
}
impl From<Cfg0Sod> for u8 {
#[inline(always)]
fn from(val: Cfg0Sod) -> u8 {
Cfg0Sod::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg0SrcH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg0SrcH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg0SrcH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg0SrcH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg0SrcH2sel {
Cfg0SrcH2sel::from_bits(val)
}
}
impl From<Cfg0SrcH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg0SrcH2sel) -> u8 {
Cfg0SrcH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg1DstH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg1DstH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg1DstH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg1DstH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg1DstH2sel {
Cfg1DstH2sel::from_bits(val)
}
}
impl From<Cfg1DstH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg1DstH2sel) -> u8 {
Cfg1DstH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg1Fifocfg {
#[doc = "The largest defined length AHB burst is performed on the destination AHB interface."]
ALAP_CFG = 0x0,
#[doc = "When half FIFO size is available/filled, a source/destination request is serviced."]
HALF_CFG = 0x01,
#[doc = "When there is enough space/data available to perform a single AHB access, then the request is serviced."]
ASAP_CFG = 0x02,
_RESERVED_3 = 0x03,
}
impl Cfg1Fifocfg {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg1Fifocfg {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg1Fifocfg {
#[inline(always)]
fn from(val: u8) -> Cfg1Fifocfg {
Cfg1Fifocfg::from_bits(val)
}
}
impl From<Cfg1Fifocfg> for u8 {
#[inline(always)]
fn from(val: Cfg1Fifocfg) -> u8 {
Cfg1Fifocfg::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg1LockB {
#[doc = "AHB Bus Locking capability is disabled."]
DISABLE = 0x0,
_RESERVED_1 = 0x01,
}
impl Cfg1LockB {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg1LockB {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg1LockB {
#[inline(always)]
fn from(val: u8) -> Cfg1LockB {
Cfg1LockB::from_bits(val)
}
}
impl From<Cfg1LockB> for u8 {
#[inline(always)]
fn from(val: Cfg1LockB) -> u8 {
Cfg1LockB::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg1LockIf {
#[doc = "Interface Lock capability is disabled"]
DISABLE = 0x0,
#[doc = "Interface Lock capability is enabled"]
ENABLE = 0x01,
}
impl Cfg1LockIf {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg1LockIf {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg1LockIf {
#[inline(always)]
fn from(val: u8) -> Cfg1LockIf {
Cfg1LockIf::from_bits(val)
}
}
impl From<Cfg1LockIf> for u8 {
#[inline(always)]
fn from(val: Cfg1LockIf) -> u8 {
Cfg1LockIf::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg1LockIfL {
#[doc = "The Master Interface Arbiter is locked by the channel x for a chunk transfer."]
CHUNK = 0x0,
#[doc = "The Master Interface Arbiter is locked by the channel x for a buffer transfer."]
BUFFER = 0x01,
}
impl Cfg1LockIfL {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg1LockIfL {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg1LockIfL {
#[inline(always)]
fn from(val: u8) -> Cfg1LockIfL {
Cfg1LockIfL::from_bits(val)
}
}
impl From<Cfg1LockIfL> for u8 {
#[inline(always)]
fn from(val: Cfg1LockIfL) -> u8 {
Cfg1LockIfL::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg1Sod {
#[doc = "STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register."]
DISABLE = 0x0,
#[doc = "STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1."]
ENABLE = 0x01,
}
impl Cfg1Sod {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg1Sod {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg1Sod {
#[inline(always)]
fn from(val: u8) -> Cfg1Sod {
Cfg1Sod::from_bits(val)
}
}
impl From<Cfg1Sod> for u8 {
#[inline(always)]
fn from(val: Cfg1Sod) -> u8 {
Cfg1Sod::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg1SrcH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg1SrcH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg1SrcH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg1SrcH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg1SrcH2sel {
Cfg1SrcH2sel::from_bits(val)
}
}
impl From<Cfg1SrcH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg1SrcH2sel) -> u8 {
Cfg1SrcH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg2DstH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg2DstH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg2DstH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg2DstH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg2DstH2sel {
Cfg2DstH2sel::from_bits(val)
}
}
impl From<Cfg2DstH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg2DstH2sel) -> u8 {
Cfg2DstH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg2Fifocfg {
#[doc = "The largest defined length AHB burst is performed on the destination AHB interface."]
ALAP_CFG = 0x0,
#[doc = "When half FIFO size is available/filled, a source/destination request is serviced."]
HALF_CFG = 0x01,
#[doc = "When there is enough space/data available to perform a single AHB access, then the request is serviced."]
ASAP_CFG = 0x02,
_RESERVED_3 = 0x03,
}
impl Cfg2Fifocfg {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg2Fifocfg {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg2Fifocfg {
#[inline(always)]
fn from(val: u8) -> Cfg2Fifocfg {
Cfg2Fifocfg::from_bits(val)
}
}
impl From<Cfg2Fifocfg> for u8 {
#[inline(always)]
fn from(val: Cfg2Fifocfg) -> u8 {
Cfg2Fifocfg::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg2LockB {
#[doc = "AHB Bus Locking capability is disabled."]
DISABLE = 0x0,
_RESERVED_1 = 0x01,
}
impl Cfg2LockB {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg2LockB {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg2LockB {
#[inline(always)]
fn from(val: u8) -> Cfg2LockB {
Cfg2LockB::from_bits(val)
}
}
impl From<Cfg2LockB> for u8 {
#[inline(always)]
fn from(val: Cfg2LockB) -> u8 {
Cfg2LockB::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg2LockIf {
#[doc = "Interface Lock capability is disabled"]
DISABLE = 0x0,
#[doc = "Interface Lock capability is enabled"]
ENABLE = 0x01,
}
impl Cfg2LockIf {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg2LockIf {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg2LockIf {
#[inline(always)]
fn from(val: u8) -> Cfg2LockIf {
Cfg2LockIf::from_bits(val)
}
}
impl From<Cfg2LockIf> for u8 {
#[inline(always)]
fn from(val: Cfg2LockIf) -> u8 {
Cfg2LockIf::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg2LockIfL {
#[doc = "The Master Interface Arbiter is locked by the channel x for a chunk transfer."]
CHUNK = 0x0,
#[doc = "The Master Interface Arbiter is locked by the channel x for a buffer transfer."]
BUFFER = 0x01,
}
impl Cfg2LockIfL {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg2LockIfL {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg2LockIfL {
#[inline(always)]
fn from(val: u8) -> Cfg2LockIfL {
Cfg2LockIfL::from_bits(val)
}
}
impl From<Cfg2LockIfL> for u8 {
#[inline(always)]
fn from(val: Cfg2LockIfL) -> u8 {
Cfg2LockIfL::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg2Sod {
#[doc = "STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register."]
DISABLE = 0x0,
#[doc = "STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1."]
ENABLE = 0x01,
}
impl Cfg2Sod {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg2Sod {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg2Sod {
#[inline(always)]
fn from(val: u8) -> Cfg2Sod {
Cfg2Sod::from_bits(val)
}
}
impl From<Cfg2Sod> for u8 {
#[inline(always)]
fn from(val: Cfg2Sod) -> u8 {
Cfg2Sod::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg2SrcH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg2SrcH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg2SrcH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg2SrcH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg2SrcH2sel {
Cfg2SrcH2sel::from_bits(val)
}
}
impl From<Cfg2SrcH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg2SrcH2sel) -> u8 {
Cfg2SrcH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg3DstH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg3DstH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg3DstH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg3DstH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg3DstH2sel {
Cfg3DstH2sel::from_bits(val)
}
}
impl From<Cfg3DstH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg3DstH2sel) -> u8 {
Cfg3DstH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg3Fifocfg {
#[doc = "The largest defined length AHB burst is performed on the destination AHB interface."]
ALAP_CFG = 0x0,
#[doc = "When half FIFO size is available/filled, a source/destination request is serviced."]
HALF_CFG = 0x01,
#[doc = "When there is enough space/data available to perform a single AHB access, then the request is serviced."]
ASAP_CFG = 0x02,
_RESERVED_3 = 0x03,
}
impl Cfg3Fifocfg {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg3Fifocfg {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg3Fifocfg {
#[inline(always)]
fn from(val: u8) -> Cfg3Fifocfg {
Cfg3Fifocfg::from_bits(val)
}
}
impl From<Cfg3Fifocfg> for u8 {
#[inline(always)]
fn from(val: Cfg3Fifocfg) -> u8 {
Cfg3Fifocfg::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg3LockB {
#[doc = "AHB Bus Locking capability is disabled."]
DISABLE = 0x0,
_RESERVED_1 = 0x01,
}
impl Cfg3LockB {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg3LockB {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg3LockB {
#[inline(always)]
fn from(val: u8) -> Cfg3LockB {
Cfg3LockB::from_bits(val)
}
}
impl From<Cfg3LockB> for u8 {
#[inline(always)]
fn from(val: Cfg3LockB) -> u8 {
Cfg3LockB::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg3LockIf {
#[doc = "Interface Lock capability is disabled"]
DISABLE = 0x0,
#[doc = "Interface Lock capability is enabled"]
ENABLE = 0x01,
}
impl Cfg3LockIf {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg3LockIf {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg3LockIf {
#[inline(always)]
fn from(val: u8) -> Cfg3LockIf {
Cfg3LockIf::from_bits(val)
}
}
impl From<Cfg3LockIf> for u8 {
#[inline(always)]
fn from(val: Cfg3LockIf) -> u8 {
Cfg3LockIf::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg3LockIfL {
#[doc = "The Master Interface Arbiter is locked by the channel x for a chunk transfer."]
CHUNK = 0x0,
#[doc = "The Master Interface Arbiter is locked by the channel x for a buffer transfer."]
BUFFER = 0x01,
}
impl Cfg3LockIfL {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg3LockIfL {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg3LockIfL {
#[inline(always)]
fn from(val: u8) -> Cfg3LockIfL {
Cfg3LockIfL::from_bits(val)
}
}
impl From<Cfg3LockIfL> for u8 {
#[inline(always)]
fn from(val: Cfg3LockIfL) -> u8 {
Cfg3LockIfL::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg3Sod {
#[doc = "STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register."]
DISABLE = 0x0,
#[doc = "STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1."]
ENABLE = 0x01,
}
impl Cfg3Sod {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg3Sod {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg3Sod {
#[inline(always)]
fn from(val: u8) -> Cfg3Sod {
Cfg3Sod::from_bits(val)
}
}
impl From<Cfg3Sod> for u8 {
#[inline(always)]
fn from(val: Cfg3Sod) -> u8 {
Cfg3Sod::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg3SrcH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg3SrcH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg3SrcH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg3SrcH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg3SrcH2sel {
Cfg3SrcH2sel::from_bits(val)
}
}
impl From<Cfg3SrcH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg3SrcH2sel) -> u8 {
Cfg3SrcH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg4DstH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg4DstH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg4DstH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg4DstH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg4DstH2sel {
Cfg4DstH2sel::from_bits(val)
}
}
impl From<Cfg4DstH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg4DstH2sel) -> u8 {
Cfg4DstH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg4Fifocfg {
#[doc = "The largest defined length AHB burst is performed on the destination AHB interface."]
ALAP_CFG = 0x0,
#[doc = "When half FIFO size is available/filled, a source/destination request is serviced."]
HALF_CFG = 0x01,
#[doc = "When there is enough space/data available to perform a single AHB access, then the request is serviced."]
ASAP_CFG = 0x02,
_RESERVED_3 = 0x03,
}
impl Cfg4Fifocfg {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg4Fifocfg {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg4Fifocfg {
#[inline(always)]
fn from(val: u8) -> Cfg4Fifocfg {
Cfg4Fifocfg::from_bits(val)
}
}
impl From<Cfg4Fifocfg> for u8 {
#[inline(always)]
fn from(val: Cfg4Fifocfg) -> u8 {
Cfg4Fifocfg::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg4LockB {
#[doc = "AHB Bus Locking capability is disabled."]
DISABLE = 0x0,
_RESERVED_1 = 0x01,
}
impl Cfg4LockB {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg4LockB {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg4LockB {
#[inline(always)]
fn from(val: u8) -> Cfg4LockB {
Cfg4LockB::from_bits(val)
}
}
impl From<Cfg4LockB> for u8 {
#[inline(always)]
fn from(val: Cfg4LockB) -> u8 {
Cfg4LockB::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg4LockIf {
#[doc = "Interface Lock capability is disabled"]
DISABLE = 0x0,
#[doc = "Interface Lock capability is enabled"]
ENABLE = 0x01,
}
impl Cfg4LockIf {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg4LockIf {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg4LockIf {
#[inline(always)]
fn from(val: u8) -> Cfg4LockIf {
Cfg4LockIf::from_bits(val)
}
}
impl From<Cfg4LockIf> for u8 {
#[inline(always)]
fn from(val: Cfg4LockIf) -> u8 {
Cfg4LockIf::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg4LockIfL {
#[doc = "The Master Interface Arbiter is locked by the channel x for a chunk transfer."]
CHUNK = 0x0,
#[doc = "The Master Interface Arbiter is locked by the channel x for a buffer transfer."]
BUFFER = 0x01,
}
impl Cfg4LockIfL {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg4LockIfL {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg4LockIfL {
#[inline(always)]
fn from(val: u8) -> Cfg4LockIfL {
Cfg4LockIfL::from_bits(val)
}
}
impl From<Cfg4LockIfL> for u8 {
#[inline(always)]
fn from(val: Cfg4LockIfL) -> u8 {
Cfg4LockIfL::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg4Sod {
#[doc = "STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register."]
DISABLE = 0x0,
#[doc = "STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1."]
ENABLE = 0x01,
}
impl Cfg4Sod {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg4Sod {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg4Sod {
#[inline(always)]
fn from(val: u8) -> Cfg4Sod {
Cfg4Sod::from_bits(val)
}
}
impl From<Cfg4Sod> for u8 {
#[inline(always)]
fn from(val: Cfg4Sod) -> u8 {
Cfg4Sod::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg4SrcH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg4SrcH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg4SrcH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg4SrcH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg4SrcH2sel {
Cfg4SrcH2sel::from_bits(val)
}
}
impl From<Cfg4SrcH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg4SrcH2sel) -> u8 {
Cfg4SrcH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg5DstH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg5DstH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg5DstH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg5DstH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg5DstH2sel {
Cfg5DstH2sel::from_bits(val)
}
}
impl From<Cfg5DstH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg5DstH2sel) -> u8 {
Cfg5DstH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg5Fifocfg {
#[doc = "The largest defined length AHB burst is performed on the destination AHB interface."]
ALAP_CFG = 0x0,
#[doc = "When half FIFO size is available/filled, a source/destination request is serviced."]
HALF_CFG = 0x01,
#[doc = "When there is enough space/data available to perform a single AHB access, then the request is serviced."]
ASAP_CFG = 0x02,
_RESERVED_3 = 0x03,
}
impl Cfg5Fifocfg {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg5Fifocfg {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg5Fifocfg {
#[inline(always)]
fn from(val: u8) -> Cfg5Fifocfg {
Cfg5Fifocfg::from_bits(val)
}
}
impl From<Cfg5Fifocfg> for u8 {
#[inline(always)]
fn from(val: Cfg5Fifocfg) -> u8 {
Cfg5Fifocfg::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg5LockB {
#[doc = "AHB Bus Locking capability is disabled."]
DISABLE = 0x0,
_RESERVED_1 = 0x01,
}
impl Cfg5LockB {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg5LockB {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg5LockB {
#[inline(always)]
fn from(val: u8) -> Cfg5LockB {
Cfg5LockB::from_bits(val)
}
}
impl From<Cfg5LockB> for u8 {
#[inline(always)]
fn from(val: Cfg5LockB) -> u8 {
Cfg5LockB::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg5LockIf {
#[doc = "Interface Lock capability is disabled"]
DISABLE = 0x0,
#[doc = "Interface Lock capability is enabled"]
ENABLE = 0x01,
}
impl Cfg5LockIf {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg5LockIf {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg5LockIf {
#[inline(always)]
fn from(val: u8) -> Cfg5LockIf {
Cfg5LockIf::from_bits(val)
}
}
impl From<Cfg5LockIf> for u8 {
#[inline(always)]
fn from(val: Cfg5LockIf) -> u8 {
Cfg5LockIf::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg5LockIfL {
#[doc = "The Master Interface Arbiter is locked by the channel x for a chunk transfer."]
CHUNK = 0x0,
#[doc = "The Master Interface Arbiter is locked by the channel x for a buffer transfer."]
BUFFER = 0x01,
}
impl Cfg5LockIfL {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg5LockIfL {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg5LockIfL {
#[inline(always)]
fn from(val: u8) -> Cfg5LockIfL {
Cfg5LockIfL::from_bits(val)
}
}
impl From<Cfg5LockIfL> for u8 {
#[inline(always)]
fn from(val: Cfg5LockIfL) -> u8 {
Cfg5LockIfL::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg5Sod {
#[doc = "STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register."]
DISABLE = 0x0,
#[doc = "STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1."]
ENABLE = 0x01,
}
impl Cfg5Sod {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg5Sod {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg5Sod {
#[inline(always)]
fn from(val: u8) -> Cfg5Sod {
Cfg5Sod::from_bits(val)
}
}
impl From<Cfg5Sod> for u8 {
#[inline(always)]
fn from(val: Cfg5Sod) -> u8 {
Cfg5Sod::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Cfg5SrcH2sel {
#[doc = "Software handshaking interface is used to trigger a transfer request."]
SW = 0x0,
#[doc = "Hardware handshaking interface is used to trigger a transfer request."]
HW = 0x01,
}
impl Cfg5SrcH2sel {
#[inline(always)]
pub const fn from_bits(val: u8) -> Cfg5SrcH2sel {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Cfg5SrcH2sel {
#[inline(always)]
fn from(val: u8) -> Cfg5SrcH2sel {
Cfg5SrcH2sel::from_bits(val)
}
}
impl From<Cfg5SrcH2sel> for u8 {
#[inline(always)]
fn from(val: Cfg5SrcH2sel) -> u8 {
Cfg5SrcH2sel::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla0Dcsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla0Dcsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla0Dcsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla0Dcsize {
#[inline(always)]
fn from(val: u8) -> Ctrla0Dcsize {
Ctrla0Dcsize::from_bits(val)
}
}
impl From<Ctrla0Dcsize> for u8 {
#[inline(always)]
fn from(val: Ctrla0Dcsize) -> u8 {
Ctrla0Dcsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla0DstWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla0DstWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla0DstWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla0DstWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla0DstWidth {
Ctrla0DstWidth::from_bits(val)
}
}
impl From<Ctrla0DstWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla0DstWidth) -> u8 {
Ctrla0DstWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla0Scsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla0Scsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla0Scsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla0Scsize {
#[inline(always)]
fn from(val: u8) -> Ctrla0Scsize {
Ctrla0Scsize::from_bits(val)
}
}
impl From<Ctrla0Scsize> for u8 {
#[inline(always)]
fn from(val: Ctrla0Scsize) -> u8 {
Ctrla0Scsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla0SrcWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla0SrcWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla0SrcWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla0SrcWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla0SrcWidth {
Ctrla0SrcWidth::from_bits(val)
}
}
impl From<Ctrla0SrcWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla0SrcWidth) -> u8 {
Ctrla0SrcWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla1Dcsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla1Dcsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla1Dcsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla1Dcsize {
#[inline(always)]
fn from(val: u8) -> Ctrla1Dcsize {
Ctrla1Dcsize::from_bits(val)
}
}
impl From<Ctrla1Dcsize> for u8 {
#[inline(always)]
fn from(val: Ctrla1Dcsize) -> u8 {
Ctrla1Dcsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla1DstWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla1DstWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla1DstWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla1DstWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla1DstWidth {
Ctrla1DstWidth::from_bits(val)
}
}
impl From<Ctrla1DstWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla1DstWidth) -> u8 {
Ctrla1DstWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla1Scsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla1Scsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla1Scsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla1Scsize {
#[inline(always)]
fn from(val: u8) -> Ctrla1Scsize {
Ctrla1Scsize::from_bits(val)
}
}
impl From<Ctrla1Scsize> for u8 {
#[inline(always)]
fn from(val: Ctrla1Scsize) -> u8 {
Ctrla1Scsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla1SrcWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla1SrcWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla1SrcWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla1SrcWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla1SrcWidth {
Ctrla1SrcWidth::from_bits(val)
}
}
impl From<Ctrla1SrcWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla1SrcWidth) -> u8 {
Ctrla1SrcWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla2Dcsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla2Dcsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla2Dcsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla2Dcsize {
#[inline(always)]
fn from(val: u8) -> Ctrla2Dcsize {
Ctrla2Dcsize::from_bits(val)
}
}
impl From<Ctrla2Dcsize> for u8 {
#[inline(always)]
fn from(val: Ctrla2Dcsize) -> u8 {
Ctrla2Dcsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla2DstWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla2DstWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla2DstWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla2DstWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla2DstWidth {
Ctrla2DstWidth::from_bits(val)
}
}
impl From<Ctrla2DstWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla2DstWidth) -> u8 {
Ctrla2DstWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla2Scsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla2Scsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla2Scsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla2Scsize {
#[inline(always)]
fn from(val: u8) -> Ctrla2Scsize {
Ctrla2Scsize::from_bits(val)
}
}
impl From<Ctrla2Scsize> for u8 {
#[inline(always)]
fn from(val: Ctrla2Scsize) -> u8 {
Ctrla2Scsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla2SrcWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla2SrcWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla2SrcWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla2SrcWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla2SrcWidth {
Ctrla2SrcWidth::from_bits(val)
}
}
impl From<Ctrla2SrcWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla2SrcWidth) -> u8 {
Ctrla2SrcWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla3Dcsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla3Dcsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla3Dcsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla3Dcsize {
#[inline(always)]
fn from(val: u8) -> Ctrla3Dcsize {
Ctrla3Dcsize::from_bits(val)
}
}
impl From<Ctrla3Dcsize> for u8 {
#[inline(always)]
fn from(val: Ctrla3Dcsize) -> u8 {
Ctrla3Dcsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla3DstWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla3DstWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla3DstWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla3DstWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla3DstWidth {
Ctrla3DstWidth::from_bits(val)
}
}
impl From<Ctrla3DstWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla3DstWidth) -> u8 {
Ctrla3DstWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla3Scsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla3Scsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla3Scsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla3Scsize {
#[inline(always)]
fn from(val: u8) -> Ctrla3Scsize {
Ctrla3Scsize::from_bits(val)
}
}
impl From<Ctrla3Scsize> for u8 {
#[inline(always)]
fn from(val: Ctrla3Scsize) -> u8 {
Ctrla3Scsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla3SrcWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla3SrcWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla3SrcWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla3SrcWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla3SrcWidth {
Ctrla3SrcWidth::from_bits(val)
}
}
impl From<Ctrla3SrcWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla3SrcWidth) -> u8 {
Ctrla3SrcWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla4Dcsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla4Dcsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla4Dcsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla4Dcsize {
#[inline(always)]
fn from(val: u8) -> Ctrla4Dcsize {
Ctrla4Dcsize::from_bits(val)
}
}
impl From<Ctrla4Dcsize> for u8 {
#[inline(always)]
fn from(val: Ctrla4Dcsize) -> u8 {
Ctrla4Dcsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla4DstWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla4DstWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla4DstWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla4DstWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla4DstWidth {
Ctrla4DstWidth::from_bits(val)
}
}
impl From<Ctrla4DstWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla4DstWidth) -> u8 {
Ctrla4DstWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla4Scsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla4Scsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla4Scsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla4Scsize {
#[inline(always)]
fn from(val: u8) -> Ctrla4Scsize {
Ctrla4Scsize::from_bits(val)
}
}
impl From<Ctrla4Scsize> for u8 {
#[inline(always)]
fn from(val: Ctrla4Scsize) -> u8 {
Ctrla4Scsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla4SrcWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla4SrcWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla4SrcWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla4SrcWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla4SrcWidth {
Ctrla4SrcWidth::from_bits(val)
}
}
impl From<Ctrla4SrcWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla4SrcWidth) -> u8 {
Ctrla4SrcWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla5Dcsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla5Dcsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla5Dcsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla5Dcsize {
#[inline(always)]
fn from(val: u8) -> Ctrla5Dcsize {
Ctrla5Dcsize::from_bits(val)
}
}
impl From<Ctrla5Dcsize> for u8 {
#[inline(always)]
fn from(val: Ctrla5Dcsize) -> u8 {
Ctrla5Dcsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla5DstWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla5DstWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla5DstWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla5DstWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla5DstWidth {
Ctrla5DstWidth::from_bits(val)
}
}
impl From<Ctrla5DstWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla5DstWidth) -> u8 {
Ctrla5DstWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla5Scsize {
#[doc = "1 data transferred"]
CHK_1 = 0x0,
#[doc = "4 data transferred"]
CHK_4 = 0x01,
#[doc = "8 data transferred"]
CHK_8 = 0x02,
#[doc = "16 data transferred"]
CHK_16 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Ctrla5Scsize {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla5Scsize {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla5Scsize {
#[inline(always)]
fn from(val: u8) -> Ctrla5Scsize {
Ctrla5Scsize::from_bits(val)
}
}
impl From<Ctrla5Scsize> for u8 {
#[inline(always)]
fn from(val: Ctrla5Scsize) -> u8 {
Ctrla5Scsize::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrla5SrcWidth {
#[doc = "the transfer size is set to 8-bit width"]
BYTE = 0x0,
#[doc = "the transfer size is set to 16-bit width"]
HALF_WORD = 0x01,
#[doc = "the transfer size is set to 32-bit width"]
WORD = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrla5SrcWidth {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrla5SrcWidth {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrla5SrcWidth {
#[inline(always)]
fn from(val: u8) -> Ctrla5SrcWidth {
Ctrla5SrcWidth::from_bits(val)
}
}
impl From<Ctrla5SrcWidth> for u8 {
#[inline(always)]
fn from(val: Ctrla5SrcWidth) -> u8 {
Ctrla5SrcWidth::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb0DstDscr {
#[doc = "Destination address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the destination."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb0DstDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb0DstDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb0DstDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb0DstDscr {
Ctrlb0DstDscr::from_bits(val)
}
}
impl From<Ctrlb0DstDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb0DstDscr) -> u8 {
Ctrlb0DstDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb0DstIncr {
#[doc = "The destination address is incremented"]
INCREMENTING = 0x0,
#[doc = "The destination address is decremented"]
DECREMENTING = 0x01,
#[doc = "The destination address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb0DstIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb0DstIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb0DstIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb0DstIncr {
Ctrlb0DstIncr::from_bits(val)
}
}
impl From<Ctrlb0DstIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb0DstIncr) -> u8 {
Ctrlb0DstIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb0Fc {
#[doc = "Memory-to-Memory Transfer DMAC is flow controller"]
MEM2MEM_DMA_FC = 0x0,
#[doc = "Memory-to-Peripheral Transfer DMAC is flow controller"]
MEM2PER_DMA_FC = 0x01,
#[doc = "Peripheral-to-Memory Transfer DMAC is flow controller"]
PER2MEM_DMA_FC = 0x02,
#[doc = "Peripheral-to-Peripheral Transfer DMAC is flow controller"]
PER2PER_DMA_FC = 0x03,
}
impl Ctrlb0Fc {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb0Fc {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb0Fc {
#[inline(always)]
fn from(val: u8) -> Ctrlb0Fc {
Ctrlb0Fc::from_bits(val)
}
}
impl From<Ctrlb0Fc> for u8 {
#[inline(always)]
fn from(val: Ctrlb0Fc) -> u8 {
Ctrlb0Fc::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb0SrcDscr {
#[doc = "Source address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the source."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb0SrcDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb0SrcDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb0SrcDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb0SrcDscr {
Ctrlb0SrcDscr::from_bits(val)
}
}
impl From<Ctrlb0SrcDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb0SrcDscr) -> u8 {
Ctrlb0SrcDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb0SrcIncr {
#[doc = "The source address is incremented"]
INCREMENTING = 0x0,
#[doc = "The source address is decremented"]
DECREMENTING = 0x01,
#[doc = "The source address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb0SrcIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb0SrcIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb0SrcIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb0SrcIncr {
Ctrlb0SrcIncr::from_bits(val)
}
}
impl From<Ctrlb0SrcIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb0SrcIncr) -> u8 {
Ctrlb0SrcIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb1DstDscr {
#[doc = "Destination address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the destination."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb1DstDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb1DstDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb1DstDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb1DstDscr {
Ctrlb1DstDscr::from_bits(val)
}
}
impl From<Ctrlb1DstDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb1DstDscr) -> u8 {
Ctrlb1DstDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb1DstIncr {
#[doc = "The destination address is incremented"]
INCREMENTING = 0x0,
#[doc = "The destination address is decremented"]
DECREMENTING = 0x01,
#[doc = "The destination address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb1DstIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb1DstIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb1DstIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb1DstIncr {
Ctrlb1DstIncr::from_bits(val)
}
}
impl From<Ctrlb1DstIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb1DstIncr) -> u8 {
Ctrlb1DstIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb1Fc {
#[doc = "Memory-to-Memory Transfer DMAC is flow controller"]
MEM2MEM_DMA_FC = 0x0,
#[doc = "Memory-to-Peripheral Transfer DMAC is flow controller"]
MEM2PER_DMA_FC = 0x01,
#[doc = "Peripheral-to-Memory Transfer DMAC is flow controller"]
PER2MEM_DMA_FC = 0x02,
#[doc = "Peripheral-to-Peripheral Transfer DMAC is flow controller"]
PER2PER_DMA_FC = 0x03,
}
impl Ctrlb1Fc {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb1Fc {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb1Fc {
#[inline(always)]
fn from(val: u8) -> Ctrlb1Fc {
Ctrlb1Fc::from_bits(val)
}
}
impl From<Ctrlb1Fc> for u8 {
#[inline(always)]
fn from(val: Ctrlb1Fc) -> u8 {
Ctrlb1Fc::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb1SrcDscr {
#[doc = "Source address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the source."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb1SrcDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb1SrcDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb1SrcDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb1SrcDscr {
Ctrlb1SrcDscr::from_bits(val)
}
}
impl From<Ctrlb1SrcDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb1SrcDscr) -> u8 {
Ctrlb1SrcDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb1SrcIncr {
#[doc = "The source address is incremented"]
INCREMENTING = 0x0,
#[doc = "The source address is decremented"]
DECREMENTING = 0x01,
#[doc = "The source address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb1SrcIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb1SrcIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb1SrcIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb1SrcIncr {
Ctrlb1SrcIncr::from_bits(val)
}
}
impl From<Ctrlb1SrcIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb1SrcIncr) -> u8 {
Ctrlb1SrcIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb2DstDscr {
#[doc = "Destination address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the destination."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb2DstDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb2DstDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb2DstDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb2DstDscr {
Ctrlb2DstDscr::from_bits(val)
}
}
impl From<Ctrlb2DstDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb2DstDscr) -> u8 {
Ctrlb2DstDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb2DstIncr {
#[doc = "The destination address is incremented"]
INCREMENTING = 0x0,
#[doc = "The destination address is decremented"]
DECREMENTING = 0x01,
#[doc = "The destination address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb2DstIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb2DstIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb2DstIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb2DstIncr {
Ctrlb2DstIncr::from_bits(val)
}
}
impl From<Ctrlb2DstIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb2DstIncr) -> u8 {
Ctrlb2DstIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb2Fc {
#[doc = "Memory-to-Memory Transfer DMAC is flow controller"]
MEM2MEM_DMA_FC = 0x0,
#[doc = "Memory-to-Peripheral Transfer DMAC is flow controller"]
MEM2PER_DMA_FC = 0x01,
#[doc = "Peripheral-to-Memory Transfer DMAC is flow controller"]
PER2MEM_DMA_FC = 0x02,
#[doc = "Peripheral-to-Peripheral Transfer DMAC is flow controller"]
PER2PER_DMA_FC = 0x03,
}
impl Ctrlb2Fc {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb2Fc {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb2Fc {
#[inline(always)]
fn from(val: u8) -> Ctrlb2Fc {
Ctrlb2Fc::from_bits(val)
}
}
impl From<Ctrlb2Fc> for u8 {
#[inline(always)]
fn from(val: Ctrlb2Fc) -> u8 {
Ctrlb2Fc::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb2SrcDscr {
#[doc = "Source address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the source."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb2SrcDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb2SrcDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb2SrcDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb2SrcDscr {
Ctrlb2SrcDscr::from_bits(val)
}
}
impl From<Ctrlb2SrcDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb2SrcDscr) -> u8 {
Ctrlb2SrcDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb2SrcIncr {
#[doc = "The source address is incremented"]
INCREMENTING = 0x0,
#[doc = "The source address is decremented"]
DECREMENTING = 0x01,
#[doc = "The source address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb2SrcIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb2SrcIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb2SrcIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb2SrcIncr {
Ctrlb2SrcIncr::from_bits(val)
}
}
impl From<Ctrlb2SrcIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb2SrcIncr) -> u8 {
Ctrlb2SrcIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb3DstDscr {
#[doc = "Destination address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the destination."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb3DstDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb3DstDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb3DstDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb3DstDscr {
Ctrlb3DstDscr::from_bits(val)
}
}
impl From<Ctrlb3DstDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb3DstDscr) -> u8 {
Ctrlb3DstDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb3DstIncr {
#[doc = "The destination address is incremented"]
INCREMENTING = 0x0,
#[doc = "The destination address is decremented"]
DECREMENTING = 0x01,
#[doc = "The destination address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb3DstIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb3DstIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb3DstIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb3DstIncr {
Ctrlb3DstIncr::from_bits(val)
}
}
impl From<Ctrlb3DstIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb3DstIncr) -> u8 {
Ctrlb3DstIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb3Fc {
#[doc = "Memory-to-Memory Transfer DMAC is flow controller"]
MEM2MEM_DMA_FC = 0x0,
#[doc = "Memory-to-Peripheral Transfer DMAC is flow controller"]
MEM2PER_DMA_FC = 0x01,
#[doc = "Peripheral-to-Memory Transfer DMAC is flow controller"]
PER2MEM_DMA_FC = 0x02,
#[doc = "Peripheral-to-Peripheral Transfer DMAC is flow controller"]
PER2PER_DMA_FC = 0x03,
}
impl Ctrlb3Fc {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb3Fc {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb3Fc {
#[inline(always)]
fn from(val: u8) -> Ctrlb3Fc {
Ctrlb3Fc::from_bits(val)
}
}
impl From<Ctrlb3Fc> for u8 {
#[inline(always)]
fn from(val: Ctrlb3Fc) -> u8 {
Ctrlb3Fc::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb3SrcDscr {
#[doc = "Source address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the source."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb3SrcDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb3SrcDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb3SrcDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb3SrcDscr {
Ctrlb3SrcDscr::from_bits(val)
}
}
impl From<Ctrlb3SrcDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb3SrcDscr) -> u8 {
Ctrlb3SrcDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb3SrcIncr {
#[doc = "The source address is incremented"]
INCREMENTING = 0x0,
#[doc = "The source address is decremented"]
DECREMENTING = 0x01,
#[doc = "The source address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb3SrcIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb3SrcIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb3SrcIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb3SrcIncr {
Ctrlb3SrcIncr::from_bits(val)
}
}
impl From<Ctrlb3SrcIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb3SrcIncr) -> u8 {
Ctrlb3SrcIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb4DstDscr {
#[doc = "Destination address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the destination."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb4DstDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb4DstDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb4DstDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb4DstDscr {
Ctrlb4DstDscr::from_bits(val)
}
}
impl From<Ctrlb4DstDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb4DstDscr) -> u8 {
Ctrlb4DstDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb4DstIncr {
#[doc = "The destination address is incremented"]
INCREMENTING = 0x0,
#[doc = "The destination address is decremented"]
DECREMENTING = 0x01,
#[doc = "The destination address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb4DstIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb4DstIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb4DstIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb4DstIncr {
Ctrlb4DstIncr::from_bits(val)
}
}
impl From<Ctrlb4DstIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb4DstIncr) -> u8 {
Ctrlb4DstIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb4Fc {
#[doc = "Memory-to-Memory Transfer DMAC is flow controller"]
MEM2MEM_DMA_FC = 0x0,
#[doc = "Memory-to-Peripheral Transfer DMAC is flow controller"]
MEM2PER_DMA_FC = 0x01,
#[doc = "Peripheral-to-Memory Transfer DMAC is flow controller"]
PER2MEM_DMA_FC = 0x02,
#[doc = "Peripheral-to-Peripheral Transfer DMAC is flow controller"]
PER2PER_DMA_FC = 0x03,
}
impl Ctrlb4Fc {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb4Fc {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb4Fc {
#[inline(always)]
fn from(val: u8) -> Ctrlb4Fc {
Ctrlb4Fc::from_bits(val)
}
}
impl From<Ctrlb4Fc> for u8 {
#[inline(always)]
fn from(val: Ctrlb4Fc) -> u8 {
Ctrlb4Fc::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb4SrcDscr {
#[doc = "Source address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the source."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb4SrcDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb4SrcDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb4SrcDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb4SrcDscr {
Ctrlb4SrcDscr::from_bits(val)
}
}
impl From<Ctrlb4SrcDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb4SrcDscr) -> u8 {
Ctrlb4SrcDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb4SrcIncr {
#[doc = "The source address is incremented"]
INCREMENTING = 0x0,
#[doc = "The source address is decremented"]
DECREMENTING = 0x01,
#[doc = "The source address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb4SrcIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb4SrcIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb4SrcIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb4SrcIncr {
Ctrlb4SrcIncr::from_bits(val)
}
}
impl From<Ctrlb4SrcIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb4SrcIncr) -> u8 {
Ctrlb4SrcIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb5DstDscr {
#[doc = "Destination address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the destination."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb5DstDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb5DstDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb5DstDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb5DstDscr {
Ctrlb5DstDscr::from_bits(val)
}
}
impl From<Ctrlb5DstDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb5DstDscr) -> u8 {
Ctrlb5DstDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb5DstIncr {
#[doc = "The destination address is incremented"]
INCREMENTING = 0x0,
#[doc = "The destination address is decremented"]
DECREMENTING = 0x01,
#[doc = "The destination address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb5DstIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb5DstIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb5DstIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb5DstIncr {
Ctrlb5DstIncr::from_bits(val)
}
}
impl From<Ctrlb5DstIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb5DstIncr) -> u8 {
Ctrlb5DstIncr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb5Fc {
#[doc = "Memory-to-Memory Transfer DMAC is flow controller"]
MEM2MEM_DMA_FC = 0x0,
#[doc = "Memory-to-Peripheral Transfer DMAC is flow controller"]
MEM2PER_DMA_FC = 0x01,
#[doc = "Peripheral-to-Memory Transfer DMAC is flow controller"]
PER2MEM_DMA_FC = 0x02,
#[doc = "Peripheral-to-Peripheral Transfer DMAC is flow controller"]
PER2PER_DMA_FC = 0x03,
}
impl Ctrlb5Fc {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb5Fc {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb5Fc {
#[inline(always)]
fn from(val: u8) -> Ctrlb5Fc {
Ctrlb5Fc::from_bits(val)
}
}
impl From<Ctrlb5Fc> for u8 {
#[inline(always)]
fn from(val: Ctrlb5Fc) -> u8 {
Ctrlb5Fc::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb5SrcDscr {
#[doc = "Source address is updated when the descriptor is fetched from the memory."]
FETCH_FROM_MEM = 0x0,
#[doc = "Buffer Descriptor Fetch operation is disabled for the source."]
FETCH_DISABLE = 0x01,
}
impl Ctrlb5SrcDscr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb5SrcDscr {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb5SrcDscr {
#[inline(always)]
fn from(val: u8) -> Ctrlb5SrcDscr {
Ctrlb5SrcDscr::from_bits(val)
}
}
impl From<Ctrlb5SrcDscr> for u8 {
#[inline(always)]
fn from(val: Ctrlb5SrcDscr) -> u8 {
Ctrlb5SrcDscr::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Ctrlb5SrcIncr {
#[doc = "The source address is incremented"]
INCREMENTING = 0x0,
#[doc = "The source address is decremented"]
DECREMENTING = 0x01,
#[doc = "The source address remains unchanged"]
FIXED = 0x02,
_RESERVED_3 = 0x03,
}
impl Ctrlb5SrcIncr {
#[inline(always)]
pub const fn from_bits(val: u8) -> Ctrlb5SrcIncr {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Ctrlb5SrcIncr {
#[inline(always)]
fn from(val: u8) -> Ctrlb5SrcIncr {
Ctrlb5SrcIncr::from_bits(val)
}
}
impl From<Ctrlb5SrcIncr> for u8 {
#[inline(always)]
fn from(val: Ctrlb5SrcIncr) -> u8 {
Ctrlb5SrcIncr::to_bits(val)
}
}
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)]
pub struct Wpkey(u32);
impl Wpkey {
#[doc = "Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0."]
pub const PASSWD: Self = Self(0x0044_4d41);
}
impl Wpkey {
pub const fn from_bits(val: u32) -> Wpkey {
Self(val & 0x00ff_ffff)
}
pub const fn to_bits(self) -> u32 {
self.0
}
}
impl core::fmt::Debug for Wpkey {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
match self.0 {
0x0044_4d41 => f.write_str("PASSWD"),
other => core::write!(f, "0x{:02X}", other),
}
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Wpkey {
fn format(&self, f: defmt::Formatter) {
match self.0 {
0x0044_4d41 => defmt::write!(f, "PASSWD"),
other => defmt::write!(f, "0x{:02X}", other),
}
}
}
impl From<u32> for Wpkey {
#[inline(always)]
fn from(val: u32) -> Wpkey {
Wpkey::from_bits(val)
}
}
impl From<Wpkey> for u32 {
#[inline(always)]
fn from(val: Wpkey) -> u32 {
Wpkey::to_bits(val)
}
}