1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::C2 {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R { bits: self.register.get() }
26 }
27 #[doc = r" Writes to the register"]
28 #[inline]
29 pub fn write<F>(&self, f: F)
30 where
31 F: FnOnce(&mut W) -> &mut W,
32 {
33 let mut w = W::reset_value();
34 f(&mut w);
35 self.register.set(w.bits);
36 }
37 #[doc = r" Writes the reset value to the register"]
38 #[inline]
39 pub fn reset(&self) {
40 self.write(|w| w)
41 }
42}
43#[doc = r" Value of the field"]
44pub struct ACONR {
45 bits: u8,
46}
47impl ACONR {
48 #[doc = r" Value of the field as raw bits"]
49 #[inline]
50 pub fn bits(&self) -> u8 {
51 self.bits
52 }
53}
54#[doc = "Possible values of the field `INITMOD`"]
55#[derive(Clone, Copy, Debug, PartialEq)]
56pub enum INITMODR {
57 #[doc = "The modulus is set to 64(same with 111111)."]
58 _000000,
59 #[doc = r" Reserved"]
60 _Reserved(u8),
61}
62impl INITMODR {
63 #[doc = r" Value of the field as raw bits"]
64 #[inline]
65 pub fn bits(&self) -> u8 {
66 match *self {
67 INITMODR::_000000 => 0,
68 INITMODR::_Reserved(bits) => bits,
69 }
70 }
71 #[allow(missing_docs)]
72 #[doc(hidden)]
73 #[inline]
74 pub fn _from(value: u8) -> INITMODR {
75 match value {
76 0 => INITMODR::_000000,
77 i => INITMODR::_Reserved(i),
78 }
79 }
80 #[doc = "Checks if the value of the field is `_000000`"]
81 #[inline]
82 pub fn is_000000(&self) -> bool {
83 *self == INITMODR::_000000
84 }
85}
86#[doc = "Possible values of the field `NSAM`"]
87#[derive(Clone, Copy, Debug, PartialEq)]
88pub enum NSAMR {
89 #[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
90 _00,
91 #[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
92 _01,
93 #[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
94 _10,
95 #[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
96 _11,
97}
98impl NSAMR {
99 #[doc = r" Value of the field as raw bits"]
100 #[inline]
101 pub fn bits(&self) -> u8 {
102 match *self {
103 NSAMR::_00 => 0,
104 NSAMR::_01 => 1,
105 NSAMR::_10 => 2,
106 NSAMR::_11 => 3,
107 }
108 }
109 #[allow(missing_docs)]
110 #[doc(hidden)]
111 #[inline]
112 pub fn _from(value: u8) -> NSAMR {
113 match value {
114 0 => NSAMR::_00,
115 1 => NSAMR::_01,
116 2 => NSAMR::_10,
117 3 => NSAMR::_11,
118 _ => unreachable!(),
119 }
120 }
121 #[doc = "Checks if the value of the field is `_00`"]
122 #[inline]
123 pub fn is_00(&self) -> bool {
124 *self == NSAMR::_00
125 }
126 #[doc = "Checks if the value of the field is `_01`"]
127 #[inline]
128 pub fn is_01(&self) -> bool {
129 *self == NSAMR::_01
130 }
131 #[doc = "Checks if the value of the field is `_10`"]
132 #[inline]
133 pub fn is_10(&self) -> bool {
134 *self == NSAMR::_10
135 }
136 #[doc = "Checks if the value of the field is `_11`"]
137 #[inline]
138 pub fn is_11(&self) -> bool {
139 *self == NSAMR::_11
140 }
141}
142#[doc = r" Value of the field"]
143pub struct CH0FR {
144 bits: bool,
145}
146impl CH0FR {
147 #[doc = r" Value of the field as raw bits"]
148 #[inline]
149 pub fn bit(&self) -> bool {
150 self.bits
151 }
152 #[doc = r" Returns `true` if the bit is clear (0)"]
153 #[inline]
154 pub fn bit_is_clear(&self) -> bool {
155 !self.bit()
156 }
157 #[doc = r" Returns `true` if the bit is set (1)"]
158 #[inline]
159 pub fn bit_is_set(&self) -> bool {
160 self.bit()
161 }
162}
163#[doc = r" Value of the field"]
164pub struct CH1FR {
165 bits: bool,
166}
167impl CH1FR {
168 #[doc = r" Value of the field as raw bits"]
169 #[inline]
170 pub fn bit(&self) -> bool {
171 self.bits
172 }
173 #[doc = r" Returns `true` if the bit is clear (0)"]
174 #[inline]
175 pub fn bit_is_clear(&self) -> bool {
176 !self.bit()
177 }
178 #[doc = r" Returns `true` if the bit is set (1)"]
179 #[inline]
180 pub fn bit_is_set(&self) -> bool {
181 self.bit()
182 }
183}
184#[doc = r" Value of the field"]
185pub struct CH2FR {
186 bits: bool,
187}
188impl CH2FR {
189 #[doc = r" Value of the field as raw bits"]
190 #[inline]
191 pub fn bit(&self) -> bool {
192 self.bits
193 }
194 #[doc = r" Returns `true` if the bit is clear (0)"]
195 #[inline]
196 pub fn bit_is_clear(&self) -> bool {
197 !self.bit()
198 }
199 #[doc = r" Returns `true` if the bit is set (1)"]
200 #[inline]
201 pub fn bit_is_set(&self) -> bool {
202 self.bit()
203 }
204}
205#[doc = r" Value of the field"]
206pub struct CH3FR {
207 bits: bool,
208}
209impl CH3FR {
210 #[doc = r" Value of the field as raw bits"]
211 #[inline]
212 pub fn bit(&self) -> bool {
213 self.bits
214 }
215 #[doc = r" Returns `true` if the bit is clear (0)"]
216 #[inline]
217 pub fn bit_is_clear(&self) -> bool {
218 !self.bit()
219 }
220 #[doc = r" Returns `true` if the bit is set (1)"]
221 #[inline]
222 pub fn bit_is_set(&self) -> bool {
223 self.bit()
224 }
225}
226#[doc = r" Value of the field"]
227pub struct CH4FR {
228 bits: bool,
229}
230impl CH4FR {
231 #[doc = r" Value of the field as raw bits"]
232 #[inline]
233 pub fn bit(&self) -> bool {
234 self.bits
235 }
236 #[doc = r" Returns `true` if the bit is clear (0)"]
237 #[inline]
238 pub fn bit_is_clear(&self) -> bool {
239 !self.bit()
240 }
241 #[doc = r" Returns `true` if the bit is set (1)"]
242 #[inline]
243 pub fn bit_is_set(&self) -> bool {
244 self.bit()
245 }
246}
247#[doc = r" Value of the field"]
248pub struct CH5FR {
249 bits: bool,
250}
251impl CH5FR {
252 #[doc = r" Value of the field as raw bits"]
253 #[inline]
254 pub fn bit(&self) -> bool {
255 self.bits
256 }
257 #[doc = r" Returns `true` if the bit is clear (0)"]
258 #[inline]
259 pub fn bit_is_clear(&self) -> bool {
260 !self.bit()
261 }
262 #[doc = r" Returns `true` if the bit is set (1)"]
263 #[inline]
264 pub fn bit_is_set(&self) -> bool {
265 self.bit()
266 }
267}
268#[doc = r" Value of the field"]
269pub struct CH6FR {
270 bits: bool,
271}
272impl CH6FR {
273 #[doc = r" Value of the field as raw bits"]
274 #[inline]
275 pub fn bit(&self) -> bool {
276 self.bits
277 }
278 #[doc = r" Returns `true` if the bit is clear (0)"]
279 #[inline]
280 pub fn bit_is_clear(&self) -> bool {
281 !self.bit()
282 }
283 #[doc = r" Returns `true` if the bit is set (1)"]
284 #[inline]
285 pub fn bit_is_set(&self) -> bool {
286 self.bit()
287 }
288}
289#[doc = r" Value of the field"]
290pub struct CH7FR {
291 bits: bool,
292}
293impl CH7FR {
294 #[doc = r" Value of the field as raw bits"]
295 #[inline]
296 pub fn bit(&self) -> bool {
297 self.bits
298 }
299 #[doc = r" Returns `true` if the bit is clear (0)"]
300 #[inline]
301 pub fn bit_is_clear(&self) -> bool {
302 !self.bit()
303 }
304 #[doc = r" Returns `true` if the bit is set (1)"]
305 #[inline]
306 pub fn bit_is_set(&self) -> bool {
307 self.bit()
308 }
309}
310#[doc = "Possible values of the field `FXMXCH`"]
311#[derive(Clone, Copy, Debug, PartialEq)]
312pub enum FXMXCHR {
313 #[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
314 _000,
315 #[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
316 _001,
317 #[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
318 _010,
319 #[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
320 _011,
321 #[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
322 _100,
323 #[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
324 _101,
325 #[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
326 _110,
327 #[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
328 _111,
329}
330impl FXMXCHR {
331 #[doc = r" Value of the field as raw bits"]
332 #[inline]
333 pub fn bits(&self) -> u8 {
334 match *self {
335 FXMXCHR::_000 => 0,
336 FXMXCHR::_001 => 1,
337 FXMXCHR::_010 => 2,
338 FXMXCHR::_011 => 3,
339 FXMXCHR::_100 => 4,
340 FXMXCHR::_101 => 5,
341 FXMXCHR::_110 => 6,
342 FXMXCHR::_111 => 7,
343 }
344 }
345 #[allow(missing_docs)]
346 #[doc(hidden)]
347 #[inline]
348 pub fn _from(value: u8) -> FXMXCHR {
349 match value {
350 0 => FXMXCHR::_000,
351 1 => FXMXCHR::_001,
352 2 => FXMXCHR::_010,
353 3 => FXMXCHR::_011,
354 4 => FXMXCHR::_100,
355 5 => FXMXCHR::_101,
356 6 => FXMXCHR::_110,
357 7 => FXMXCHR::_111,
358 _ => unreachable!(),
359 }
360 }
361 #[doc = "Checks if the value of the field is `_000`"]
362 #[inline]
363 pub fn is_000(&self) -> bool {
364 *self == FXMXCHR::_000
365 }
366 #[doc = "Checks if the value of the field is `_001`"]
367 #[inline]
368 pub fn is_001(&self) -> bool {
369 *self == FXMXCHR::_001
370 }
371 #[doc = "Checks if the value of the field is `_010`"]
372 #[inline]
373 pub fn is_010(&self) -> bool {
374 *self == FXMXCHR::_010
375 }
376 #[doc = "Checks if the value of the field is `_011`"]
377 #[inline]
378 pub fn is_011(&self) -> bool {
379 *self == FXMXCHR::_011
380 }
381 #[doc = "Checks if the value of the field is `_100`"]
382 #[inline]
383 pub fn is_100(&self) -> bool {
384 *self == FXMXCHR::_100
385 }
386 #[doc = "Checks if the value of the field is `_101`"]
387 #[inline]
388 pub fn is_101(&self) -> bool {
389 *self == FXMXCHR::_101
390 }
391 #[doc = "Checks if the value of the field is `_110`"]
392 #[inline]
393 pub fn is_110(&self) -> bool {
394 *self == FXMXCHR::_110
395 }
396 #[doc = "Checks if the value of the field is `_111`"]
397 #[inline]
398 pub fn is_111(&self) -> bool {
399 *self == FXMXCHR::_111
400 }
401}
402#[doc = "Possible values of the field `FXMP`"]
403#[derive(Clone, Copy, Debug, PartialEq)]
404pub enum FXMPR {
405 #[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
406 _0,
407 #[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
408 _1,
409}
410impl FXMPR {
411 #[doc = r" Returns `true` if the bit is clear (0)"]
412 #[inline]
413 pub fn bit_is_clear(&self) -> bool {
414 !self.bit()
415 }
416 #[doc = r" Returns `true` if the bit is set (1)"]
417 #[inline]
418 pub fn bit_is_set(&self) -> bool {
419 self.bit()
420 }
421 #[doc = r" Value of the field as raw bits"]
422 #[inline]
423 pub fn bit(&self) -> bool {
424 match *self {
425 FXMPR::_0 => false,
426 FXMPR::_1 => true,
427 }
428 }
429 #[allow(missing_docs)]
430 #[doc(hidden)]
431 #[inline]
432 pub fn _from(value: bool) -> FXMPR {
433 match value {
434 false => FXMPR::_0,
435 true => FXMPR::_1,
436 }
437 }
438 #[doc = "Checks if the value of the field is `_0`"]
439 #[inline]
440 pub fn is_0(&self) -> bool {
441 *self == FXMPR::_0
442 }
443 #[doc = "Checks if the value of the field is `_1`"]
444 #[inline]
445 pub fn is_1(&self) -> bool {
446 *self == FXMPR::_1
447 }
448}
449#[doc = "Possible values of the field `RRIE`"]
450#[derive(Clone, Copy, Debug, PartialEq)]
451pub enum RRIER {
452 #[doc = "The round-robin interrupt is disabled."]
453 _0,
454 #[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
455 _1,
456}
457impl RRIER {
458 #[doc = r" Returns `true` if the bit is clear (0)"]
459 #[inline]
460 pub fn bit_is_clear(&self) -> bool {
461 !self.bit()
462 }
463 #[doc = r" Returns `true` if the bit is set (1)"]
464 #[inline]
465 pub fn bit_is_set(&self) -> bool {
466 self.bit()
467 }
468 #[doc = r" Value of the field as raw bits"]
469 #[inline]
470 pub fn bit(&self) -> bool {
471 match *self {
472 RRIER::_0 => false,
473 RRIER::_1 => true,
474 }
475 }
476 #[allow(missing_docs)]
477 #[doc(hidden)]
478 #[inline]
479 pub fn _from(value: bool) -> RRIER {
480 match value {
481 false => RRIER::_0,
482 true => RRIER::_1,
483 }
484 }
485 #[doc = "Checks if the value of the field is `_0`"]
486 #[inline]
487 pub fn is_0(&self) -> bool {
488 *self == RRIER::_0
489 }
490 #[doc = "Checks if the value of the field is `_1`"]
491 #[inline]
492 pub fn is_1(&self) -> bool {
493 *self == RRIER::_1
494 }
495}
496#[doc = "Possible values of the field `RRE`"]
497#[derive(Clone, Copy, Debug, PartialEq)]
498pub enum RRER {
499 #[doc = "Round-robin operation is disabled."]
500 _0,
501 #[doc = "Round-robin operation is enabled."]
502 _1,
503}
504impl RRER {
505 #[doc = r" Returns `true` if the bit is clear (0)"]
506 #[inline]
507 pub fn bit_is_clear(&self) -> bool {
508 !self.bit()
509 }
510 #[doc = r" Returns `true` if the bit is set (1)"]
511 #[inline]
512 pub fn bit_is_set(&self) -> bool {
513 self.bit()
514 }
515 #[doc = r" Value of the field as raw bits"]
516 #[inline]
517 pub fn bit(&self) -> bool {
518 match *self {
519 RRER::_0 => false,
520 RRER::_1 => true,
521 }
522 }
523 #[allow(missing_docs)]
524 #[doc(hidden)]
525 #[inline]
526 pub fn _from(value: bool) -> RRER {
527 match value {
528 false => RRER::_0,
529 true => RRER::_1,
530 }
531 }
532 #[doc = "Checks if the value of the field is `_0`"]
533 #[inline]
534 pub fn is_0(&self) -> bool {
535 *self == RRER::_0
536 }
537 #[doc = "Checks if the value of the field is `_1`"]
538 #[inline]
539 pub fn is_1(&self) -> bool {
540 *self == RRER::_1
541 }
542}
543#[doc = r" Proxy"]
544pub struct _ACONW<'a> {
545 w: &'a mut W,
546}
547impl<'a> _ACONW<'a> {
548 #[doc = r" Writes raw bits to the field"]
549 #[inline]
550 pub unsafe fn bits(self, value: u8) -> &'a mut W {
551 const MASK: u8 = 255;
552 const OFFSET: u8 = 0;
553 self.w.bits &= !((MASK as u32) << OFFSET);
554 self.w.bits |= ((value & MASK) as u32) << OFFSET;
555 self.w
556 }
557}
558#[doc = "Values that can be written to the field `INITMOD`"]
559pub enum INITMODW {
560 #[doc = "The modulus is set to 64(same with 111111)."]
561 _000000,
562}
563impl INITMODW {
564 #[allow(missing_docs)]
565 #[doc(hidden)]
566 #[inline]
567 pub fn _bits(&self) -> u8 {
568 match *self {
569 INITMODW::_000000 => 0,
570 }
571 }
572}
573#[doc = r" Proxy"]
574pub struct _INITMODW<'a> {
575 w: &'a mut W,
576}
577impl<'a> _INITMODW<'a> {
578 #[doc = r" Writes `variant` to the field"]
579 #[inline]
580 pub fn variant(self, variant: INITMODW) -> &'a mut W {
581 unsafe { self.bits(variant._bits()) }
582 }
583 #[doc = "The modulus is set to 64(same with 111111)."]
584 #[inline]
585 pub fn _000000(self) -> &'a mut W {
586 self.variant(INITMODW::_000000)
587 }
588 #[doc = r" Writes raw bits to the field"]
589 #[inline]
590 pub unsafe fn bits(self, value: u8) -> &'a mut W {
591 const MASK: u8 = 63;
592 const OFFSET: u8 = 8;
593 self.w.bits &= !((MASK as u32) << OFFSET);
594 self.w.bits |= ((value & MASK) as u32) << OFFSET;
595 self.w
596 }
597}
598#[doc = "Values that can be written to the field `NSAM`"]
599pub enum NSAMW {
600 #[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
601 _00,
602 #[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
603 _01,
604 #[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
605 _10,
606 #[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
607 _11,
608}
609impl NSAMW {
610 #[allow(missing_docs)]
611 #[doc(hidden)]
612 #[inline]
613 pub fn _bits(&self) -> u8 {
614 match *self {
615 NSAMW::_00 => 0,
616 NSAMW::_01 => 1,
617 NSAMW::_10 => 2,
618 NSAMW::_11 => 3,
619 }
620 }
621}
622#[doc = r" Proxy"]
623pub struct _NSAMW<'a> {
624 w: &'a mut W,
625}
626impl<'a> _NSAMW<'a> {
627 #[doc = r" Writes `variant` to the field"]
628 #[inline]
629 pub fn variant(self, variant: NSAMW) -> &'a mut W {
630 {
631 self.bits(variant._bits())
632 }
633 }
634 #[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
635 #[inline]
636 pub fn _00(self) -> &'a mut W {
637 self.variant(NSAMW::_00)
638 }
639 #[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
640 #[inline]
641 pub fn _01(self) -> &'a mut W {
642 self.variant(NSAMW::_01)
643 }
644 #[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
645 #[inline]
646 pub fn _10(self) -> &'a mut W {
647 self.variant(NSAMW::_10)
648 }
649 #[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
650 #[inline]
651 pub fn _11(self) -> &'a mut W {
652 self.variant(NSAMW::_11)
653 }
654 #[doc = r" Writes raw bits to the field"]
655 #[inline]
656 pub fn bits(self, value: u8) -> &'a mut W {
657 const MASK: u8 = 3;
658 const OFFSET: u8 = 14;
659 self.w.bits &= !((MASK as u32) << OFFSET);
660 self.w.bits |= ((value & MASK) as u32) << OFFSET;
661 self.w
662 }
663}
664#[doc = r" Proxy"]
665pub struct _CH0FW<'a> {
666 w: &'a mut W,
667}
668impl<'a> _CH0FW<'a> {
669 #[doc = r" Sets the field bit"]
670 pub fn set_bit(self) -> &'a mut W {
671 self.bit(true)
672 }
673 #[doc = r" Clears the field bit"]
674 pub fn clear_bit(self) -> &'a mut W {
675 self.bit(false)
676 }
677 #[doc = r" Writes raw bits to the field"]
678 #[inline]
679 pub fn bit(self, value: bool) -> &'a mut W {
680 const MASK: bool = true;
681 const OFFSET: u8 = 16;
682 self.w.bits &= !((MASK as u32) << OFFSET);
683 self.w.bits |= ((value & MASK) as u32) << OFFSET;
684 self.w
685 }
686}
687#[doc = r" Proxy"]
688pub struct _CH1FW<'a> {
689 w: &'a mut W,
690}
691impl<'a> _CH1FW<'a> {
692 #[doc = r" Sets the field bit"]
693 pub fn set_bit(self) -> &'a mut W {
694 self.bit(true)
695 }
696 #[doc = r" Clears the field bit"]
697 pub fn clear_bit(self) -> &'a mut W {
698 self.bit(false)
699 }
700 #[doc = r" Writes raw bits to the field"]
701 #[inline]
702 pub fn bit(self, value: bool) -> &'a mut W {
703 const MASK: bool = true;
704 const OFFSET: u8 = 17;
705 self.w.bits &= !((MASK as u32) << OFFSET);
706 self.w.bits |= ((value & MASK) as u32) << OFFSET;
707 self.w
708 }
709}
710#[doc = r" Proxy"]
711pub struct _CH2FW<'a> {
712 w: &'a mut W,
713}
714impl<'a> _CH2FW<'a> {
715 #[doc = r" Sets the field bit"]
716 pub fn set_bit(self) -> &'a mut W {
717 self.bit(true)
718 }
719 #[doc = r" Clears the field bit"]
720 pub fn clear_bit(self) -> &'a mut W {
721 self.bit(false)
722 }
723 #[doc = r" Writes raw bits to the field"]
724 #[inline]
725 pub fn bit(self, value: bool) -> &'a mut W {
726 const MASK: bool = true;
727 const OFFSET: u8 = 18;
728 self.w.bits &= !((MASK as u32) << OFFSET);
729 self.w.bits |= ((value & MASK) as u32) << OFFSET;
730 self.w
731 }
732}
733#[doc = r" Proxy"]
734pub struct _CH3FW<'a> {
735 w: &'a mut W,
736}
737impl<'a> _CH3FW<'a> {
738 #[doc = r" Sets the field bit"]
739 pub fn set_bit(self) -> &'a mut W {
740 self.bit(true)
741 }
742 #[doc = r" Clears the field bit"]
743 pub fn clear_bit(self) -> &'a mut W {
744 self.bit(false)
745 }
746 #[doc = r" Writes raw bits to the field"]
747 #[inline]
748 pub fn bit(self, value: bool) -> &'a mut W {
749 const MASK: bool = true;
750 const OFFSET: u8 = 19;
751 self.w.bits &= !((MASK as u32) << OFFSET);
752 self.w.bits |= ((value & MASK) as u32) << OFFSET;
753 self.w
754 }
755}
756#[doc = r" Proxy"]
757pub struct _CH4FW<'a> {
758 w: &'a mut W,
759}
760impl<'a> _CH4FW<'a> {
761 #[doc = r" Sets the field bit"]
762 pub fn set_bit(self) -> &'a mut W {
763 self.bit(true)
764 }
765 #[doc = r" Clears the field bit"]
766 pub fn clear_bit(self) -> &'a mut W {
767 self.bit(false)
768 }
769 #[doc = r" Writes raw bits to the field"]
770 #[inline]
771 pub fn bit(self, value: bool) -> &'a mut W {
772 const MASK: bool = true;
773 const OFFSET: u8 = 20;
774 self.w.bits &= !((MASK as u32) << OFFSET);
775 self.w.bits |= ((value & MASK) as u32) << OFFSET;
776 self.w
777 }
778}
779#[doc = r" Proxy"]
780pub struct _CH5FW<'a> {
781 w: &'a mut W,
782}
783impl<'a> _CH5FW<'a> {
784 #[doc = r" Sets the field bit"]
785 pub fn set_bit(self) -> &'a mut W {
786 self.bit(true)
787 }
788 #[doc = r" Clears the field bit"]
789 pub fn clear_bit(self) -> &'a mut W {
790 self.bit(false)
791 }
792 #[doc = r" Writes raw bits to the field"]
793 #[inline]
794 pub fn bit(self, value: bool) -> &'a mut W {
795 const MASK: bool = true;
796 const OFFSET: u8 = 21;
797 self.w.bits &= !((MASK as u32) << OFFSET);
798 self.w.bits |= ((value & MASK) as u32) << OFFSET;
799 self.w
800 }
801}
802#[doc = r" Proxy"]
803pub struct _CH6FW<'a> {
804 w: &'a mut W,
805}
806impl<'a> _CH6FW<'a> {
807 #[doc = r" Sets the field bit"]
808 pub fn set_bit(self) -> &'a mut W {
809 self.bit(true)
810 }
811 #[doc = r" Clears the field bit"]
812 pub fn clear_bit(self) -> &'a mut W {
813 self.bit(false)
814 }
815 #[doc = r" Writes raw bits to the field"]
816 #[inline]
817 pub fn bit(self, value: bool) -> &'a mut W {
818 const MASK: bool = true;
819 const OFFSET: u8 = 22;
820 self.w.bits &= !((MASK as u32) << OFFSET);
821 self.w.bits |= ((value & MASK) as u32) << OFFSET;
822 self.w
823 }
824}
825#[doc = r" Proxy"]
826pub struct _CH7FW<'a> {
827 w: &'a mut W,
828}
829impl<'a> _CH7FW<'a> {
830 #[doc = r" Sets the field bit"]
831 pub fn set_bit(self) -> &'a mut W {
832 self.bit(true)
833 }
834 #[doc = r" Clears the field bit"]
835 pub fn clear_bit(self) -> &'a mut W {
836 self.bit(false)
837 }
838 #[doc = r" Writes raw bits to the field"]
839 #[inline]
840 pub fn bit(self, value: bool) -> &'a mut W {
841 const MASK: bool = true;
842 const OFFSET: u8 = 23;
843 self.w.bits &= !((MASK as u32) << OFFSET);
844 self.w.bits |= ((value & MASK) as u32) << OFFSET;
845 self.w
846 }
847}
848#[doc = "Values that can be written to the field `FXMXCH`"]
849pub enum FXMXCHW {
850 #[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
851 _000,
852 #[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
853 _001,
854 #[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
855 _010,
856 #[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
857 _011,
858 #[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
859 _100,
860 #[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
861 _101,
862 #[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
863 _110,
864 #[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
865 _111,
866}
867impl FXMXCHW {
868 #[allow(missing_docs)]
869 #[doc(hidden)]
870 #[inline]
871 pub fn _bits(&self) -> u8 {
872 match *self {
873 FXMXCHW::_000 => 0,
874 FXMXCHW::_001 => 1,
875 FXMXCHW::_010 => 2,
876 FXMXCHW::_011 => 3,
877 FXMXCHW::_100 => 4,
878 FXMXCHW::_101 => 5,
879 FXMXCHW::_110 => 6,
880 FXMXCHW::_111 => 7,
881 }
882 }
883}
884#[doc = r" Proxy"]
885pub struct _FXMXCHW<'a> {
886 w: &'a mut W,
887}
888impl<'a> _FXMXCHW<'a> {
889 #[doc = r" Writes `variant` to the field"]
890 #[inline]
891 pub fn variant(self, variant: FXMXCHW) -> &'a mut W {
892 {
893 self.bits(variant._bits())
894 }
895 }
896 #[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
897 #[inline]
898 pub fn _000(self) -> &'a mut W {
899 self.variant(FXMXCHW::_000)
900 }
901 #[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
902 #[inline]
903 pub fn _001(self) -> &'a mut W {
904 self.variant(FXMXCHW::_001)
905 }
906 #[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
907 #[inline]
908 pub fn _010(self) -> &'a mut W {
909 self.variant(FXMXCHW::_010)
910 }
911 #[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
912 #[inline]
913 pub fn _011(self) -> &'a mut W {
914 self.variant(FXMXCHW::_011)
915 }
916 #[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
917 #[inline]
918 pub fn _100(self) -> &'a mut W {
919 self.variant(FXMXCHW::_100)
920 }
921 #[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
922 #[inline]
923 pub fn _101(self) -> &'a mut W {
924 self.variant(FXMXCHW::_101)
925 }
926 #[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
927 #[inline]
928 pub fn _110(self) -> &'a mut W {
929 self.variant(FXMXCHW::_110)
930 }
931 #[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
932 #[inline]
933 pub fn _111(self) -> &'a mut W {
934 self.variant(FXMXCHW::_111)
935 }
936 #[doc = r" Writes raw bits to the field"]
937 #[inline]
938 pub fn bits(self, value: u8) -> &'a mut W {
939 const MASK: u8 = 7;
940 const OFFSET: u8 = 25;
941 self.w.bits &= !((MASK as u32) << OFFSET);
942 self.w.bits |= ((value & MASK) as u32) << OFFSET;
943 self.w
944 }
945}
946#[doc = "Values that can be written to the field `FXMP`"]
947pub enum FXMPW {
948 #[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
949 _0,
950 #[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
951 _1,
952}
953impl FXMPW {
954 #[allow(missing_docs)]
955 #[doc(hidden)]
956 #[inline]
957 pub fn _bits(&self) -> bool {
958 match *self {
959 FXMPW::_0 => false,
960 FXMPW::_1 => true,
961 }
962 }
963}
964#[doc = r" Proxy"]
965pub struct _FXMPW<'a> {
966 w: &'a mut W,
967}
968impl<'a> _FXMPW<'a> {
969 #[doc = r" Writes `variant` to the field"]
970 #[inline]
971 pub fn variant(self, variant: FXMPW) -> &'a mut W {
972 {
973 self.bit(variant._bits())
974 }
975 }
976 #[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
977 #[inline]
978 pub fn _0(self) -> &'a mut W {
979 self.variant(FXMPW::_0)
980 }
981 #[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
982 #[inline]
983 pub fn _1(self) -> &'a mut W {
984 self.variant(FXMPW::_1)
985 }
986 #[doc = r" Sets the field bit"]
987 pub fn set_bit(self) -> &'a mut W {
988 self.bit(true)
989 }
990 #[doc = r" Clears the field bit"]
991 pub fn clear_bit(self) -> &'a mut W {
992 self.bit(false)
993 }
994 #[doc = r" Writes raw bits to the field"]
995 #[inline]
996 pub fn bit(self, value: bool) -> &'a mut W {
997 const MASK: bool = true;
998 const OFFSET: u8 = 29;
999 self.w.bits &= !((MASK as u32) << OFFSET);
1000 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1001 self.w
1002 }
1003}
1004#[doc = "Values that can be written to the field `RRIE`"]
1005pub enum RRIEW {
1006 #[doc = "The round-robin interrupt is disabled."]
1007 _0,
1008 #[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
1009 _1,
1010}
1011impl RRIEW {
1012 #[allow(missing_docs)]
1013 #[doc(hidden)]
1014 #[inline]
1015 pub fn _bits(&self) -> bool {
1016 match *self {
1017 RRIEW::_0 => false,
1018 RRIEW::_1 => true,
1019 }
1020 }
1021}
1022#[doc = r" Proxy"]
1023pub struct _RRIEW<'a> {
1024 w: &'a mut W,
1025}
1026impl<'a> _RRIEW<'a> {
1027 #[doc = r" Writes `variant` to the field"]
1028 #[inline]
1029 pub fn variant(self, variant: RRIEW) -> &'a mut W {
1030 {
1031 self.bit(variant._bits())
1032 }
1033 }
1034 #[doc = "The round-robin interrupt is disabled."]
1035 #[inline]
1036 pub fn _0(self) -> &'a mut W {
1037 self.variant(RRIEW::_0)
1038 }
1039 #[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
1040 #[inline]
1041 pub fn _1(self) -> &'a mut W {
1042 self.variant(RRIEW::_1)
1043 }
1044 #[doc = r" Sets the field bit"]
1045 pub fn set_bit(self) -> &'a mut W {
1046 self.bit(true)
1047 }
1048 #[doc = r" Clears the field bit"]
1049 pub fn clear_bit(self) -> &'a mut W {
1050 self.bit(false)
1051 }
1052 #[doc = r" Writes raw bits to the field"]
1053 #[inline]
1054 pub fn bit(self, value: bool) -> &'a mut W {
1055 const MASK: bool = true;
1056 const OFFSET: u8 = 30;
1057 self.w.bits &= !((MASK as u32) << OFFSET);
1058 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1059 self.w
1060 }
1061}
1062#[doc = "Values that can be written to the field `RRE`"]
1063pub enum RREW {
1064 #[doc = "Round-robin operation is disabled."]
1065 _0,
1066 #[doc = "Round-robin operation is enabled."]
1067 _1,
1068}
1069impl RREW {
1070 #[allow(missing_docs)]
1071 #[doc(hidden)]
1072 #[inline]
1073 pub fn _bits(&self) -> bool {
1074 match *self {
1075 RREW::_0 => false,
1076 RREW::_1 => true,
1077 }
1078 }
1079}
1080#[doc = r" Proxy"]
1081pub struct _RREW<'a> {
1082 w: &'a mut W,
1083}
1084impl<'a> _RREW<'a> {
1085 #[doc = r" Writes `variant` to the field"]
1086 #[inline]
1087 pub fn variant(self, variant: RREW) -> &'a mut W {
1088 {
1089 self.bit(variant._bits())
1090 }
1091 }
1092 #[doc = "Round-robin operation is disabled."]
1093 #[inline]
1094 pub fn _0(self) -> &'a mut W {
1095 self.variant(RREW::_0)
1096 }
1097 #[doc = "Round-robin operation is enabled."]
1098 #[inline]
1099 pub fn _1(self) -> &'a mut W {
1100 self.variant(RREW::_1)
1101 }
1102 #[doc = r" Sets the field bit"]
1103 pub fn set_bit(self) -> &'a mut W {
1104 self.bit(true)
1105 }
1106 #[doc = r" Clears the field bit"]
1107 pub fn clear_bit(self) -> &'a mut W {
1108 self.bit(false)
1109 }
1110 #[doc = r" Writes raw bits to the field"]
1111 #[inline]
1112 pub fn bit(self, value: bool) -> &'a mut W {
1113 const MASK: bool = true;
1114 const OFFSET: u8 = 31;
1115 self.w.bits &= !((MASK as u32) << OFFSET);
1116 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1117 self.w
1118 }
1119}
1120impl R {
1121 #[doc = r" Value of the register as raw bits"]
1122 #[inline]
1123 pub fn bits(&self) -> u32 {
1124 self.bits
1125 }
1126 #[doc = "Bits 0:7 - The result of the input comparison for channel n"]
1127 #[inline]
1128 pub fn acon(&self) -> ACONR {
1129 let bits = {
1130 const MASK: u8 = 255;
1131 const OFFSET: u8 = 0;
1132 ((self.bits >> OFFSET) & MASK as u32) as u8
1133 };
1134 ACONR { bits }
1135 }
1136 #[doc = "Bits 8:13 - Comparator and DAC initialization delay modulus."]
1137 #[inline]
1138 pub fn initmod(&self) -> INITMODR {
1139 INITMODR::_from({
1140 const MASK: u8 = 63;
1141 const OFFSET: u8 = 8;
1142 ((self.bits >> OFFSET) & MASK as u32) as u8
1143 })
1144 }
1145 #[doc = "Bits 14:15 - Number of sample clocks"]
1146 #[inline]
1147 pub fn nsam(&self) -> NSAMR {
1148 NSAMR::_from({
1149 const MASK: u8 = 3;
1150 const OFFSET: u8 = 14;
1151 ((self.bits >> OFFSET) & MASK as u32) as u8
1152 })
1153 }
1154 #[doc = "Bit 16 - Channel 0 input changed flag"]
1155 #[inline]
1156 pub fn ch0f(&self) -> CH0FR {
1157 let bits = {
1158 const MASK: bool = true;
1159 const OFFSET: u8 = 16;
1160 ((self.bits >> OFFSET) & MASK as u32) != 0
1161 };
1162 CH0FR { bits }
1163 }
1164 #[doc = "Bit 17 - Channel 1 input changed flag"]
1165 #[inline]
1166 pub fn ch1f(&self) -> CH1FR {
1167 let bits = {
1168 const MASK: bool = true;
1169 const OFFSET: u8 = 17;
1170 ((self.bits >> OFFSET) & MASK as u32) != 0
1171 };
1172 CH1FR { bits }
1173 }
1174 #[doc = "Bit 18 - Channel 2 input changed flag"]
1175 #[inline]
1176 pub fn ch2f(&self) -> CH2FR {
1177 let bits = {
1178 const MASK: bool = true;
1179 const OFFSET: u8 = 18;
1180 ((self.bits >> OFFSET) & MASK as u32) != 0
1181 };
1182 CH2FR { bits }
1183 }
1184 #[doc = "Bit 19 - Channel 3 input changed flag"]
1185 #[inline]
1186 pub fn ch3f(&self) -> CH3FR {
1187 let bits = {
1188 const MASK: bool = true;
1189 const OFFSET: u8 = 19;
1190 ((self.bits >> OFFSET) & MASK as u32) != 0
1191 };
1192 CH3FR { bits }
1193 }
1194 #[doc = "Bit 20 - Channel 4 input changed flag"]
1195 #[inline]
1196 pub fn ch4f(&self) -> CH4FR {
1197 let bits = {
1198 const MASK: bool = true;
1199 const OFFSET: u8 = 20;
1200 ((self.bits >> OFFSET) & MASK as u32) != 0
1201 };
1202 CH4FR { bits }
1203 }
1204 #[doc = "Bit 21 - Channel 5 input changed flag"]
1205 #[inline]
1206 pub fn ch5f(&self) -> CH5FR {
1207 let bits = {
1208 const MASK: bool = true;
1209 const OFFSET: u8 = 21;
1210 ((self.bits >> OFFSET) & MASK as u32) != 0
1211 };
1212 CH5FR { bits }
1213 }
1214 #[doc = "Bit 22 - Channel 6 input changed flag"]
1215 #[inline]
1216 pub fn ch6f(&self) -> CH6FR {
1217 let bits = {
1218 const MASK: bool = true;
1219 const OFFSET: u8 = 22;
1220 ((self.bits >> OFFSET) & MASK as u32) != 0
1221 };
1222 CH6FR { bits }
1223 }
1224 #[doc = "Bit 23 - Channel 7 input changed flag"]
1225 #[inline]
1226 pub fn ch7f(&self) -> CH7FR {
1227 let bits = {
1228 const MASK: bool = true;
1229 const OFFSET: u8 = 23;
1230 ((self.bits >> OFFSET) & MASK as u32) != 0
1231 };
1232 CH7FR { bits }
1233 }
1234 #[doc = "Bits 25:27 - Fixed channel selection"]
1235 #[inline]
1236 pub fn fxmxch(&self) -> FXMXCHR {
1237 FXMXCHR::_from({
1238 const MASK: u8 = 7;
1239 const OFFSET: u8 = 25;
1240 ((self.bits >> OFFSET) & MASK as u32) as u8
1241 })
1242 }
1243 #[doc = "Bit 29 - Fixed MUX Port"]
1244 #[inline]
1245 pub fn fxmp(&self) -> FXMPR {
1246 FXMPR::_from({
1247 const MASK: bool = true;
1248 const OFFSET: u8 = 29;
1249 ((self.bits >> OFFSET) & MASK as u32) != 0
1250 })
1251 }
1252 #[doc = "Bit 30 - Round-Robin interrupt enable"]
1253 #[inline]
1254 pub fn rrie(&self) -> RRIER {
1255 RRIER::_from({
1256 const MASK: bool = true;
1257 const OFFSET: u8 = 30;
1258 ((self.bits >> OFFSET) & MASK as u32) != 0
1259 })
1260 }
1261 #[doc = "Bit 31 - Round-Robin Enable"]
1262 #[inline]
1263 pub fn rre(&self) -> RRER {
1264 RRER::_from({
1265 const MASK: bool = true;
1266 const OFFSET: u8 = 31;
1267 ((self.bits >> OFFSET) & MASK as u32) != 0
1268 })
1269 }
1270}
1271impl W {
1272 #[doc = r" Reset value of the register"]
1273 #[inline]
1274 pub fn reset_value() -> W {
1275 W { bits: 0 }
1276 }
1277 #[doc = r" Writes raw bits to the register"]
1278 #[inline]
1279 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1280 self.bits = bits;
1281 self
1282 }
1283 #[doc = "Bits 0:7 - The result of the input comparison for channel n"]
1284 #[inline]
1285 pub fn acon(&mut self) -> _ACONW {
1286 _ACONW { w: self }
1287 }
1288 #[doc = "Bits 8:13 - Comparator and DAC initialization delay modulus."]
1289 #[inline]
1290 pub fn initmod(&mut self) -> _INITMODW {
1291 _INITMODW { w: self }
1292 }
1293 #[doc = "Bits 14:15 - Number of sample clocks"]
1294 #[inline]
1295 pub fn nsam(&mut self) -> _NSAMW {
1296 _NSAMW { w: self }
1297 }
1298 #[doc = "Bit 16 - Channel 0 input changed flag"]
1299 #[inline]
1300 pub fn ch0f(&mut self) -> _CH0FW {
1301 _CH0FW { w: self }
1302 }
1303 #[doc = "Bit 17 - Channel 1 input changed flag"]
1304 #[inline]
1305 pub fn ch1f(&mut self) -> _CH1FW {
1306 _CH1FW { w: self }
1307 }
1308 #[doc = "Bit 18 - Channel 2 input changed flag"]
1309 #[inline]
1310 pub fn ch2f(&mut self) -> _CH2FW {
1311 _CH2FW { w: self }
1312 }
1313 #[doc = "Bit 19 - Channel 3 input changed flag"]
1314 #[inline]
1315 pub fn ch3f(&mut self) -> _CH3FW {
1316 _CH3FW { w: self }
1317 }
1318 #[doc = "Bit 20 - Channel 4 input changed flag"]
1319 #[inline]
1320 pub fn ch4f(&mut self) -> _CH4FW {
1321 _CH4FW { w: self }
1322 }
1323 #[doc = "Bit 21 - Channel 5 input changed flag"]
1324 #[inline]
1325 pub fn ch5f(&mut self) -> _CH5FW {
1326 _CH5FW { w: self }
1327 }
1328 #[doc = "Bit 22 - Channel 6 input changed flag"]
1329 #[inline]
1330 pub fn ch6f(&mut self) -> _CH6FW {
1331 _CH6FW { w: self }
1332 }
1333 #[doc = "Bit 23 - Channel 7 input changed flag"]
1334 #[inline]
1335 pub fn ch7f(&mut self) -> _CH7FW {
1336 _CH7FW { w: self }
1337 }
1338 #[doc = "Bits 25:27 - Fixed channel selection"]
1339 #[inline]
1340 pub fn fxmxch(&mut self) -> _FXMXCHW {
1341 _FXMXCHW { w: self }
1342 }
1343 #[doc = "Bit 29 - Fixed MUX Port"]
1344 #[inline]
1345 pub fn fxmp(&mut self) -> _FXMPW {
1346 _FXMPW { w: self }
1347 }
1348 #[doc = "Bit 30 - Round-Robin interrupt enable"]
1349 #[inline]
1350 pub fn rrie(&mut self) -> _RRIEW {
1351 _RRIEW { w: self }
1352 }
1353 #[doc = "Bit 31 - Round-Robin Enable"]
1354 #[inline]
1355 pub fn rre(&mut self) -> _RREW {
1356 _RREW { w: self }
1357 }
1358}