s32k144_pac/portd/
gpclr.rs

1#[doc = "Register `GPCLR` writer"]
2pub struct W(crate::W<GPCLR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<GPCLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<GPCLR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<GPCLR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `GPWD` writer - Global Pin Write Data"]
23pub struct GPWD_W<'a> {
24    w: &'a mut W,
25}
26impl<'a> GPWD_W<'a> {
27    #[doc = r"Writes raw bits to the field"]
28    #[inline(always)]
29    pub unsafe fn bits(self, value: u16) -> &'a mut W {
30        self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff);
31        self.w
32    }
33}
34#[doc = "Global Pin Write Enable\n\nValue on reset: 0"]
35#[derive(Clone, Copy, Debug, PartialEq)]
36#[repr(u16)]
37pub enum GPWE_AW {
38    #[doc = "0: Corresponding Pin Control Register is not updated with the value in GPWD."]
39    _0 = 0,
40    #[doc = "1: Corresponding Pin Control Register is updated with the value in GPWD."]
41    _1 = 1,
42}
43impl From<GPWE_AW> for u16 {
44    #[inline(always)]
45    fn from(variant: GPWE_AW) -> Self {
46        variant as _
47    }
48}
49#[doc = "Field `GPWE` writer - Global Pin Write Enable"]
50pub struct GPWE_W<'a> {
51    w: &'a mut W,
52}
53impl<'a> GPWE_W<'a> {
54    #[doc = r"Writes `variant` to the field"]
55    #[inline(always)]
56    pub fn variant(self, variant: GPWE_AW) -> &'a mut W {
57        unsafe { self.bits(variant.into()) }
58    }
59    #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
60    #[inline(always)]
61    pub fn _0(self) -> &'a mut W {
62        self.variant(GPWE_AW::_0)
63    }
64    #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
65    #[inline(always)]
66    pub fn _1(self) -> &'a mut W {
67        self.variant(GPWE_AW::_1)
68    }
69    #[doc = r"Writes raw bits to the field"]
70    #[inline(always)]
71    pub unsafe fn bits(self, value: u16) -> &'a mut W {
72        self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16);
73        self.w
74    }
75}
76impl W {
77    #[doc = "Bits 0:15 - Global Pin Write Data"]
78    #[inline(always)]
79    pub fn gpwd(&mut self) -> GPWD_W {
80        GPWD_W { w: self }
81    }
82    #[doc = "Bits 16:31 - Global Pin Write Enable"]
83    #[inline(always)]
84    pub fn gpwe(&mut self) -> GPWE_W {
85        GPWE_W { w: self }
86    }
87    #[doc = "Writes raw bits to the register."]
88    #[inline(always)]
89    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
90        self.0.bits(bits);
91        self
92    }
93}
94#[doc = "Global Pin Control Low Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpclr](index.html) module"]
95pub struct GPCLR_SPEC;
96impl crate::RegisterSpec for GPCLR_SPEC {
97    type Ux = u32;
98}
99#[doc = "`write(|w| ..)` method takes [gpclr::W](W) writer structure"]
100impl crate::Writable for GPCLR_SPEC {
101    type Writer = W;
102}
103#[doc = "`reset()` method sets GPCLR to value 0"]
104impl crate::Resettable for GPCLR_SPEC {
105    #[inline(always)]
106    fn reset_value() -> Self::Ux {
107        0
108    }
109}
s32k144_pac/portd/gpclr.rs

s32k144_pac/portd/
gpclr.rs
