s32k142_pac/s32_scb/
fpdscr.rs

1#[doc = "Register `FPDSCR` reader"]
2pub struct R(crate::R<FPDSCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FPDSCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FPDSCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FPDSCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FPDSCR` writer"]
17pub struct W(crate::W<FPDSCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FPDSCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FPDSCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FPDSCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Default value for FPSCR.RMode (Rounding Mode control field).\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum RMODE_A {
41    #[doc = "0: Round to Nearest (RN) mode"]
42    _00 = 0,
43    #[doc = "1: Round towards Plus Infinity (RP) mode."]
44    _01 = 1,
45    #[doc = "2: Round towards Minus Infinity (RM) mode."]
46    _10 = 2,
47    #[doc = "3: Round towards Zero (RZ) mode."]
48    _11 = 3,
49}
50impl From<RMODE_A> for u8 {
51    #[inline(always)]
52    fn from(variant: RMODE_A) -> Self {
53        variant as _
54    }
55}
56#[doc = "Field `RMode` reader - Default value for FPSCR.RMode (Rounding Mode control field)."]
57pub struct RMODE_R(crate::FieldReader<u8, RMODE_A>);
58impl RMODE_R {
59    #[inline(always)]
60    pub(crate) fn new(bits: u8) -> Self {
61        RMODE_R(crate::FieldReader::new(bits))
62    }
63    #[doc = r"Get enumerated values variant"]
64    #[inline(always)]
65    pub fn variant(&self) -> RMODE_A {
66        match self.bits {
67            0 => RMODE_A::_00,
68            1 => RMODE_A::_01,
69            2 => RMODE_A::_10,
70            3 => RMODE_A::_11,
71            _ => unreachable!(),
72        }
73    }
74    #[doc = "Checks if the value of the field is `_00`"]
75    #[inline(always)]
76    pub fn is_00(&self) -> bool {
77        **self == RMODE_A::_00
78    }
79    #[doc = "Checks if the value of the field is `_01`"]
80    #[inline(always)]
81    pub fn is_01(&self) -> bool {
82        **self == RMODE_A::_01
83    }
84    #[doc = "Checks if the value of the field is `_10`"]
85    #[inline(always)]
86    pub fn is_10(&self) -> bool {
87        **self == RMODE_A::_10
88    }
89    #[doc = "Checks if the value of the field is `_11`"]
90    #[inline(always)]
91    pub fn is_11(&self) -> bool {
92        **self == RMODE_A::_11
93    }
94}
95impl core::ops::Deref for RMODE_R {
96    type Target = crate::FieldReader<u8, RMODE_A>;
97    #[inline(always)]
98    fn deref(&self) -> &Self::Target {
99        &self.0
100    }
101}
102#[doc = "Field `RMode` writer - Default value for FPSCR.RMode (Rounding Mode control field)."]
103pub struct RMODE_W<'a> {
104    w: &'a mut W,
105}
106impl<'a> RMODE_W<'a> {
107    #[doc = r"Writes `variant` to the field"]
108    #[inline(always)]
109    pub fn variant(self, variant: RMODE_A) -> &'a mut W {
110        self.bits(variant.into())
111    }
112    #[doc = "Round to Nearest (RN) mode"]
113    #[inline(always)]
114    pub fn _00(self) -> &'a mut W {
115        self.variant(RMODE_A::_00)
116    }
117    #[doc = "Round towards Plus Infinity (RP) mode."]
118    #[inline(always)]
119    pub fn _01(self) -> &'a mut W {
120        self.variant(RMODE_A::_01)
121    }
122    #[doc = "Round towards Minus Infinity (RM) mode."]
123    #[inline(always)]
124    pub fn _10(self) -> &'a mut W {
125        self.variant(RMODE_A::_10)
126    }
127    #[doc = "Round towards Zero (RZ) mode."]
128    #[inline(always)]
129    pub fn _11(self) -> &'a mut W {
130        self.variant(RMODE_A::_11)
131    }
132    #[doc = r"Writes raw bits to the field"]
133    #[inline(always)]
134    pub fn bits(self, value: u8) -> &'a mut W {
135        self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22);
136        self.w
137    }
138}
139#[doc = "Default value for FPSCR.FZ (Flush-to-zero mode control bit).\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum FZ_A {
142    #[doc = "0: Flush-to-zero mode disabled. Behavior of the floating-point system is fully compliant with the IEEE 754 standard."]
143    _0 = 0,
144    #[doc = "1: Flush-to-zero mode enabled."]
145    _1 = 1,
146}
147impl From<FZ_A> for bool {
148    #[inline(always)]
149    fn from(variant: FZ_A) -> Self {
150        variant as u8 != 0
151    }
152}
153#[doc = "Field `FZ` reader - Default value for FPSCR.FZ (Flush-to-zero mode control bit)."]
154pub struct FZ_R(crate::FieldReader<bool, FZ_A>);
155impl FZ_R {
156    #[inline(always)]
157    pub(crate) fn new(bits: bool) -> Self {
158        FZ_R(crate::FieldReader::new(bits))
159    }
160    #[doc = r"Get enumerated values variant"]
161    #[inline(always)]
162    pub fn variant(&self) -> FZ_A {
163        match self.bits {
164            false => FZ_A::_0,
165            true => FZ_A::_1,
166        }
167    }
168    #[doc = "Checks if the value of the field is `_0`"]
169    #[inline(always)]
170    pub fn is_0(&self) -> bool {
171        **self == FZ_A::_0
172    }
173    #[doc = "Checks if the value of the field is `_1`"]
174    #[inline(always)]
175    pub fn is_1(&self) -> bool {
176        **self == FZ_A::_1
177    }
178}
179impl core::ops::Deref for FZ_R {
180    type Target = crate::FieldReader<bool, FZ_A>;
181    #[inline(always)]
182    fn deref(&self) -> &Self::Target {
183        &self.0
184    }
185}
186#[doc = "Field `FZ` writer - Default value for FPSCR.FZ (Flush-to-zero mode control bit)."]
187pub struct FZ_W<'a> {
188    w: &'a mut W,
189}
190impl<'a> FZ_W<'a> {
191    #[doc = r"Writes `variant` to the field"]
192    #[inline(always)]
193    pub fn variant(self, variant: FZ_A) -> &'a mut W {
194        self.bit(variant.into())
195    }
196    #[doc = "Flush-to-zero mode disabled. Behavior of the floating-point system is fully compliant with the IEEE 754 standard."]
197    #[inline(always)]
198    pub fn _0(self) -> &'a mut W {
199        self.variant(FZ_A::_0)
200    }
201    #[doc = "Flush-to-zero mode enabled."]
202    #[inline(always)]
203    pub fn _1(self) -> &'a mut W {
204        self.variant(FZ_A::_1)
205    }
206    #[doc = r"Sets the field bit"]
207    #[inline(always)]
208    pub fn set_bit(self) -> &'a mut W {
209        self.bit(true)
210    }
211    #[doc = r"Clears the field bit"]
212    #[inline(always)]
213    pub fn clear_bit(self) -> &'a mut W {
214        self.bit(false)
215    }
216    #[doc = r"Writes raw bits to the field"]
217    #[inline(always)]
218    pub fn bit(self, value: bool) -> &'a mut W {
219        self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
220        self.w
221    }
222}
223#[doc = "Default value for FPSCR.DN (Default NaN mode control bit).\n\nValue on reset: 0"]
224#[derive(Clone, Copy, Debug, PartialEq)]
225pub enum DN_A {
226    #[doc = "0: NaN operands propagate through to the output of a floating-point operation."]
227    _0 = 0,
228    #[doc = "1: Any operation involving one or more NaNs returns the Default NaN."]
229    _1 = 1,
230}
231impl From<DN_A> for bool {
232    #[inline(always)]
233    fn from(variant: DN_A) -> Self {
234        variant as u8 != 0
235    }
236}
237#[doc = "Field `DN` reader - Default value for FPSCR.DN (Default NaN mode control bit)."]
238pub struct DN_R(crate::FieldReader<bool, DN_A>);
239impl DN_R {
240    #[inline(always)]
241    pub(crate) fn new(bits: bool) -> Self {
242        DN_R(crate::FieldReader::new(bits))
243    }
244    #[doc = r"Get enumerated values variant"]
245    #[inline(always)]
246    pub fn variant(&self) -> DN_A {
247        match self.bits {
248            false => DN_A::_0,
249            true => DN_A::_1,
250        }
251    }
252    #[doc = "Checks if the value of the field is `_0`"]
253    #[inline(always)]
254    pub fn is_0(&self) -> bool {
255        **self == DN_A::_0
256    }
257    #[doc = "Checks if the value of the field is `_1`"]
258    #[inline(always)]
259    pub fn is_1(&self) -> bool {
260        **self == DN_A::_1
261    }
262}
263impl core::ops::Deref for DN_R {
264    type Target = crate::FieldReader<bool, DN_A>;
265    #[inline(always)]
266    fn deref(&self) -> &Self::Target {
267        &self.0
268    }
269}
270#[doc = "Field `DN` writer - Default value for FPSCR.DN (Default NaN mode control bit)."]
271pub struct DN_W<'a> {
272    w: &'a mut W,
273}
274impl<'a> DN_W<'a> {
275    #[doc = r"Writes `variant` to the field"]
276    #[inline(always)]
277    pub fn variant(self, variant: DN_A) -> &'a mut W {
278        self.bit(variant.into())
279    }
280    #[doc = "NaN operands propagate through to the output of a floating-point operation."]
281    #[inline(always)]
282    pub fn _0(self) -> &'a mut W {
283        self.variant(DN_A::_0)
284    }
285    #[doc = "Any operation involving one or more NaNs returns the Default NaN."]
286    #[inline(always)]
287    pub fn _1(self) -> &'a mut W {
288        self.variant(DN_A::_1)
289    }
290    #[doc = r"Sets the field bit"]
291    #[inline(always)]
292    pub fn set_bit(self) -> &'a mut W {
293        self.bit(true)
294    }
295    #[doc = r"Clears the field bit"]
296    #[inline(always)]
297    pub fn clear_bit(self) -> &'a mut W {
298        self.bit(false)
299    }
300    #[doc = r"Writes raw bits to the field"]
301    #[inline(always)]
302    pub fn bit(self, value: bool) -> &'a mut W {
303        self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
304        self.w
305    }
306}
307#[doc = "Default value for FPSCR.AHP (Alternative half-precision control bit).\n\nValue on reset: 0"]
308#[derive(Clone, Copy, Debug, PartialEq)]
309pub enum AHP_A {
310    #[doc = "0: IEEE half-precision format selected."]
311    _0 = 0,
312    #[doc = "1: Alternative half-precision format selected."]
313    _1 = 1,
314}
315impl From<AHP_A> for bool {
316    #[inline(always)]
317    fn from(variant: AHP_A) -> Self {
318        variant as u8 != 0
319    }
320}
321#[doc = "Field `AHP` reader - Default value for FPSCR.AHP (Alternative half-precision control bit)."]
322pub struct AHP_R(crate::FieldReader<bool, AHP_A>);
323impl AHP_R {
324    #[inline(always)]
325    pub(crate) fn new(bits: bool) -> Self {
326        AHP_R(crate::FieldReader::new(bits))
327    }
328    #[doc = r"Get enumerated values variant"]
329    #[inline(always)]
330    pub fn variant(&self) -> AHP_A {
331        match self.bits {
332            false => AHP_A::_0,
333            true => AHP_A::_1,
334        }
335    }
336    #[doc = "Checks if the value of the field is `_0`"]
337    #[inline(always)]
338    pub fn is_0(&self) -> bool {
339        **self == AHP_A::_0
340    }
341    #[doc = "Checks if the value of the field is `_1`"]
342    #[inline(always)]
343    pub fn is_1(&self) -> bool {
344        **self == AHP_A::_1
345    }
346}
347impl core::ops::Deref for AHP_R {
348    type Target = crate::FieldReader<bool, AHP_A>;
349    #[inline(always)]
350    fn deref(&self) -> &Self::Target {
351        &self.0
352    }
353}
354#[doc = "Field `AHP` writer - Default value for FPSCR.AHP (Alternative half-precision control bit)."]
355pub struct AHP_W<'a> {
356    w: &'a mut W,
357}
358impl<'a> AHP_W<'a> {
359    #[doc = r"Writes `variant` to the field"]
360    #[inline(always)]
361    pub fn variant(self, variant: AHP_A) -> &'a mut W {
362        self.bit(variant.into())
363    }
364    #[doc = "IEEE half-precision format selected."]
365    #[inline(always)]
366    pub fn _0(self) -> &'a mut W {
367        self.variant(AHP_A::_0)
368    }
369    #[doc = "Alternative half-precision format selected."]
370    #[inline(always)]
371    pub fn _1(self) -> &'a mut W {
372        self.variant(AHP_A::_1)
373    }
374    #[doc = r"Sets the field bit"]
375    #[inline(always)]
376    pub fn set_bit(self) -> &'a mut W {
377        self.bit(true)
378    }
379    #[doc = r"Clears the field bit"]
380    #[inline(always)]
381    pub fn clear_bit(self) -> &'a mut W {
382        self.bit(false)
383    }
384    #[doc = r"Writes raw bits to the field"]
385    #[inline(always)]
386    pub fn bit(self, value: bool) -> &'a mut W {
387        self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
388        self.w
389    }
390}
391impl R {
392    #[doc = "Bits 22:23 - Default value for FPSCR.RMode (Rounding Mode control field)."]
393    #[inline(always)]
394    pub fn rmode(&self) -> RMODE_R {
395        RMODE_R::new(((self.bits >> 22) & 0x03) as u8)
396    }
397    #[doc = "Bit 24 - Default value for FPSCR.FZ (Flush-to-zero mode control bit)."]
398    #[inline(always)]
399    pub fn fz(&self) -> FZ_R {
400        FZ_R::new(((self.bits >> 24) & 0x01) != 0)
401    }
402    #[doc = "Bit 25 - Default value for FPSCR.DN (Default NaN mode control bit)."]
403    #[inline(always)]
404    pub fn dn(&self) -> DN_R {
405        DN_R::new(((self.bits >> 25) & 0x01) != 0)
406    }
407    #[doc = "Bit 26 - Default value for FPSCR.AHP (Alternative half-precision control bit)."]
408    #[inline(always)]
409    pub fn ahp(&self) -> AHP_R {
410        AHP_R::new(((self.bits >> 26) & 0x01) != 0)
411    }
412}
413impl W {
414    #[doc = "Bits 22:23 - Default value for FPSCR.RMode (Rounding Mode control field)."]
415    #[inline(always)]
416    pub fn rmode(&mut self) -> RMODE_W {
417        RMODE_W { w: self }
418    }
419    #[doc = "Bit 24 - Default value for FPSCR.FZ (Flush-to-zero mode control bit)."]
420    #[inline(always)]
421    pub fn fz(&mut self) -> FZ_W {
422        FZ_W { w: self }
423    }
424    #[doc = "Bit 25 - Default value for FPSCR.DN (Default NaN mode control bit)."]
425    #[inline(always)]
426    pub fn dn(&mut self) -> DN_W {
427        DN_W { w: self }
428    }
429    #[doc = "Bit 26 - Default value for FPSCR.AHP (Alternative half-precision control bit)."]
430    #[inline(always)]
431    pub fn ahp(&mut self) -> AHP_W {
432        AHP_W { w: self }
433    }
434    #[doc = "Writes raw bits to the register."]
435    #[inline(always)]
436    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
437        self.0.bits(bits);
438        self
439    }
440}
441#[doc = "Floating-point Default Status Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fpdscr](index.html) module"]
442pub struct FPDSCR_SPEC;
443impl crate::RegisterSpec for FPDSCR_SPEC {
444    type Ux = u32;
445}
446#[doc = "`read()` method returns [fpdscr::R](R) reader structure"]
447impl crate::Readable for FPDSCR_SPEC {
448    type Reader = R;
449}
450#[doc = "`write(|w| ..)` method takes [fpdscr::W](W) writer structure"]
451impl crate::Writable for FPDSCR_SPEC {
452    type Writer = W;
453}
454#[doc = "`reset()` method sets FPDSCR to value 0"]
455impl crate::Resettable for FPDSCR_SPEC {
456    #[inline(always)]
457    fn reset_value() -> Self::Ux {
458        0
459    }
460}
s32k142_pac/s32_scb/fpdscr.rs

s32k142_pac/s32_scb/
fpdscr.rs
