s32k118_pac/ftfc/
ferstat.rs

1#[doc = "Register `FERSTAT` reader"]
2pub struct R(crate::R<FERSTAT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FERSTAT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FERSTAT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FERSTAT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FERSTAT` writer"]
17pub struct W(crate::W<FERSTAT_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FERSTAT_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FERSTAT_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FERSTAT_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Double Bit Fault Detect Interrupt Flag\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum DFDIF_A {
40    #[doc = "0: Double bit fault not detected during a valid flash read access from the platform flash controller"]
41    _0 = 0,
42    #[doc = "1: Double bit fault detected (or FERCNFG\\[FDFD\\]
43is set) during a valid flash read access from the platform flash controller"]
44    _1 = 1,
45}
46impl From<DFDIF_A> for bool {
47    #[inline(always)]
48    fn from(variant: DFDIF_A) -> Self {
49        variant as u8 != 0
50    }
51}
52#[doc = "Field `DFDIF` reader - Double Bit Fault Detect Interrupt Flag"]
53pub struct DFDIF_R(crate::FieldReader<bool, DFDIF_A>);
54impl DFDIF_R {
55    #[inline(always)]
56    pub(crate) fn new(bits: bool) -> Self {
57        DFDIF_R(crate::FieldReader::new(bits))
58    }
59    #[doc = r"Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> DFDIF_A {
62        match self.bits {
63            false => DFDIF_A::_0,
64            true => DFDIF_A::_1,
65        }
66    }
67    #[doc = "Checks if the value of the field is `_0`"]
68    #[inline(always)]
69    pub fn is_0(&self) -> bool {
70        **self == DFDIF_A::_0
71    }
72    #[doc = "Checks if the value of the field is `_1`"]
73    #[inline(always)]
74    pub fn is_1(&self) -> bool {
75        **self == DFDIF_A::_1
76    }
77}
78impl core::ops::Deref for DFDIF_R {
79    type Target = crate::FieldReader<bool, DFDIF_A>;
80    #[inline(always)]
81    fn deref(&self) -> &Self::Target {
82        &self.0
83    }
84}
85#[doc = "Field `DFDIF` writer - Double Bit Fault Detect Interrupt Flag"]
86pub struct DFDIF_W<'a> {
87    w: &'a mut W,
88}
89impl<'a> DFDIF_W<'a> {
90    #[doc = r"Writes `variant` to the field"]
91    #[inline(always)]
92    pub fn variant(self, variant: DFDIF_A) -> &'a mut W {
93        self.bit(variant.into())
94    }
95    #[doc = "Double bit fault not detected during a valid flash read access from the platform flash controller"]
96    #[inline(always)]
97    pub fn _0(self) -> &'a mut W {
98        self.variant(DFDIF_A::_0)
99    }
100    #[doc = "Double bit fault detected (or FERCNFG\\[FDFD\\]
101is set) during a valid flash read access from the platform flash controller"]
102    #[inline(always)]
103    pub fn _1(self) -> &'a mut W {
104        self.variant(DFDIF_A::_1)
105    }
106    #[doc = r"Sets the field bit"]
107    #[inline(always)]
108    pub fn set_bit(self) -> &'a mut W {
109        self.bit(true)
110    }
111    #[doc = r"Clears the field bit"]
112    #[inline(always)]
113    pub fn clear_bit(self) -> &'a mut W {
114        self.bit(false)
115    }
116    #[doc = r"Writes raw bits to the field"]
117    #[inline(always)]
118    pub fn bit(self, value: bool) -> &'a mut W {
119        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
120        self.w
121    }
122}
123impl R {
124    #[doc = "Bit 1 - Double Bit Fault Detect Interrupt Flag"]
125    #[inline(always)]
126    pub fn dfdif(&self) -> DFDIF_R {
127        DFDIF_R::new(((self.bits >> 1) & 0x01) != 0)
128    }
129}
130impl W {
131    #[doc = "Bit 1 - Double Bit Fault Detect Interrupt Flag"]
132    #[inline(always)]
133    pub fn dfdif(&mut self) -> DFDIF_W {
134        DFDIF_W { w: self }
135    }
136    #[doc = "Writes raw bits to the register."]
137    #[inline(always)]
138    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
139        self.0.bits(bits);
140        self
141    }
142}
143#[doc = "Flash Error Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ferstat](index.html) module"]
144pub struct FERSTAT_SPEC;
145impl crate::RegisterSpec for FERSTAT_SPEC {
146    type Ux = u8;
147}
148#[doc = "`read()` method returns [ferstat::R](R) reader structure"]
149impl crate::Readable for FERSTAT_SPEC {
150    type Reader = R;
151}
152#[doc = "`write(|w| ..)` method takes [ferstat::W](W) writer structure"]
153impl crate::Writable for FERSTAT_SPEC {
154    type Writer = W;
155}
156#[doc = "`reset()` method sets FERSTAT to value 0"]
157impl crate::Resettable for FERSTAT_SPEC {
158    #[inline(always)]
159    fn reset_value() -> Self::Ux {
160        0
161    }
162}
s32k118_pac/ftfc/ferstat.rs

s32k118_pac/ftfc/
ferstat.rs
