1#[doc = "Register `SC3` reader"]
2pub struct R(crate::R<SC3_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SC3_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SC3_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SC3_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SC3` writer"]
17pub struct W(crate::W<SC3_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SC3_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SC3_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SC3_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Hardware Average Select\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum AVGS_A {
41 #[doc = "0: 4 samples averaged."]
42 _00 = 0,
43 #[doc = "1: 8 samples averaged."]
44 _01 = 1,
45 #[doc = "2: 16 samples averaged."]
46 _10 = 2,
47 #[doc = "3: 32 samples averaged."]
48 _11 = 3,
49}
50impl From<AVGS_A> for u8 {
51 #[inline(always)]
52 fn from(variant: AVGS_A) -> Self {
53 variant as _
54 }
55}
56#[doc = "Field `AVGS` reader - Hardware Average Select"]
57pub struct AVGS_R(crate::FieldReader<u8, AVGS_A>);
58impl AVGS_R {
59 #[inline(always)]
60 pub(crate) fn new(bits: u8) -> Self {
61 AVGS_R(crate::FieldReader::new(bits))
62 }
63 #[doc = r"Get enumerated values variant"]
64 #[inline(always)]
65 pub fn variant(&self) -> AVGS_A {
66 match self.bits {
67 0 => AVGS_A::_00,
68 1 => AVGS_A::_01,
69 2 => AVGS_A::_10,
70 3 => AVGS_A::_11,
71 _ => unreachable!(),
72 }
73 }
74 #[doc = "Checks if the value of the field is `_00`"]
75 #[inline(always)]
76 pub fn is_00(&self) -> bool {
77 **self == AVGS_A::_00
78 }
79 #[doc = "Checks if the value of the field is `_01`"]
80 #[inline(always)]
81 pub fn is_01(&self) -> bool {
82 **self == AVGS_A::_01
83 }
84 #[doc = "Checks if the value of the field is `_10`"]
85 #[inline(always)]
86 pub fn is_10(&self) -> bool {
87 **self == AVGS_A::_10
88 }
89 #[doc = "Checks if the value of the field is `_11`"]
90 #[inline(always)]
91 pub fn is_11(&self) -> bool {
92 **self == AVGS_A::_11
93 }
94}
95impl core::ops::Deref for AVGS_R {
96 type Target = crate::FieldReader<u8, AVGS_A>;
97 #[inline(always)]
98 fn deref(&self) -> &Self::Target {
99 &self.0
100 }
101}
102#[doc = "Field `AVGS` writer - Hardware Average Select"]
103pub struct AVGS_W<'a> {
104 w: &'a mut W,
105}
106impl<'a> AVGS_W<'a> {
107 #[doc = r"Writes `variant` to the field"]
108 #[inline(always)]
109 pub fn variant(self, variant: AVGS_A) -> &'a mut W {
110 self.bits(variant.into())
111 }
112 #[doc = "4 samples averaged."]
113 #[inline(always)]
114 pub fn _00(self) -> &'a mut W {
115 self.variant(AVGS_A::_00)
116 }
117 #[doc = "8 samples averaged."]
118 #[inline(always)]
119 pub fn _01(self) -> &'a mut W {
120 self.variant(AVGS_A::_01)
121 }
122 #[doc = "16 samples averaged."]
123 #[inline(always)]
124 pub fn _10(self) -> &'a mut W {
125 self.variant(AVGS_A::_10)
126 }
127 #[doc = "32 samples averaged."]
128 #[inline(always)]
129 pub fn _11(self) -> &'a mut W {
130 self.variant(AVGS_A::_11)
131 }
132 #[doc = r"Writes raw bits to the field"]
133 #[inline(always)]
134 pub fn bits(self, value: u8) -> &'a mut W {
135 self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
136 self.w
137 }
138}
139#[doc = "Hardware Average Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum AVGE_A {
142 #[doc = "0: Hardware average function disabled."]
143 _0 = 0,
144 #[doc = "1: Hardware average function enabled."]
145 _1 = 1,
146}
147impl From<AVGE_A> for bool {
148 #[inline(always)]
149 fn from(variant: AVGE_A) -> Self {
150 variant as u8 != 0
151 }
152}
153#[doc = "Field `AVGE` reader - Hardware Average Enable"]
154pub struct AVGE_R(crate::FieldReader<bool, AVGE_A>);
155impl AVGE_R {
156 #[inline(always)]
157 pub(crate) fn new(bits: bool) -> Self {
158 AVGE_R(crate::FieldReader::new(bits))
159 }
160 #[doc = r"Get enumerated values variant"]
161 #[inline(always)]
162 pub fn variant(&self) -> AVGE_A {
163 match self.bits {
164 false => AVGE_A::_0,
165 true => AVGE_A::_1,
166 }
167 }
168 #[doc = "Checks if the value of the field is `_0`"]
169 #[inline(always)]
170 pub fn is_0(&self) -> bool {
171 **self == AVGE_A::_0
172 }
173 #[doc = "Checks if the value of the field is `_1`"]
174 #[inline(always)]
175 pub fn is_1(&self) -> bool {
176 **self == AVGE_A::_1
177 }
178}
179impl core::ops::Deref for AVGE_R {
180 type Target = crate::FieldReader<bool, AVGE_A>;
181 #[inline(always)]
182 fn deref(&self) -> &Self::Target {
183 &self.0
184 }
185}
186#[doc = "Field `AVGE` writer - Hardware Average Enable"]
187pub struct AVGE_W<'a> {
188 w: &'a mut W,
189}
190impl<'a> AVGE_W<'a> {
191 #[doc = r"Writes `variant` to the field"]
192 #[inline(always)]
193 pub fn variant(self, variant: AVGE_A) -> &'a mut W {
194 self.bit(variant.into())
195 }
196 #[doc = "Hardware average function disabled."]
197 #[inline(always)]
198 pub fn _0(self) -> &'a mut W {
199 self.variant(AVGE_A::_0)
200 }
201 #[doc = "Hardware average function enabled."]
202 #[inline(always)]
203 pub fn _1(self) -> &'a mut W {
204 self.variant(AVGE_A::_1)
205 }
206 #[doc = r"Sets the field bit"]
207 #[inline(always)]
208 pub fn set_bit(self) -> &'a mut W {
209 self.bit(true)
210 }
211 #[doc = r"Clears the field bit"]
212 #[inline(always)]
213 pub fn clear_bit(self) -> &'a mut W {
214 self.bit(false)
215 }
216 #[doc = r"Writes raw bits to the field"]
217 #[inline(always)]
218 pub fn bit(self, value: bool) -> &'a mut W {
219 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
220 self.w
221 }
222}
223#[doc = "Continuous Conversion Enable\n\nValue on reset: 0"]
224#[derive(Clone, Copy, Debug, PartialEq)]
225pub enum ADCO_A {
226 #[doc = "0: One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
227 _0 = 0,
228 #[doc = "1: Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
229 _1 = 1,
230}
231impl From<ADCO_A> for bool {
232 #[inline(always)]
233 fn from(variant: ADCO_A) -> Self {
234 variant as u8 != 0
235 }
236}
237#[doc = "Field `ADCO` reader - Continuous Conversion Enable"]
238pub struct ADCO_R(crate::FieldReader<bool, ADCO_A>);
239impl ADCO_R {
240 #[inline(always)]
241 pub(crate) fn new(bits: bool) -> Self {
242 ADCO_R(crate::FieldReader::new(bits))
243 }
244 #[doc = r"Get enumerated values variant"]
245 #[inline(always)]
246 pub fn variant(&self) -> ADCO_A {
247 match self.bits {
248 false => ADCO_A::_0,
249 true => ADCO_A::_1,
250 }
251 }
252 #[doc = "Checks if the value of the field is `_0`"]
253 #[inline(always)]
254 pub fn is_0(&self) -> bool {
255 **self == ADCO_A::_0
256 }
257 #[doc = "Checks if the value of the field is `_1`"]
258 #[inline(always)]
259 pub fn is_1(&self) -> bool {
260 **self == ADCO_A::_1
261 }
262}
263impl core::ops::Deref for ADCO_R {
264 type Target = crate::FieldReader<bool, ADCO_A>;
265 #[inline(always)]
266 fn deref(&self) -> &Self::Target {
267 &self.0
268 }
269}
270#[doc = "Field `ADCO` writer - Continuous Conversion Enable"]
271pub struct ADCO_W<'a> {
272 w: &'a mut W,
273}
274impl<'a> ADCO_W<'a> {
275 #[doc = r"Writes `variant` to the field"]
276 #[inline(always)]
277 pub fn variant(self, variant: ADCO_A) -> &'a mut W {
278 self.bit(variant.into())
279 }
280 #[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
281 #[inline(always)]
282 pub fn _0(self) -> &'a mut W {
283 self.variant(ADCO_A::_0)
284 }
285 #[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
286 #[inline(always)]
287 pub fn _1(self) -> &'a mut W {
288 self.variant(ADCO_A::_1)
289 }
290 #[doc = r"Sets the field bit"]
291 #[inline(always)]
292 pub fn set_bit(self) -> &'a mut W {
293 self.bit(true)
294 }
295 #[doc = r"Clears the field bit"]
296 #[inline(always)]
297 pub fn clear_bit(self) -> &'a mut W {
298 self.bit(false)
299 }
300 #[doc = r"Writes raw bits to the field"]
301 #[inline(always)]
302 pub fn bit(self, value: bool) -> &'a mut W {
303 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
304 self.w
305 }
306}
307#[doc = "Field `CAL` reader - Calibration"]
308pub struct CAL_R(crate::FieldReader<bool, bool>);
309impl CAL_R {
310 #[inline(always)]
311 pub(crate) fn new(bits: bool) -> Self {
312 CAL_R(crate::FieldReader::new(bits))
313 }
314}
315impl core::ops::Deref for CAL_R {
316 type Target = crate::FieldReader<bool, bool>;
317 #[inline(always)]
318 fn deref(&self) -> &Self::Target {
319 &self.0
320 }
321}
322#[doc = "Field `CAL` writer - Calibration"]
323pub struct CAL_W<'a> {
324 w: &'a mut W,
325}
326impl<'a> CAL_W<'a> {
327 #[doc = r"Sets the field bit"]
328 #[inline(always)]
329 pub fn set_bit(self) -> &'a mut W {
330 self.bit(true)
331 }
332 #[doc = r"Clears the field bit"]
333 #[inline(always)]
334 pub fn clear_bit(self) -> &'a mut W {
335 self.bit(false)
336 }
337 #[doc = r"Writes raw bits to the field"]
338 #[inline(always)]
339 pub fn bit(self, value: bool) -> &'a mut W {
340 self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
341 self.w
342 }
343}
344impl R {
345 #[doc = "Bits 0:1 - Hardware Average Select"]
346 #[inline(always)]
347 pub fn avgs(&self) -> AVGS_R {
348 AVGS_R::new((self.bits & 0x03) as u8)
349 }
350 #[doc = "Bit 2 - Hardware Average Enable"]
351 #[inline(always)]
352 pub fn avge(&self) -> AVGE_R {
353 AVGE_R::new(((self.bits >> 2) & 0x01) != 0)
354 }
355 #[doc = "Bit 3 - Continuous Conversion Enable"]
356 #[inline(always)]
357 pub fn adco(&self) -> ADCO_R {
358 ADCO_R::new(((self.bits >> 3) & 0x01) != 0)
359 }
360 #[doc = "Bit 7 - Calibration"]
361 #[inline(always)]
362 pub fn cal(&self) -> CAL_R {
363 CAL_R::new(((self.bits >> 7) & 0x01) != 0)
364 }
365}
366impl W {
367 #[doc = "Bits 0:1 - Hardware Average Select"]
368 #[inline(always)]
369 pub fn avgs(&mut self) -> AVGS_W {
370 AVGS_W { w: self }
371 }
372 #[doc = "Bit 2 - Hardware Average Enable"]
373 #[inline(always)]
374 pub fn avge(&mut self) -> AVGE_W {
375 AVGE_W { w: self }
376 }
377 #[doc = "Bit 3 - Continuous Conversion Enable"]
378 #[inline(always)]
379 pub fn adco(&mut self) -> ADCO_W {
380 ADCO_W { w: self }
381 }
382 #[doc = "Bit 7 - Calibration"]
383 #[inline(always)]
384 pub fn cal(&mut self) -> CAL_W {
385 CAL_W { w: self }
386 }
387 #[doc = "Writes raw bits to the register."]
388 #[inline(always)]
389 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
390 self.0.bits(bits);
391 self
392 }
393}
394#[doc = "Status and Control Register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sc3](index.html) module"]
395pub struct SC3_SPEC;
396impl crate::RegisterSpec for SC3_SPEC {
397 type Ux = u32;
398}
399#[doc = "`read()` method returns [sc3::R](R) reader structure"]
400impl crate::Readable for SC3_SPEC {
401 type Reader = R;
402}
403#[doc = "`write(|w| ..)` method takes [sc3::W](W) writer structure"]
404impl crate::Writable for SC3_SPEC {
405 type Writer = W;
406}
407#[doc = "`reset()` method sets SC3 to value 0"]
408impl crate::Resettable for SC3_SPEC {
409 #[inline(always)]
410 fn reset_value() -> Self::Ux {
411 0
412 }
413}