1#[doc = "Register `C2SC` reader"]
2pub struct R(crate::R<C2SC_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<C2SC_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<C2SC_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<C2SC_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `C2SC` writer"]
17pub struct W(crate::W<C2SC_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<C2SC_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<C2SC_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<C2SC_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "DMA Enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum DMA_A {
40 #[doc = "0: Disable DMA transfers."]
41 _0 = 0,
42 #[doc = "1: Enable DMA transfers."]
43 _1 = 1,
44}
45impl From<DMA_A> for bool {
46 #[inline(always)]
47 fn from(variant: DMA_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `DMA` reader - DMA Enable"]
52pub struct DMA_R(crate::FieldReader<bool, DMA_A>);
53impl DMA_R {
54 #[inline(always)]
55 pub(crate) fn new(bits: bool) -> Self {
56 DMA_R(crate::FieldReader::new(bits))
57 }
58 #[doc = r"Get enumerated values variant"]
59 #[inline(always)]
60 pub fn variant(&self) -> DMA_A {
61 match self.bits {
62 false => DMA_A::_0,
63 true => DMA_A::_1,
64 }
65 }
66 #[doc = "Checks if the value of the field is `_0`"]
67 #[inline(always)]
68 pub fn is_0(&self) -> bool {
69 **self == DMA_A::_0
70 }
71 #[doc = "Checks if the value of the field is `_1`"]
72 #[inline(always)]
73 pub fn is_1(&self) -> bool {
74 **self == DMA_A::_1
75 }
76}
77impl core::ops::Deref for DMA_R {
78 type Target = crate::FieldReader<bool, DMA_A>;
79 #[inline(always)]
80 fn deref(&self) -> &Self::Target {
81 &self.0
82 }
83}
84#[doc = "Field `DMA` writer - DMA Enable"]
85pub struct DMA_W<'a> {
86 w: &'a mut W,
87}
88impl<'a> DMA_W<'a> {
89 #[doc = r"Writes `variant` to the field"]
90 #[inline(always)]
91 pub fn variant(self, variant: DMA_A) -> &'a mut W {
92 self.bit(variant.into())
93 }
94 #[doc = "Disable DMA transfers."]
95 #[inline(always)]
96 pub fn _0(self) -> &'a mut W {
97 self.variant(DMA_A::_0)
98 }
99 #[doc = "Enable DMA transfers."]
100 #[inline(always)]
101 pub fn _1(self) -> &'a mut W {
102 self.variant(DMA_A::_1)
103 }
104 #[doc = r"Sets the field bit"]
105 #[inline(always)]
106 pub fn set_bit(self) -> &'a mut W {
107 self.bit(true)
108 }
109 #[doc = r"Clears the field bit"]
110 #[inline(always)]
111 pub fn clear_bit(self) -> &'a mut W {
112 self.bit(false)
113 }
114 #[doc = r"Writes raw bits to the field"]
115 #[inline(always)]
116 pub fn bit(self, value: bool) -> &'a mut W {
117 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
118 self.w
119 }
120}
121#[doc = "FTM counter reset by the selected input capture event.\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum ICRST_A {
124 #[doc = "0: FTM counter is not reset when the selected channel (n) input event is detected."]
125 _0 = 0,
126 #[doc = "1: FTM counter is reset when the selected channel (n) input event is detected."]
127 _1 = 1,
128}
129impl From<ICRST_A> for bool {
130 #[inline(always)]
131 fn from(variant: ICRST_A) -> Self {
132 variant as u8 != 0
133 }
134}
135#[doc = "Field `ICRST` reader - FTM counter reset by the selected input capture event."]
136pub struct ICRST_R(crate::FieldReader<bool, ICRST_A>);
137impl ICRST_R {
138 #[inline(always)]
139 pub(crate) fn new(bits: bool) -> Self {
140 ICRST_R(crate::FieldReader::new(bits))
141 }
142 #[doc = r"Get enumerated values variant"]
143 #[inline(always)]
144 pub fn variant(&self) -> ICRST_A {
145 match self.bits {
146 false => ICRST_A::_0,
147 true => ICRST_A::_1,
148 }
149 }
150 #[doc = "Checks if the value of the field is `_0`"]
151 #[inline(always)]
152 pub fn is_0(&self) -> bool {
153 **self == ICRST_A::_0
154 }
155 #[doc = "Checks if the value of the field is `_1`"]
156 #[inline(always)]
157 pub fn is_1(&self) -> bool {
158 **self == ICRST_A::_1
159 }
160}
161impl core::ops::Deref for ICRST_R {
162 type Target = crate::FieldReader<bool, ICRST_A>;
163 #[inline(always)]
164 fn deref(&self) -> &Self::Target {
165 &self.0
166 }
167}
168#[doc = "Field `ICRST` writer - FTM counter reset by the selected input capture event."]
169pub struct ICRST_W<'a> {
170 w: &'a mut W,
171}
172impl<'a> ICRST_W<'a> {
173 #[doc = r"Writes `variant` to the field"]
174 #[inline(always)]
175 pub fn variant(self, variant: ICRST_A) -> &'a mut W {
176 self.bit(variant.into())
177 }
178 #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
179 #[inline(always)]
180 pub fn _0(self) -> &'a mut W {
181 self.variant(ICRST_A::_0)
182 }
183 #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
184 #[inline(always)]
185 pub fn _1(self) -> &'a mut W {
186 self.variant(ICRST_A::_1)
187 }
188 #[doc = r"Sets the field bit"]
189 #[inline(always)]
190 pub fn set_bit(self) -> &'a mut W {
191 self.bit(true)
192 }
193 #[doc = r"Clears the field bit"]
194 #[inline(always)]
195 pub fn clear_bit(self) -> &'a mut W {
196 self.bit(false)
197 }
198 #[doc = r"Writes raw bits to the field"]
199 #[inline(always)]
200 pub fn bit(self, value: bool) -> &'a mut W {
201 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
202 self.w
203 }
204}
205#[doc = "Field `ELSA` reader - Channel (n) Edge or Level Select"]
206pub struct ELSA_R(crate::FieldReader<bool, bool>);
207impl ELSA_R {
208 #[inline(always)]
209 pub(crate) fn new(bits: bool) -> Self {
210 ELSA_R(crate::FieldReader::new(bits))
211 }
212}
213impl core::ops::Deref for ELSA_R {
214 type Target = crate::FieldReader<bool, bool>;
215 #[inline(always)]
216 fn deref(&self) -> &Self::Target {
217 &self.0
218 }
219}
220#[doc = "Field `ELSA` writer - Channel (n) Edge or Level Select"]
221pub struct ELSA_W<'a> {
222 w: &'a mut W,
223}
224impl<'a> ELSA_W<'a> {
225 #[doc = r"Sets the field bit"]
226 #[inline(always)]
227 pub fn set_bit(self) -> &'a mut W {
228 self.bit(true)
229 }
230 #[doc = r"Clears the field bit"]
231 #[inline(always)]
232 pub fn clear_bit(self) -> &'a mut W {
233 self.bit(false)
234 }
235 #[doc = r"Writes raw bits to the field"]
236 #[inline(always)]
237 pub fn bit(self, value: bool) -> &'a mut W {
238 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
239 self.w
240 }
241}
242#[doc = "Field `ELSB` reader - Channel (n) Edge or Level Select"]
243pub struct ELSB_R(crate::FieldReader<bool, bool>);
244impl ELSB_R {
245 #[inline(always)]
246 pub(crate) fn new(bits: bool) -> Self {
247 ELSB_R(crate::FieldReader::new(bits))
248 }
249}
250impl core::ops::Deref for ELSB_R {
251 type Target = crate::FieldReader<bool, bool>;
252 #[inline(always)]
253 fn deref(&self) -> &Self::Target {
254 &self.0
255 }
256}
257#[doc = "Field `ELSB` writer - Channel (n) Edge or Level Select"]
258pub struct ELSB_W<'a> {
259 w: &'a mut W,
260}
261impl<'a> ELSB_W<'a> {
262 #[doc = r"Sets the field bit"]
263 #[inline(always)]
264 pub fn set_bit(self) -> &'a mut W {
265 self.bit(true)
266 }
267 #[doc = r"Clears the field bit"]
268 #[inline(always)]
269 pub fn clear_bit(self) -> &'a mut W {
270 self.bit(false)
271 }
272 #[doc = r"Writes raw bits to the field"]
273 #[inline(always)]
274 pub fn bit(self, value: bool) -> &'a mut W {
275 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
276 self.w
277 }
278}
279#[doc = "Field `MSA` reader - Channel (n) Mode Select"]
280pub struct MSA_R(crate::FieldReader<bool, bool>);
281impl MSA_R {
282 #[inline(always)]
283 pub(crate) fn new(bits: bool) -> Self {
284 MSA_R(crate::FieldReader::new(bits))
285 }
286}
287impl core::ops::Deref for MSA_R {
288 type Target = crate::FieldReader<bool, bool>;
289 #[inline(always)]
290 fn deref(&self) -> &Self::Target {
291 &self.0
292 }
293}
294#[doc = "Field `MSA` writer - Channel (n) Mode Select"]
295pub struct MSA_W<'a> {
296 w: &'a mut W,
297}
298impl<'a> MSA_W<'a> {
299 #[doc = r"Sets the field bit"]
300 #[inline(always)]
301 pub fn set_bit(self) -> &'a mut W {
302 self.bit(true)
303 }
304 #[doc = r"Clears the field bit"]
305 #[inline(always)]
306 pub fn clear_bit(self) -> &'a mut W {
307 self.bit(false)
308 }
309 #[doc = r"Writes raw bits to the field"]
310 #[inline(always)]
311 pub fn bit(self, value: bool) -> &'a mut W {
312 self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
313 self.w
314 }
315}
316#[doc = "Field `MSB` reader - Channel (n) Mode Select"]
317pub struct MSB_R(crate::FieldReader<bool, bool>);
318impl MSB_R {
319 #[inline(always)]
320 pub(crate) fn new(bits: bool) -> Self {
321 MSB_R(crate::FieldReader::new(bits))
322 }
323}
324impl core::ops::Deref for MSB_R {
325 type Target = crate::FieldReader<bool, bool>;
326 #[inline(always)]
327 fn deref(&self) -> &Self::Target {
328 &self.0
329 }
330}
331#[doc = "Field `MSB` writer - Channel (n) Mode Select"]
332pub struct MSB_W<'a> {
333 w: &'a mut W,
334}
335impl<'a> MSB_W<'a> {
336 #[doc = r"Sets the field bit"]
337 #[inline(always)]
338 pub fn set_bit(self) -> &'a mut W {
339 self.bit(true)
340 }
341 #[doc = r"Clears the field bit"]
342 #[inline(always)]
343 pub fn clear_bit(self) -> &'a mut W {
344 self.bit(false)
345 }
346 #[doc = r"Writes raw bits to the field"]
347 #[inline(always)]
348 pub fn bit(self, value: bool) -> &'a mut W {
349 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
350 self.w
351 }
352}
353#[doc = "Channel (n) Interrupt Enable\n\nValue on reset: 0"]
354#[derive(Clone, Copy, Debug, PartialEq)]
355pub enum CHIE_A {
356 #[doc = "0: Disable channel (n) interrupt. Use software polling."]
357 _0 = 0,
358 #[doc = "1: Enable channel (n) interrupt."]
359 _1 = 1,
360}
361impl From<CHIE_A> for bool {
362 #[inline(always)]
363 fn from(variant: CHIE_A) -> Self {
364 variant as u8 != 0
365 }
366}
367#[doc = "Field `CHIE` reader - Channel (n) Interrupt Enable"]
368pub struct CHIE_R(crate::FieldReader<bool, CHIE_A>);
369impl CHIE_R {
370 #[inline(always)]
371 pub(crate) fn new(bits: bool) -> Self {
372 CHIE_R(crate::FieldReader::new(bits))
373 }
374 #[doc = r"Get enumerated values variant"]
375 #[inline(always)]
376 pub fn variant(&self) -> CHIE_A {
377 match self.bits {
378 false => CHIE_A::_0,
379 true => CHIE_A::_1,
380 }
381 }
382 #[doc = "Checks if the value of the field is `_0`"]
383 #[inline(always)]
384 pub fn is_0(&self) -> bool {
385 **self == CHIE_A::_0
386 }
387 #[doc = "Checks if the value of the field is `_1`"]
388 #[inline(always)]
389 pub fn is_1(&self) -> bool {
390 **self == CHIE_A::_1
391 }
392}
393impl core::ops::Deref for CHIE_R {
394 type Target = crate::FieldReader<bool, CHIE_A>;
395 #[inline(always)]
396 fn deref(&self) -> &Self::Target {
397 &self.0
398 }
399}
400#[doc = "Field `CHIE` writer - Channel (n) Interrupt Enable"]
401pub struct CHIE_W<'a> {
402 w: &'a mut W,
403}
404impl<'a> CHIE_W<'a> {
405 #[doc = r"Writes `variant` to the field"]
406 #[inline(always)]
407 pub fn variant(self, variant: CHIE_A) -> &'a mut W {
408 self.bit(variant.into())
409 }
410 #[doc = "Disable channel (n) interrupt. Use software polling."]
411 #[inline(always)]
412 pub fn _0(self) -> &'a mut W {
413 self.variant(CHIE_A::_0)
414 }
415 #[doc = "Enable channel (n) interrupt."]
416 #[inline(always)]
417 pub fn _1(self) -> &'a mut W {
418 self.variant(CHIE_A::_1)
419 }
420 #[doc = r"Sets the field bit"]
421 #[inline(always)]
422 pub fn set_bit(self) -> &'a mut W {
423 self.bit(true)
424 }
425 #[doc = r"Clears the field bit"]
426 #[inline(always)]
427 pub fn clear_bit(self) -> &'a mut W {
428 self.bit(false)
429 }
430 #[doc = r"Writes raw bits to the field"]
431 #[inline(always)]
432 pub fn bit(self, value: bool) -> &'a mut W {
433 self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
434 self.w
435 }
436}
437#[doc = "Channel (n) Flag\n\nValue on reset: 0"]
438#[derive(Clone, Copy, Debug, PartialEq)]
439pub enum CHF_A {
440 #[doc = "0: No channel (n) event has occurred."]
441 _0 = 0,
442 #[doc = "1: A channel (n) event has occurred."]
443 _1 = 1,
444}
445impl From<CHF_A> for bool {
446 #[inline(always)]
447 fn from(variant: CHF_A) -> Self {
448 variant as u8 != 0
449 }
450}
451#[doc = "Field `CHF` reader - Channel (n) Flag"]
452pub struct CHF_R(crate::FieldReader<bool, CHF_A>);
453impl CHF_R {
454 #[inline(always)]
455 pub(crate) fn new(bits: bool) -> Self {
456 CHF_R(crate::FieldReader::new(bits))
457 }
458 #[doc = r"Get enumerated values variant"]
459 #[inline(always)]
460 pub fn variant(&self) -> CHF_A {
461 match self.bits {
462 false => CHF_A::_0,
463 true => CHF_A::_1,
464 }
465 }
466 #[doc = "Checks if the value of the field is `_0`"]
467 #[inline(always)]
468 pub fn is_0(&self) -> bool {
469 **self == CHF_A::_0
470 }
471 #[doc = "Checks if the value of the field is `_1`"]
472 #[inline(always)]
473 pub fn is_1(&self) -> bool {
474 **self == CHF_A::_1
475 }
476}
477impl core::ops::Deref for CHF_R {
478 type Target = crate::FieldReader<bool, CHF_A>;
479 #[inline(always)]
480 fn deref(&self) -> &Self::Target {
481 &self.0
482 }
483}
484#[doc = "Trigger mode control\n\nValue on reset: 0"]
485#[derive(Clone, Copy, Debug, PartialEq)]
486pub enum TRIGMODE_A {
487 #[doc = "0: Channel outputs will generate the normal PWM outputs without generating a pulse."]
488 _0 = 0,
489 #[doc = "1: If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
490 _1 = 1,
491}
492impl From<TRIGMODE_A> for bool {
493 #[inline(always)]
494 fn from(variant: TRIGMODE_A) -> Self {
495 variant as u8 != 0
496 }
497}
498#[doc = "Field `TRIGMODE` reader - Trigger mode control"]
499pub struct TRIGMODE_R(crate::FieldReader<bool, TRIGMODE_A>);
500impl TRIGMODE_R {
501 #[inline(always)]
502 pub(crate) fn new(bits: bool) -> Self {
503 TRIGMODE_R(crate::FieldReader::new(bits))
504 }
505 #[doc = r"Get enumerated values variant"]
506 #[inline(always)]
507 pub fn variant(&self) -> TRIGMODE_A {
508 match self.bits {
509 false => TRIGMODE_A::_0,
510 true => TRIGMODE_A::_1,
511 }
512 }
513 #[doc = "Checks if the value of the field is `_0`"]
514 #[inline(always)]
515 pub fn is_0(&self) -> bool {
516 **self == TRIGMODE_A::_0
517 }
518 #[doc = "Checks if the value of the field is `_1`"]
519 #[inline(always)]
520 pub fn is_1(&self) -> bool {
521 **self == TRIGMODE_A::_1
522 }
523}
524impl core::ops::Deref for TRIGMODE_R {
525 type Target = crate::FieldReader<bool, TRIGMODE_A>;
526 #[inline(always)]
527 fn deref(&self) -> &Self::Target {
528 &self.0
529 }
530}
531#[doc = "Field `TRIGMODE` writer - Trigger mode control"]
532pub struct TRIGMODE_W<'a> {
533 w: &'a mut W,
534}
535impl<'a> TRIGMODE_W<'a> {
536 #[doc = r"Writes `variant` to the field"]
537 #[inline(always)]
538 pub fn variant(self, variant: TRIGMODE_A) -> &'a mut W {
539 self.bit(variant.into())
540 }
541 #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
542 #[inline(always)]
543 pub fn _0(self) -> &'a mut W {
544 self.variant(TRIGMODE_A::_0)
545 }
546 #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
547 #[inline(always)]
548 pub fn _1(self) -> &'a mut W {
549 self.variant(TRIGMODE_A::_1)
550 }
551 #[doc = r"Sets the field bit"]
552 #[inline(always)]
553 pub fn set_bit(self) -> &'a mut W {
554 self.bit(true)
555 }
556 #[doc = r"Clears the field bit"]
557 #[inline(always)]
558 pub fn clear_bit(self) -> &'a mut W {
559 self.bit(false)
560 }
561 #[doc = r"Writes raw bits to the field"]
562 #[inline(always)]
563 pub fn bit(self, value: bool) -> &'a mut W {
564 self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
565 self.w
566 }
567}
568#[doc = "Channel (n) Input State\n\nValue on reset: 0"]
569#[derive(Clone, Copy, Debug, PartialEq)]
570pub enum CHIS_A {
571 #[doc = "0: The channel (n) input is zero."]
572 _0 = 0,
573 #[doc = "1: The channel (n) input is one."]
574 _1 = 1,
575}
576impl From<CHIS_A> for bool {
577 #[inline(always)]
578 fn from(variant: CHIS_A) -> Self {
579 variant as u8 != 0
580 }
581}
582#[doc = "Field `CHIS` reader - Channel (n) Input State"]
583pub struct CHIS_R(crate::FieldReader<bool, CHIS_A>);
584impl CHIS_R {
585 #[inline(always)]
586 pub(crate) fn new(bits: bool) -> Self {
587 CHIS_R(crate::FieldReader::new(bits))
588 }
589 #[doc = r"Get enumerated values variant"]
590 #[inline(always)]
591 pub fn variant(&self) -> CHIS_A {
592 match self.bits {
593 false => CHIS_A::_0,
594 true => CHIS_A::_1,
595 }
596 }
597 #[doc = "Checks if the value of the field is `_0`"]
598 #[inline(always)]
599 pub fn is_0(&self) -> bool {
600 **self == CHIS_A::_0
601 }
602 #[doc = "Checks if the value of the field is `_1`"]
603 #[inline(always)]
604 pub fn is_1(&self) -> bool {
605 **self == CHIS_A::_1
606 }
607}
608impl core::ops::Deref for CHIS_R {
609 type Target = crate::FieldReader<bool, CHIS_A>;
610 #[inline(always)]
611 fn deref(&self) -> &Self::Target {
612 &self.0
613 }
614}
615#[doc = "Channel (n) Output Value\n\nValue on reset: 0"]
616#[derive(Clone, Copy, Debug, PartialEq)]
617pub enum CHOV_A {
618 #[doc = "0: The channel (n) output is zero."]
619 _0 = 0,
620 #[doc = "1: The channel (n) output is one."]
621 _1 = 1,
622}
623impl From<CHOV_A> for bool {
624 #[inline(always)]
625 fn from(variant: CHOV_A) -> Self {
626 variant as u8 != 0
627 }
628}
629#[doc = "Field `CHOV` reader - Channel (n) Output Value"]
630pub struct CHOV_R(crate::FieldReader<bool, CHOV_A>);
631impl CHOV_R {
632 #[inline(always)]
633 pub(crate) fn new(bits: bool) -> Self {
634 CHOV_R(crate::FieldReader::new(bits))
635 }
636 #[doc = r"Get enumerated values variant"]
637 #[inline(always)]
638 pub fn variant(&self) -> CHOV_A {
639 match self.bits {
640 false => CHOV_A::_0,
641 true => CHOV_A::_1,
642 }
643 }
644 #[doc = "Checks if the value of the field is `_0`"]
645 #[inline(always)]
646 pub fn is_0(&self) -> bool {
647 **self == CHOV_A::_0
648 }
649 #[doc = "Checks if the value of the field is `_1`"]
650 #[inline(always)]
651 pub fn is_1(&self) -> bool {
652 **self == CHOV_A::_1
653 }
654}
655impl core::ops::Deref for CHOV_R {
656 type Target = crate::FieldReader<bool, CHOV_A>;
657 #[inline(always)]
658 fn deref(&self) -> &Self::Target {
659 &self.0
660 }
661}
662impl R {
663 #[doc = "Bit 0 - DMA Enable"]
664 #[inline(always)]
665 pub fn dma(&self) -> DMA_R {
666 DMA_R::new((self.bits & 0x01) != 0)
667 }
668 #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
669 #[inline(always)]
670 pub fn icrst(&self) -> ICRST_R {
671 ICRST_R::new(((self.bits >> 1) & 0x01) != 0)
672 }
673 #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
674 #[inline(always)]
675 pub fn elsa(&self) -> ELSA_R {
676 ELSA_R::new(((self.bits >> 2) & 0x01) != 0)
677 }
678 #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
679 #[inline(always)]
680 pub fn elsb(&self) -> ELSB_R {
681 ELSB_R::new(((self.bits >> 3) & 0x01) != 0)
682 }
683 #[doc = "Bit 4 - Channel (n) Mode Select"]
684 #[inline(always)]
685 pub fn msa(&self) -> MSA_R {
686 MSA_R::new(((self.bits >> 4) & 0x01) != 0)
687 }
688 #[doc = "Bit 5 - Channel (n) Mode Select"]
689 #[inline(always)]
690 pub fn msb(&self) -> MSB_R {
691 MSB_R::new(((self.bits >> 5) & 0x01) != 0)
692 }
693 #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
694 #[inline(always)]
695 pub fn chie(&self) -> CHIE_R {
696 CHIE_R::new(((self.bits >> 6) & 0x01) != 0)
697 }
698 #[doc = "Bit 7 - Channel (n) Flag"]
699 #[inline(always)]
700 pub fn chf(&self) -> CHF_R {
701 CHF_R::new(((self.bits >> 7) & 0x01) != 0)
702 }
703 #[doc = "Bit 8 - Trigger mode control"]
704 #[inline(always)]
705 pub fn trigmode(&self) -> TRIGMODE_R {
706 TRIGMODE_R::new(((self.bits >> 8) & 0x01) != 0)
707 }
708 #[doc = "Bit 9 - Channel (n) Input State"]
709 #[inline(always)]
710 pub fn chis(&self) -> CHIS_R {
711 CHIS_R::new(((self.bits >> 9) & 0x01) != 0)
712 }
713 #[doc = "Bit 10 - Channel (n) Output Value"]
714 #[inline(always)]
715 pub fn chov(&self) -> CHOV_R {
716 CHOV_R::new(((self.bits >> 10) & 0x01) != 0)
717 }
718}
719impl W {
720 #[doc = "Bit 0 - DMA Enable"]
721 #[inline(always)]
722 pub fn dma(&mut self) -> DMA_W {
723 DMA_W { w: self }
724 }
725 #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
726 #[inline(always)]
727 pub fn icrst(&mut self) -> ICRST_W {
728 ICRST_W { w: self }
729 }
730 #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
731 #[inline(always)]
732 pub fn elsa(&mut self) -> ELSA_W {
733 ELSA_W { w: self }
734 }
735 #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
736 #[inline(always)]
737 pub fn elsb(&mut self) -> ELSB_W {
738 ELSB_W { w: self }
739 }
740 #[doc = "Bit 4 - Channel (n) Mode Select"]
741 #[inline(always)]
742 pub fn msa(&mut self) -> MSA_W {
743 MSA_W { w: self }
744 }
745 #[doc = "Bit 5 - Channel (n) Mode Select"]
746 #[inline(always)]
747 pub fn msb(&mut self) -> MSB_W {
748 MSB_W { w: self }
749 }
750 #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
751 #[inline(always)]
752 pub fn chie(&mut self) -> CHIE_W {
753 CHIE_W { w: self }
754 }
755 #[doc = "Bit 8 - Trigger mode control"]
756 #[inline(always)]
757 pub fn trigmode(&mut self) -> TRIGMODE_W {
758 TRIGMODE_W { w: self }
759 }
760 #[doc = "Writes raw bits to the register."]
761 #[inline(always)]
762 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
763 self.0.bits(bits);
764 self
765 }
766}
767#[doc = "Channel (n) Status And Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2sc](index.html) module"]
768pub struct C2SC_SPEC;
769impl crate::RegisterSpec for C2SC_SPEC {
770 type Ux = u32;
771}
772#[doc = "`read()` method returns [c2sc::R](R) reader structure"]
773impl crate::Readable for C2SC_SPEC {
774 type Reader = R;
775}
776#[doc = "`write(|w| ..)` method takes [c2sc::W](W) writer structure"]
777impl crate::Writable for C2SC_SPEC {
778 type Writer = W;
779}
780#[doc = "`reset()` method sets C2SC to value 0"]
781impl crate::Resettable for C2SC_SPEC {
782 #[inline(always)]
783 fn reset_value() -> Self::Ux {
784 0
785 }
786}