rvsim-core 2.0.0

A cycle-level RISC-V 64-bit system simulator.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

//! Architectural state and the rules for changing it.
//!
//! What a hart holds (registers, CSRs, privilege, PMP) and what the
//! privileged spec says happens to it, independent of any pipeline.

pub mod csr;

pub mod pmp;

pub mod regs;

pub mod reservation;

pub mod translation;

pub mod trap;

mod hart;
mod trigger;

pub use hart::{Hart, HartInit};