RISC-V emulator core implementation.
NOTE: This project is currently under intensely development. The source code might be changed dramatically.
How to use
Create an Emulator
object, place a binary data in DRAM and set the program counter to
DRAM_BASE
. The binary data must contain no headers for now. The example is here:
use DRAM_BASE;
use Emulator;
See the example usage in rvemu/lib/rvemu-cli/src/main.rs.
Features
Now, supports the following features (will be added in the future):
- RV64G ISAs
- Previleged ISAs
- Previleged mode
- CSRs
- Exceptions
- Devices (DRAM, UART, CLINT)