Module rvemu::csr [−][src]
The csr module contains all the control and status registers.
Structs
| State | The state to contains all the CSRs. |
Constants
| CSR_SIZE | The number of CSRs. The field is 12 bits so the maximum kind of CSRs is 4096 (2**12). |
| FCSR | Floating-point control and status register (frm + fflags). |
| FFLAGS | Flating-point accrued exceptions. |
| FRB | Floating-point dynamic rounding mode. |
| MARCHID | Architecture ID. |
| MCAUSE | Machine trap cause. |
| MCOUNTEREN | Machine counter enable. |
| MEDELEG | Machine exception delefation register. |
| MEIP_BIT | Machine external interrupt. |
| MEPC | Machine exception program counter. |
| MHARTID | Hardware thread ID. |
| MIDELEG | Machine interrupt delefation register. |
| MIE | Machine interrupt-enable register. |
| MIMPID | Implementation ID. |
| MIP | Machine interrupt pending. |
| MISA | ISA and extensions. |
| MSCRATCH | Scratch register for machine trap handlers. |
| MSIP_BIT | Machine software interrupt. |
| MSTATUS | Machine status register. |
| MTIP_BIT | Machine timer interrupt. |
| MTVAL | Machine bad address or instruction. |
| MTVEC | Machine trap-handler base address. |
| MVENDORID | Vendor ID. |
| MXLEN | |
| PMPADDR0 | Physical memory protection address register. |
| PMPCFG0 | Physical memory protection configuration. |
| SATP | Supervisor address translation and protection. |
| SCAUSE | Supervisor trap cause. |
| SEDELEG | Supervisor exception delegation register. |
| SEIP_BIT | Supervisor external interrupt. |
| SEPC | Supervisor exception program counter. |
| SIDELEG | Supervisor interrupt delegation register. |
| SIE | Supervisor interrupt-enable register. |
| SIP | Supervisor interrupt pending. |
| SSCRATCH | Scratch register for supervisor trap handlers. |
| SSIP_BIT | Supervisor software interrupt. |
| SSTATUS | Supervisor status register. |
| SSTATUS_FS | |
| SSTATUS_MXR | |
| SSTATUS_SIE | |
| SSTATUS_SPIE | |
| SSTATUS_SPP | |
| SSTATUS_SUM | |
| SSTATUS_UXL | |
| SSTATUS_XS | |
| STIP_BIT | Supervisor timer interrupt. |
| STVAL | Supervisor bad address or instruction. |
| STVEC | Supervisor trap handler base address. |
| TIME | Timer for RDTIME instruction. |
| UCAUSE | User trap cause. |
| UEPC | User exception program counter. |
| USTATUS | User status register. |
| UTVAL | User bad address or instruction. |
| UTVEC | User trap handler base address. |
Type Definitions
| CsrAddress |