rv32m1_ri5cy_pac/lpi2c0/
mtdr.rs1#[doc = "Reader of register MTDR"]
2pub type R = crate::R<u32, super::MTDR>;
3#[doc = "Writer for register MTDR"]
4pub type W = crate::W<u32, super::MTDR>;
5#[doc = "Register MTDR `reset()`'s with value 0"]
6impl crate::ResetValue for super::MTDR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Write proxy for field `DATA`"]
14pub struct DATA_W<'a> {
15 w: &'a mut W,
16}
17impl<'a> DATA_W<'a> {
18 #[doc = r"Writes raw bits to the field"]
19 #[inline(always)]
20 pub unsafe fn bits(self, value: u8) -> &'a mut W {
21 self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
22 self.w
23 }
24}
25#[doc = "Command Data\n\nValue on reset: 0"]
26#[derive(Clone, Copy, Debug, PartialEq)]
27pub enum CMD_AW {
28 #[doc = "0: Transmit DATA\\[7:0\\]"]
29 CMD_0,
30 #[doc = "1: Receive (DATA\\[7:0\\] + 1) bytes"]
31 CMD_1,
32 #[doc = "2: Generate STOP condition"]
33 CMD_2,
34 #[doc = "3: Receive and discard (DATA\\[7:0\\] + 1) bytes"]
35 CMD_3,
36 #[doc = "4: Generate (repeated) START and transmit address in DATA\\[7:0\\]"]
37 CMD_4,
38 #[doc = "5: Generate (repeated) START and transmit address in DATA\\[7:0\\]. This transfer expects a NACK to be returned."]
39 CMD_5,
40 #[doc = "6: Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode"]
41 CMD_6,
42 #[doc = "7: Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode. This transfer expects a NACK to be returned."]
43 CMD_7,
44}
45impl From<CMD_AW> for u8 {
46 #[inline(always)]
47 fn from(variant: CMD_AW) -> Self {
48 match variant {
49 CMD_AW::CMD_0 => 0,
50 CMD_AW::CMD_1 => 1,
51 CMD_AW::CMD_2 => 2,
52 CMD_AW::CMD_3 => 3,
53 CMD_AW::CMD_4 => 4,
54 CMD_AW::CMD_5 => 5,
55 CMD_AW::CMD_6 => 6,
56 CMD_AW::CMD_7 => 7,
57 }
58 }
59}
60#[doc = "Write proxy for field `CMD`"]
61pub struct CMD_W<'a> {
62 w: &'a mut W,
63}
64impl<'a> CMD_W<'a> {
65 #[doc = r"Writes `variant` to the field"]
66 #[inline(always)]
67 pub fn variant(self, variant: CMD_AW) -> &'a mut W {
68 {
69 self.bits(variant.into())
70 }
71 }
72 #[doc = "Transmit DATA\\[7:0\\]"]
73 #[inline(always)]
74 pub fn cmd_0(self) -> &'a mut W {
75 self.variant(CMD_AW::CMD_0)
76 }
77 #[doc = "Receive (DATA\\[7:0\\] + 1) bytes"]
78 #[inline(always)]
79 pub fn cmd_1(self) -> &'a mut W {
80 self.variant(CMD_AW::CMD_1)
81 }
82 #[doc = "Generate STOP condition"]
83 #[inline(always)]
84 pub fn cmd_2(self) -> &'a mut W {
85 self.variant(CMD_AW::CMD_2)
86 }
87 #[doc = "Receive and discard (DATA\\[7:0\\] + 1) bytes"]
88 #[inline(always)]
89 pub fn cmd_3(self) -> &'a mut W {
90 self.variant(CMD_AW::CMD_3)
91 }
92 #[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]"]
93 #[inline(always)]
94 pub fn cmd_4(self) -> &'a mut W {
95 self.variant(CMD_AW::CMD_4)
96 }
97 #[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]. This transfer expects a NACK to be returned."]
98 #[inline(always)]
99 pub fn cmd_5(self) -> &'a mut W {
100 self.variant(CMD_AW::CMD_5)
101 }
102 #[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode"]
103 #[inline(always)]
104 pub fn cmd_6(self) -> &'a mut W {
105 self.variant(CMD_AW::CMD_6)
106 }
107 #[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode. This transfer expects a NACK to be returned."]
108 #[inline(always)]
109 pub fn cmd_7(self) -> &'a mut W {
110 self.variant(CMD_AW::CMD_7)
111 }
112 #[doc = r"Writes raw bits to the field"]
113 #[inline(always)]
114 pub fn bits(self, value: u8) -> &'a mut W {
115 self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u32) & 0x07) << 8);
116 self.w
117 }
118}
119impl R {}
120impl W {
121 #[doc = "Bits 0:7 - Transmit Data"]
122 #[inline(always)]
123 pub fn data(&mut self) -> DATA_W {
124 DATA_W { w: self }
125 }
126 #[doc = "Bits 8:10 - Command Data"]
127 #[inline(always)]
128 pub fn cmd(&mut self) -> CMD_W {
129 CMD_W { w: self }
130 }
131}