ruvllm-esp32 0.1.0

Tiny LLM inference for ESP32 microcontrollers with INT8/INT4 quantization, multi-chip federation, RuVector semantic memory, and SNN-gated energy optimization
Documentation

ruvllm-esp32

There is currently very little information to present on this page because Docs.rs has only limited support for extracting structured feature metadata from Cargo crates. This issue is tracked in Rust RFC #3416. Check this library's main docs, readme, and Cargo.toml in case its authors have documentation for features available there instead.

This version has 13 feature flags, 3 of them enabled by default.

default

federation (default)

This feature flag does not enable additional features.

host-test (default)

anyhow (default)

binary

This feature flag does not enable additional features.

esp-idf-hal

esp-idf-svc

esp-idf-sys

esp32-std

esp32s3-simd

This feature flag does not enable additional features.

no_std

This feature flag does not enable additional features.

q4

This feature flag does not enable additional features.

q8

This feature flag does not enable additional features.

self-learning

This feature flag does not enable additional features.