use super::RegOp;
pub const SCCB_ADDR: u8 = 0x30;
pub const SETTINGS_CIF: &[RegOp] = &[
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0x2C,
value: 0xFF,
},
RegOp::Write {
addr: 0x2E,
value: 0xDF,
},
RegOp::Write {
addr: 0xFF,
value: 0x01,
},
RegOp::Write {
addr: 0x3C,
value: 0x32,
},
RegOp::Write {
addr: 0x11,
value: 0x01,
},
RegOp::Write {
addr: 0x09,
value: 0x02,
},
RegOp::Write {
addr: 0x04,
value: 0x28,
},
RegOp::Write {
addr: 0x13,
value: 0xE5,
},
RegOp::Write {
addr: 0x14,
value: 0x48,
},
RegOp::Write {
addr: 0x2C,
value: 0x0C,
},
RegOp::Write {
addr: 0x33,
value: 0x78,
},
RegOp::Write {
addr: 0x3A,
value: 0x33,
},
RegOp::Write {
addr: 0x3B,
value: 0xFB,
},
RegOp::Write {
addr: 0x3E,
value: 0x00,
},
RegOp::Write {
addr: 0x43,
value: 0x11,
},
RegOp::Write {
addr: 0x16,
value: 0x10,
},
RegOp::Write {
addr: 0x39,
value: 0x92,
},
RegOp::Write {
addr: 0x35,
value: 0xDA,
},
RegOp::Write {
addr: 0x22,
value: 0x1A,
},
RegOp::Write {
addr: 0x37,
value: 0xC3,
},
RegOp::Write {
addr: 0x23,
value: 0x00,
},
RegOp::Write {
addr: 0x34,
value: 0xC0,
},
RegOp::Write {
addr: 0x06,
value: 0x88,
},
RegOp::Write {
addr: 0x07,
value: 0xC0,
},
RegOp::Write {
addr: 0x0D,
value: 0x87,
},
RegOp::Write {
addr: 0x0E,
value: 0x41,
},
RegOp::Write {
addr: 0x4C,
value: 0x00,
},
RegOp::Write {
addr: 0x4A,
value: 0x81,
},
RegOp::Write {
addr: 0x21,
value: 0x99,
},
RegOp::Write {
addr: 0x24,
value: 0x40,
},
RegOp::Write {
addr: 0x25,
value: 0x38,
},
RegOp::Write {
addr: 0x5C,
value: 0x00,
},
RegOp::Write {
addr: 0x63,
value: 0x00,
},
RegOp::Write {
addr: 0x61,
value: 0x70,
},
RegOp::Write {
addr: 0x62,
value: 0x80,
},
RegOp::Write {
addr: 0x7C,
value: 0x05,
},
RegOp::Write {
addr: 0x20,
value: 0x80,
},
RegOp::Write {
addr: 0x28,
value: 0x30,
},
RegOp::Write {
addr: 0x6C,
value: 0x00,
},
RegOp::Write {
addr: 0x6D,
value: 0x80,
},
RegOp::Write {
addr: 0x6E,
value: 0x00,
},
RegOp::Write {
addr: 0x70,
value: 0x02,
},
RegOp::Write {
addr: 0x71,
value: 0x94,
},
RegOp::Write {
addr: 0x73,
value: 0xC1,
},
RegOp::Write {
addr: 0x3D,
value: 0x34,
},
RegOp::Write {
addr: 0x5A,
value: 0x57,
},
RegOp::Write {
addr: 0x4F,
value: 0xBB,
},
RegOp::Write {
addr: 0x50,
value: 0x9C,
},
RegOp::Write {
addr: 0x12,
value: 0x20,
},
RegOp::Write {
addr: 0x17,
value: 0x11,
},
RegOp::Write {
addr: 0x18,
value: 0x43,
},
RegOp::Write {
addr: 0x19,
value: 0x00,
},
RegOp::Write {
addr: 0x1A,
value: 0x25,
},
RegOp::Write {
addr: 0x32,
value: 0x89,
},
RegOp::Write {
addr: 0x37,
value: 0xC0,
},
RegOp::Write {
addr: 0x4F,
value: 0xCA,
},
RegOp::Write {
addr: 0x50,
value: 0xA8,
},
RegOp::Write {
addr: 0x6D,
value: 0x00,
},
RegOp::Write {
addr: 0x3D,
value: 0x38,
},
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0xE5,
value: 0x7F,
},
RegOp::Write {
addr: 0xF9,
value: 0xC0,
},
RegOp::Write {
addr: 0x41,
value: 0x24,
},
RegOp::Write {
addr: 0xE0,
value: 0x14,
},
RegOp::Write {
addr: 0x76,
value: 0xFF,
},
RegOp::Write {
addr: 0x33,
value: 0xA0,
},
RegOp::Write {
addr: 0x42,
value: 0x20,
},
RegOp::Write {
addr: 0x43,
value: 0x18,
},
RegOp::Write {
addr: 0x4C,
value: 0x00,
},
RegOp::Write {
addr: 0x87,
value: 0x50,
},
RegOp::Write {
addr: 0x88,
value: 0x3F,
},
RegOp::Write {
addr: 0xD7,
value: 0x03,
},
RegOp::Write {
addr: 0xD9,
value: 0x10,
},
RegOp::Write {
addr: 0xD3,
value: 0x82,
},
RegOp::Write {
addr: 0xC8,
value: 0x08,
},
RegOp::Write {
addr: 0xC9,
value: 0x80,
},
RegOp::Write {
addr: 0x7C,
value: 0x00,
},
RegOp::Write {
addr: 0x7D,
value: 0x00,
},
RegOp::Write {
addr: 0x7C,
value: 0x03,
},
RegOp::Write {
addr: 0x7D,
value: 0x48,
},
RegOp::Write {
addr: 0x7D,
value: 0x48,
},
RegOp::Write {
addr: 0x7C,
value: 0x08,
},
RegOp::Write {
addr: 0x7D,
value: 0x20,
},
RegOp::Write {
addr: 0x7D,
value: 0x10,
},
RegOp::Write {
addr: 0x7D,
value: 0x0E,
},
RegOp::Write {
addr: 0x90,
value: 0x00,
},
RegOp::Write {
addr: 0x91,
value: 0x0E,
},
RegOp::Write {
addr: 0x91,
value: 0x1A,
},
RegOp::Write {
addr: 0x91,
value: 0x31,
},
RegOp::Write {
addr: 0x91,
value: 0x5A,
},
RegOp::Write {
addr: 0x91,
value: 0x69,
},
RegOp::Write {
addr: 0x91,
value: 0x75,
},
RegOp::Write {
addr: 0x91,
value: 0x7E,
},
RegOp::Write {
addr: 0x91,
value: 0x88,
},
RegOp::Write {
addr: 0x91,
value: 0x8F,
},
RegOp::Write {
addr: 0x91,
value: 0x96,
},
RegOp::Write {
addr: 0x91,
value: 0xA3,
},
RegOp::Write {
addr: 0x91,
value: 0xAF,
},
RegOp::Write {
addr: 0x91,
value: 0xC4,
},
RegOp::Write {
addr: 0x91,
value: 0xD7,
},
RegOp::Write {
addr: 0x91,
value: 0xE8,
},
RegOp::Write {
addr: 0x91,
value: 0x20,
},
RegOp::Write {
addr: 0x92,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x06,
},
RegOp::Write {
addr: 0x93,
value: 0xE3,
},
RegOp::Write {
addr: 0x93,
value: 0x05,
},
RegOp::Write {
addr: 0x93,
value: 0x05,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x04,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x93,
value: 0x00,
},
RegOp::Write {
addr: 0x96,
value: 0x00,
},
RegOp::Write {
addr: 0x97,
value: 0x08,
},
RegOp::Write {
addr: 0x97,
value: 0x19,
},
RegOp::Write {
addr: 0x97,
value: 0x02,
},
RegOp::Write {
addr: 0x97,
value: 0x0C,
},
RegOp::Write {
addr: 0x97,
value: 0x24,
},
RegOp::Write {
addr: 0x97,
value: 0x30,
},
RegOp::Write {
addr: 0x97,
value: 0x28,
},
RegOp::Write {
addr: 0x97,
value: 0x26,
},
RegOp::Write {
addr: 0x97,
value: 0x02,
},
RegOp::Write {
addr: 0x97,
value: 0x98,
},
RegOp::Write {
addr: 0x97,
value: 0x80,
},
RegOp::Write {
addr: 0x97,
value: 0x00,
},
RegOp::Write {
addr: 0x97,
value: 0x00,
},
RegOp::Write {
addr: 0xA4,
value: 0x00,
},
RegOp::Write {
addr: 0xA8,
value: 0x00,
},
RegOp::Write {
addr: 0xC5,
value: 0x11,
},
RegOp::Write {
addr: 0xC6,
value: 0x51,
},
RegOp::Write {
addr: 0xBF,
value: 0x80,
},
RegOp::Write {
addr: 0xC7,
value: 0x10,
},
RegOp::Write {
addr: 0xB6,
value: 0x66,
},
RegOp::Write {
addr: 0xB8,
value: 0xA5,
},
RegOp::Write {
addr: 0xB7,
value: 0x64,
},
RegOp::Write {
addr: 0xB9,
value: 0x7C,
},
RegOp::Write {
addr: 0xB3,
value: 0xAF,
},
RegOp::Write {
addr: 0xB4,
value: 0x97,
},
RegOp::Write {
addr: 0xB5,
value: 0xFF,
},
RegOp::Write {
addr: 0xB0,
value: 0xC5,
},
RegOp::Write {
addr: 0xB1,
value: 0x94,
},
RegOp::Write {
addr: 0xB2,
value: 0x0F,
},
RegOp::Write {
addr: 0xC4,
value: 0x5C,
},
RegOp::Write {
addr: 0xC3,
value: 0xFD,
},
RegOp::Write {
addr: 0x7F,
value: 0x00,
},
RegOp::Write {
addr: 0xE5,
value: 0x1F,
},
RegOp::Write {
addr: 0xE1,
value: 0x67,
},
RegOp::Write {
addr: 0xDD,
value: 0x7F,
},
RegOp::Write {
addr: 0xDA,
value: 0x00,
},
RegOp::Write {
addr: 0xE0,
value: 0x00,
},
RegOp::Write {
addr: 0x05,
value: 0x00,
},
RegOp::Write {
addr: 0x00,
value: 0x00,
},
];
pub const SETTINGS_TO_CIF: &[RegOp] = &[
RegOp::Write {
addr: 0xFF,
value: 0x01,
},
RegOp::Write {
addr: 0x12,
value: 0x20,
},
RegOp::Write {
addr: 0x03,
value: 0x0A,
},
RegOp::Write {
addr: 0x32,
value: 0x89,
},
RegOp::Write {
addr: 0x17,
value: 0x11,
},
RegOp::Write {
addr: 0x18,
value: 0x43,
},
RegOp::Write {
addr: 0x19,
value: 0x00,
},
RegOp::Write {
addr: 0x1A,
value: 0x25,
},
RegOp::Write {
addr: 0x4F,
value: 0xCA,
},
RegOp::Write {
addr: 0x50,
value: 0xA8,
},
RegOp::Write {
addr: 0x5A,
value: 0x23,
},
RegOp::Write {
addr: 0x6D,
value: 0x00,
},
RegOp::Write {
addr: 0x3D,
value: 0x38,
},
RegOp::Write {
addr: 0x39,
value: 0x92,
},
RegOp::Write {
addr: 0x35,
value: 0xDA,
},
RegOp::Write {
addr: 0x22,
value: 0x1A,
},
RegOp::Write {
addr: 0x37,
value: 0xC3,
},
RegOp::Write {
addr: 0x23,
value: 0x00,
},
RegOp::Write {
addr: 0x34,
value: 0xC0,
},
RegOp::Write {
addr: 0x06,
value: 0x88,
},
RegOp::Write {
addr: 0x07,
value: 0xC0,
},
RegOp::Write {
addr: 0x0D,
value: 0x87,
},
RegOp::Write {
addr: 0x0E,
value: 0x41,
},
RegOp::Write {
addr: 0x4C,
value: 0x00,
},
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0xE0,
value: 0x04,
},
RegOp::Write {
addr: 0xC0,
value: 0x32,
},
RegOp::Write {
addr: 0xC1,
value: 0x25,
},
RegOp::Write {
addr: 0x8C,
value: 0x00,
},
RegOp::Write {
addr: 0x51,
value: 0x64,
},
RegOp::Write {
addr: 0x52,
value: 0x4A,
},
RegOp::Write {
addr: 0x53,
value: 0x00,
},
RegOp::Write {
addr: 0x54,
value: 0x00,
},
RegOp::Write {
addr: 0x55,
value: 0x00,
},
RegOp::Write {
addr: 0x57,
value: 0x00,
},
RegOp::Write {
addr: 0x86,
value: 0x3D,
},
RegOp::Write {
addr: 0x50,
value: 0x80,
},
RegOp::Write {
addr: 0x00,
value: 0x00,
},
];
pub const SETTINGS_TO_SVGA: &[RegOp] = &[
RegOp::Write {
addr: 0xFF,
value: 0x01,
},
RegOp::Write {
addr: 0x12,
value: 0x40,
},
RegOp::Write {
addr: 0x03,
value: 0x0A,
},
RegOp::Write {
addr: 0x32,
value: 0x09,
},
RegOp::Write {
addr: 0x17,
value: 0x11,
},
RegOp::Write {
addr: 0x18,
value: 0x43,
},
RegOp::Write {
addr: 0x19,
value: 0x00,
},
RegOp::Write {
addr: 0x1A,
value: 0x4B,
},
RegOp::Write {
addr: 0x37,
value: 0xC0,
},
RegOp::Write {
addr: 0x4F,
value: 0xCA,
},
RegOp::Write {
addr: 0x50,
value: 0xA8,
},
RegOp::Write {
addr: 0x5A,
value: 0x23,
},
RegOp::Write {
addr: 0x6D,
value: 0x00,
},
RegOp::Write {
addr: 0x3D,
value: 0x38,
},
RegOp::Write {
addr: 0x39,
value: 0x92,
},
RegOp::Write {
addr: 0x35,
value: 0xDA,
},
RegOp::Write {
addr: 0x22,
value: 0x1A,
},
RegOp::Write {
addr: 0x37,
value: 0xC3,
},
RegOp::Write {
addr: 0x23,
value: 0x00,
},
RegOp::Write {
addr: 0x34,
value: 0xC0,
},
RegOp::Write {
addr: 0x06,
value: 0x88,
},
RegOp::Write {
addr: 0x07,
value: 0xC0,
},
RegOp::Write {
addr: 0x0D,
value: 0x87,
},
RegOp::Write {
addr: 0x0E,
value: 0x41,
},
RegOp::Write {
addr: 0x42,
value: 0x03,
},
RegOp::Write {
addr: 0x4C,
value: 0x00,
},
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0xE0,
value: 0x04,
},
RegOp::Write {
addr: 0xC0,
value: 0x64,
},
RegOp::Write {
addr: 0xC1,
value: 0x4B,
},
RegOp::Write {
addr: 0x8C,
value: 0x00,
},
RegOp::Write {
addr: 0x51,
value: 0xC8,
},
RegOp::Write {
addr: 0x52,
value: 0x96,
},
RegOp::Write {
addr: 0x53,
value: 0x00,
},
RegOp::Write {
addr: 0x54,
value: 0x00,
},
RegOp::Write {
addr: 0x55,
value: 0x00,
},
RegOp::Write {
addr: 0x57,
value: 0x00,
},
RegOp::Write {
addr: 0x86,
value: 0x3D,
},
RegOp::Write {
addr: 0x50,
value: 0x80,
},
RegOp::Write {
addr: 0x00,
value: 0x00,
},
];
pub const SETTINGS_TO_UXGA: &[RegOp] = &[
RegOp::Write {
addr: 0xFF,
value: 0x01,
},
RegOp::Write {
addr: 0x12,
value: 0x00,
},
RegOp::Write {
addr: 0x03,
value: 0x0F,
},
RegOp::Write {
addr: 0x32,
value: 0x36,
},
RegOp::Write {
addr: 0x17,
value: 0x11,
},
RegOp::Write {
addr: 0x18,
value: 0x75,
},
RegOp::Write {
addr: 0x19,
value: 0x01,
},
RegOp::Write {
addr: 0x1A,
value: 0x97,
},
RegOp::Write {
addr: 0x3D,
value: 0x34,
},
RegOp::Write {
addr: 0x4F,
value: 0xBB,
},
RegOp::Write {
addr: 0x50,
value: 0x9C,
},
RegOp::Write {
addr: 0x5A,
value: 0x57,
},
RegOp::Write {
addr: 0x6D,
value: 0x80,
},
RegOp::Write {
addr: 0x39,
value: 0x82,
},
RegOp::Write {
addr: 0x23,
value: 0x00,
},
RegOp::Write {
addr: 0x07,
value: 0xC0,
},
RegOp::Write {
addr: 0x4C,
value: 0x00,
},
RegOp::Write {
addr: 0x35,
value: 0x88,
},
RegOp::Write {
addr: 0x22,
value: 0x0A,
},
RegOp::Write {
addr: 0x37,
value: 0x40,
},
RegOp::Write {
addr: 0x34,
value: 0xA0,
},
RegOp::Write {
addr: 0x06,
value: 0x02,
},
RegOp::Write {
addr: 0x0D,
value: 0xB7,
},
RegOp::Write {
addr: 0x0E,
value: 0x01,
},
RegOp::Write {
addr: 0x42,
value: 0x83,
},
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0xE0,
value: 0x04,
},
RegOp::Write {
addr: 0xC0,
value: 0xC8,
},
RegOp::Write {
addr: 0xC1,
value: 0x96,
},
RegOp::Write {
addr: 0x8C,
value: 0x00,
},
RegOp::Write {
addr: 0x51,
value: 0x90,
},
RegOp::Write {
addr: 0x52,
value: 0x2C,
},
RegOp::Write {
addr: 0x53,
value: 0x00,
},
RegOp::Write {
addr: 0x54,
value: 0x00,
},
RegOp::Write {
addr: 0x55,
value: 0x88,
},
RegOp::Write {
addr: 0x57,
value: 0x00,
},
RegOp::Write {
addr: 0x86,
value: 0x3D,
},
RegOp::Write {
addr: 0x50,
value: 0x00,
},
RegOp::Write {
addr: 0x00,
value: 0x00,
},
];
pub const SETTINGS_JPEG3: &[RegOp] = &[
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0xE0,
value: 0x14,
},
RegOp::Write {
addr: 0xDA,
value: 0x12,
},
RegOp::Write {
addr: 0xD7,
value: 0x03,
},
RegOp::Write {
addr: 0xE1,
value: 0x77,
},
RegOp::Write {
addr: 0xE5,
value: 0x1F,
},
RegOp::Write {
addr: 0xD9,
value: 0x10,
},
RegOp::Write {
addr: 0xDF,
value: 0x80,
},
RegOp::Write {
addr: 0x33,
value: 0x80,
},
RegOp::Write {
addr: 0x3C,
value: 0x10,
},
RegOp::Write {
addr: 0xEB,
value: 0x30,
},
RegOp::Write {
addr: 0xDD,
value: 0x7F,
},
RegOp::Write {
addr: 0xE0,
value: 0x00,
},
RegOp::Write {
addr: 0x00,
value: 0x00,
},
];
pub const SETTINGS_YUV422: &[RegOp] = &[
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0xE0,
value: 0x04,
},
RegOp::Write {
addr: 0xDA,
value: 0x00,
},
RegOp::Write {
addr: 0xD7,
value: 0x01,
},
RegOp::Write {
addr: 0xE1,
value: 0x67,
},
RegOp::Write {
addr: 0xE0,
value: 0x00,
},
RegOp::Write {
addr: 0x00,
value: 0x00,
},
];
pub const SETTINGS_RGB565: &[RegOp] = &[
RegOp::Write {
addr: 0xFF,
value: 0x00,
},
RegOp::Write {
addr: 0xE0,
value: 0x04,
},
RegOp::Write {
addr: 0xDA,
value: 0x08,
},
RegOp::Write {
addr: 0xD7,
value: 0x03,
},
RegOp::Write {
addr: 0xE1,
value: 0x77,
},
RegOp::Write {
addr: 0xE0,
value: 0x00,
},
RegOp::Write {
addr: 0x00,
value: 0x00,
},
];