rustdv-sim 0.3.0

The cocotb-analog core: simulator-driven async executor, tasks, triggers, typed handles, clock, sim-aware queues (design-doc §4).
Documentation 
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//! Compatibility path for the original Verilator trace-control API.
//!
//! New testbenches should use [`crate::simulator_trace`]. The active simulator
//! supplies that API; Verilator's implementation still uses runtime-gated FST.

pub use crate::simulator_trace::{
    TraceError, TraceState, TraceStatus, flush, host_present, start, status, stop,
};