rust_play_digital/
common.rs

1use crate::output::DigitalState;
2use std::rc::Rc;
3
4#[allow(unused)]
5///All six provided structs implement Digital traits
6pub trait Digital {
7    fn get_output(&self) -> DigitalState;
8}
9#[allow(unused)]
10#[macro_export]
11///## EXAMPLE
12///```rust
13///
14/// use std::rc::Rc;
15/// use rust_play_digital::{generate_verify_digital_output_lines_trait, Digital, Digital1Line, DigitalState};
16///    //This structure represents a semi-adder logic circuit
17/// struct MyHalfAddElectric{
18///    //input_a and input_b of the MyHalfAddElectric structure are defined as being one line circuit each.
19///     input_a: Option<Rc<dyn Digital1Line>>,
20///     input_b: Option<Rc<dyn Digital1Line>>,
21///     input_a_states: DigitalState,
22///     input_b_states: DigitalState,
23///     output_states: DigitalState,
24///     times: usize,
25/// }
26/// impl Digital for MyHalfAddElectric{fn get_output(&self) -> DigitalState {
27///     self.output_states.clone()
28///     }
29/// }
30///  //The Digital2Line trait checks whether the output lines of MyHalfAddElectric is two line circuits
31///  //You can use the generated trait as a trait object type to constrain the input.
32/// generate_verify_digital_output_lines_trait!(Digital2Line,2);
33/// impl Digital2Line for MyHalfAddElectric{
34/// }
35///
36/// ```
37macro_rules! generate_verify_digital_output_lines_trait {
38    ($trait_name:ident,$line_count:expr) => {
39
40            pub trait $trait_name:Digital{
41                fn get_digital_output(&self) -> DigitalState{
42                    let ds = self.get_output();
43                    if ds.lines() !=  $line_count {
44                        panic!("{}",format!("digital output is {:?} expect {:?}",ds.lines(), $line_count ));
45                    }
46                    ds
47                }
48            }
49
50    };
51}
52generate_verify_digital_output_lines_trait!(Digital1Line,1);
53#[allow(unused)]
54///AND OR XOR, these three structures implement TwoInputDigital trait
55pub trait TwoInputDigital: Digital {
56    ///Recalculate the circuit status when setting the input circuit
57    fn set_input_a(&self, input_a: Option<Rc<dyn Digital1Line>>) -> Rc<Self>;
58    ///Recalculate the circuit status when setting the input circuit
59    fn set_input_b(&self, input_b: Option<Rc<dyn Digital1Line>>) -> Rc<Self>;
60}
61
62#[allow(unused)]
63///NOT structures implement OneInputElectric trait
64pub trait OneInputElectric: Digital {
65    ///Recalculate the circuit status when setting the input circuit
66    fn set_input(&self, input: Option<Rc<dyn Digital1Line>>) -> Rc<Self>;
67}