rucc_regalloc/assign.rs
1//! Which register each value lives in, and which values live on the stack instead.
2//!
3//! Design: `spec/10-backend.md` section 10.4.
4//!
5//! This is the `-O0` allocator's decision and nothing else. It is linear scan over the line
6//! [`crate::order`] lays the function out in: the values are taken in the order they are written,
7//! each is given a register that nothing else live at the same time is in, and when there is no
8//! such register one of the values in flight goes to the stack instead. There is no splitting and
9//! no coalescing, so a value gets one place for the whole of its range and keeps it. That produces
10//! mediocre code quickly, which is what `-O0` is for, and the allocator that produces good code
11//! slowly is a separate one, in M4.
12//!
13//! Which value is sent to the stack is the one whose range ends last, counting the value being
14//! placed among the candidates. A value wanted for a long time is the cheapest to spill per
15//! instruction it frees a register over, and it is the only heuristic here. What is picked is
16//! really a register and not a value, since two values that are never both wanted share one, and
17//! then every value in that register which is in this one's way goes.
18//!
19//! # Where the line is not the function
20//!
21//! The line is the order the blocks arrived in, and `crate::layout` puts them in a different one
22//! afterwards, so being between two blocks on the line says nothing about being between them in
23//! the code. A value live in one loop and live again in a later one is written down with
24//! everything in between inside the interval around it, and it is not live in any of it.
25//!
26//! Which is why what decides anything here is the area from `crate::live`, and the interval is
27//! only the sweep's bookkeeping: it says which values to compare and the areas say which of them
28//! actually collide. Three loops one after another in a function put a dozen values in flight at
29//! the same instant of the line and never at the same instant of the program, and asking the
30//! interval would spill the one this loop is walking for the sake of eleven values in the other
31//! two. tamnd/rucc#982.
32//!
33//! The same holds for a register an instruction insists on. A call destroys seven registers on
34//! x86-64, and a function whose blocks happen to arrive with a call written between the blocks of
35//! a loop would otherwise lose all seven for every value in that loop, for a call the loop never
36//! reaches, so that question is asked of the area and not of the interval either.
37//!
38//! Allowed is not the same as free, though, so the registers are offered in two passes. First the
39//! ones nothing insists on anywhere the range reaches, then the ones something insists on somewhere
40//! the value never goes. The second kind costs: the instruction that insists has to be handed the
41//! register in the end, and what hands it over is a move. A function that gives a value back has an
42//! operand fixed to `rax` at the end of it, and putting the busiest value in the function in `rax`
43//! because no path reaches the return with it live buys one register and pays a move at every
44//! return. Ordering the two passes is what keeps the register and drops the moves.
45//!
46//! The hint below is asked the first question rather than the second for the same reason. A value
47//! taking the register its own operand asked for saves a move, and taking one somebody else's
48//! operand asked for somewhere it never goes costs one, so a hint is worth following when the
49//! register is clear and not worth following when it is merely allowed.
50//!
51//! # What it does with a register an instruction insists on
52//!
53//! Two things. It stays out of that register for everybody else, and it tries that register first
54//! for the value the operand names. A division wants its dividend in `rax`, so `rax` is
55//! unavailable to every other value that is live where the division reads, and it is the first
56//! register offered to the dividend itself. When the dividend gets it there is no move on the way
57//! in, and when it does not the rewrite writes one and nothing else changes.
58//!
59//! That second half is the hint, and without it the register an instruction insists on is the one
60//! register the value in it can never have, since the value's own operand is what makes the
61//! register look busy. The effect is largest on returns, because a function that gives a value
62//! back has an operand fixed to `rax` at the end of it and most functions give a value back.
63//!
64//! What makes the hint safe is asking about the register at each of the instruction's two points
65//! rather than across the whole of it. An instruction reads at the first and writes at the second,
66//! so a register it insists on is one value's at the first, another value's at the second, and
67//! nobody else's at either. A division reads its dividend from `rax` and writes its quotient to
68//! `rax`, and those are different values that can both live there. A value passed to a call in
69//! `rdi` and wanted again afterwards cannot, because nothing writes `rdi` at the second point and
70//! a register the call does not write is a register the call is assumed to destroy.
71//!
72//! An operand that has to be in memory is the other way round. The value it names goes on the
73//! stack whatever else is true of it, because that is the only place the instruction could read it
74//! from.
75//!
76//! # What it does with a two address instruction
77//!
78//! An `add` on x86-64 writes one of the registers it reads, which the operand says as a reuse of
79//! another operand. The rewrite can always make that true by copying the source into the
80//! destination first, but only if the destination is a register the instruction does not otherwise
81//! read, so a value written by a reuse is treated here as live from where the instruction reads
82//! rather than from where it writes. Then the copy is always safe.
83//!
84//! The copy is also usually unnecessary, and the one place this looks past the interval it is
85//! placing is to see that: if the value being reused is read here for the last time and the value
86//! being written starts here, the second may have the first's register, and the instruction is
87//! already two address without anything being moved anywhere. That is the whole of the coalescing
88//! this allocator does, and it is worth the dozen lines, because otherwise every piece of
89//! arithmetic in the output carries a move in front of it.
90//!
91//! Both halves of that are needed. The second is the one a loop breaks: an instruction at the
92//! bottom of a loop can write a value the top of the loop reads on the next turn, and such a value
93//! is live on the way into the instruction that writes it as well as after. It is then wanted at
94//! the same time as the value it reuses, whatever is true of the reuse, and giving it the same
95//! register makes an addition read the answer to the last one instead of its own operand.
96//!
97//! # What it does not do
98//!
99//! It does not touch the function. What comes out is a table saying where each value went, and the
100//! pass that rewrites the operands and writes the moves reads it. Keeping the decision and the
101//! rewrite apart is what lets the decision be checked by looking at it, and it is the shape
102//! `spec/10-backend.md` section 10.4 asks for: an allocator is a function from a program to an
103//! assignment and the moves that make it true.
104
105use std::cmp::Reverse;
106
107use rucc_mir::{Constraint, Flags, Func, Inst, Operand, Reg, Role};
108use rucc_target::{PhysReg, RegClass};
109
110use crate::live::{Area, Live, Range};
111use crate::order::{Order, Point};
112
113/// Where a value lives.
114#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
115pub enum Place {
116 /// In a register, for the whole of its range.
117 Reg(PhysReg),
118 /// In a slot of the frame, which is what a value the allocator ran out of registers for gets,
119 /// and what a value an instruction can only read from memory gets.
120 Slot(u32),
121}
122
123/// What the allocator is allowed to use.
124///
125/// The order is the calling convention's, because which register to hand out first follows from
126/// which ones a call destroys, and `rucc-target` is where a convention says so. The scratch
127/// registers are held back out of the order and are what a spilled value is read into at each
128/// instruction that wants it, so a class needs as many of them as one of its instructions has
129/// register operands. Nothing here uses them, since a spilled value is only read once the rewrite
130/// is writing the instruction that reads it, but they are held back here because this is what
131/// decides what everything else may have.
132#[derive(Debug, Clone, Default)]
133pub struct Env {
134 classes: Vec<Class>,
135}
136
137/// What one class of registers offers.
138#[derive(Debug, Clone, Default)]
139struct Class {
140 order: Vec<PhysReg>,
141 scratch: Vec<PhysReg>,
142}
143
144impl Env {
145 /// An environment offering nothing, which is what a target that has said nothing offers.
146 #[must_use]
147 pub fn new() -> Self {
148 Self::default()
149 }
150
151 /// The same environment, with that class described.
152 #[must_use]
153 pub fn with(mut self, class: RegClass, order: &[PhysReg], scratch: &[PhysReg]) -> Self {
154 let index = usize::from(class.number());
155 if self.classes.len() <= index {
156 self.classes.resize(index + 1, Class::default());
157 }
158 self.classes[index] = Class { order: order.to_vec(), scratch: scratch.to_vec() };
159 self
160 }
161
162 /// The registers it may hand out in a class, in the order it prefers them.
163 #[must_use]
164 pub fn order(&self, class: RegClass) -> &[PhysReg] {
165 self.classes.get(usize::from(class.number())).map_or(&[], |class| &class.order)
166 }
167
168 /// The registers it may hand out, by class number, empty for a class it says nothing about.
169 pub(crate) fn offered(&self) -> impl Iterator<Item = &[PhysReg]> + '_ {
170 self.classes.iter().map(|class| class.order.as_slice())
171 }
172
173 /// The registers held back in a class for reading a spilled value into.
174 #[must_use]
175 pub fn scratch(&self, class: RegClass) -> &[PhysReg] {
176 self.classes.get(usize::from(class.number())).map_or(&[], |class| &class.scratch)
177 }
178}
179
180/// Where every value in a function went.
181#[derive(Debug, Clone)]
182pub struct Assignment {
183 places: Vec<Option<Place>>,
184 slots: Vec<RegClass>,
185 commuted: Vec<Inst>,
186}
187
188impl Assignment {
189 /// Records that the sources of `inst` are to be swapped, for an answer written over the second.
190 pub(crate) fn commute(&mut self, inst: Inst) {
191 self.commuted.push(inst);
192 }
193
194 /// An assignment that says nothing yet about a function with that many values.
195 ///
196 /// This and [`Assignment::put`] and [`Assignment::take_slot`] are how an allocator says what
197 /// it decided. There will be a second one in M4 and it will not reach its answer this way, so
198 /// what an assignment is has to be separable from how this file arrives at one, and the
199 /// checker in [`crate::check`] reads an assignment without caring which allocator wrote it.
200 #[must_use]
201 pub fn empty(vregs: usize) -> Self {
202 Self { places: vec![None; vregs], slots: Vec::new(), commuted: Vec::new() }
203 }
204
205 /// The two address instructions whose answer went into the register of their second source.
206 ///
207 /// Each has to have its two sources swapped before anything reads the assignment against the
208 /// function, which [`crate::run`] does. After that the answer reuses what is then the first
209 /// source, as every two address instruction does. tamnd/rucc#1895.
210 #[must_use]
211 pub fn commuted(&self) -> &[Inst] {
212 &self.commuted
213 }
214
215 /// Records where a value went.
216 ///
217 /// # Panics
218 ///
219 /// Panics on a physical register, which is somewhere already, and on a virtual one the
220 /// function never handed out.
221 pub fn put(&mut self, reg: Reg, place: Place) {
222 self.places[index(reg)] = Some(place);
223 }
224
225 /// Takes a slot of the frame, of that class, and gives back which one it is.
226 ///
227 /// # Panics
228 ///
229 /// Panics past four billion slots, which is a frame no machine has room for.
230 pub fn take_slot(&mut self, class: RegClass) -> u32 {
231 let slot = u32::try_from(self.slots.len()).expect("too many spilled values");
232 self.slots.push(class);
233 slot
234 }
235
236 /// Where a value lives, or `None` for a virtual register this function never mentions and for
237 /// a physical one, which is already where it is.
238 #[must_use]
239 pub fn place(&self, reg: Reg) -> Option<Place> {
240 self.places.get(usize::try_from(reg.number()?).ok()?).copied().flatten()
241 }
242
243 /// The class of each slot of the frame, which is what says how wide it has to be.
244 #[must_use]
245 pub fn slots(&self) -> &[RegClass] {
246 &self.slots
247 }
248
249 /// Every value that went somewhere, and where it went.
250 ///
251 /// The assignment read the other way round, which is what a caller wants when the question is
252 /// about the places rather than about the values. The stack slot allocator asks it that way,
253 /// since what it needs is which value is in each slot and the assignment is stored by value.
254 pub fn placed(&self) -> impl Iterator<Item = (Reg, Place)> + '_ {
255 self.places.iter().enumerate().filter_map(|(number, place)| {
256 let number = u32::try_from(number).ok()?;
257 Some((Reg::virtual_reg(number), (*place)?))
258 })
259 }
260
261 /// How many values went to the stack.
262 #[must_use]
263 pub fn spilled(&self) -> usize {
264 self.slots.len()
265 }
266
267 /// Puts a value on the stack, in a slot of its own.
268 pub(crate) fn spill(&mut self, reg: Reg, class: RegClass) {
269 let slot = self.take_slot(class);
270 self.put(reg, Place::Slot(slot));
271 }
272}
273
274/// One value waiting for a place.
275#[derive(Debug, Clone, Copy)]
276struct Interval<'a> {
277 reg: Reg,
278 class: RegClass,
279 /// The interval around the area, which is what the sweep below reads and what says which value
280 /// is wanted for longest when one of them has to go.
281 range: Range,
282 /// Everywhere the value is really live, which is what says whether two of them fit in one
283 /// register.
284 area: Area<'a>,
285}
286
287/// One value that has a register, for as long as it still wants it.
288#[derive(Debug, Clone, Copy)]
289struct Held<'a> {
290 reg: Reg,
291 class: RegClass,
292 range: Range,
293 area: Area<'a>,
294 at: PhysReg,
295 /// How many values were given a register before this one, which is the order the values in
296 /// flight are looked at in when one register has to be taken back.
297 since: usize,
298}
299
300/// The values that have a register, kept by the register each is in.
301///
302/// Nearly every question asked of them is about one register: whether it is free for an interval,
303/// or whether a value is still in it. They used to be one list walked from the start for every
304/// register tried, and on a function with a thousand values in flight that walk was most of the
305/// time the allocator took. Keeping them by register means asking about one reads only the values
306/// that are in it. Registers are numbered within their class, so two classes can share a list and
307/// the class is still checked.
308#[derive(Default)]
309struct Active<'a> {
310 by: Vec<Vec<Held<'a>>>,
311 /// How many values have been given a register so far.
312 count: usize,
313}
314
315impl<'a> Active<'a> {
316 /// The values in one register, in the order they were given it.
317 fn at(&self, at: PhysReg) -> &[Held<'a>] {
318 self.by.get(usize::from(at.number())).map_or(&[], Vec::as_slice)
319 }
320
321 fn push(&mut self, reg: Reg, class: RegClass, range: Range, area: Area<'a>, at: PhysReg) {
322 let slot = usize::from(at.number());
323 if self.by.len() <= slot {
324 self.by.resize_with(slot + 1, Vec::new);
325 }
326 self.by[slot].push(Held { reg, class, range, area, at, since: self.count });
327 self.count += 1;
328 }
329
330 /// Lets go of every value whose interval ends before a point.
331 fn expire(&mut self, point: Point) {
332 for held in &mut self.by {
333 held.retain(|held| held.range.end >= point);
334 }
335 }
336}
337
338/// A register an instruction insists on, and where it insists on it.
339#[derive(Debug, Clone, Copy)]
340struct Blocked {
341 class: RegClass,
342 at: PhysReg,
343 /// One of the instruction's two points. Every register an instruction insists on has an entry
344 /// at each of them, because a register held at one of the two is a register nothing else may
345 /// be in across the instruction.
346 point: Point,
347 /// The one value that may be in it there, which is the value of an operand the instruction
348 /// reads at that point or writes at it. `None` means nothing may: an operand naming a physical
349 /// register outright claims it against everything, and a point no operand covers is a point
350 /// the instruction has the register to itself at.
351 by: Option<Reg>,
352}
353
354/// A value written into the register another operand of the same instruction was read from.
355#[derive(Debug, Clone, Copy)]
356pub(crate) struct Reuse {
357 /// The value being read, which is the one whose register would do.
358 pub(crate) source: Reg,
359 /// The other value the instruction reads, when the instruction reads the two either way round
360 /// and so could write its answer over this one instead.
361 pub(crate) second: Option<Reg>,
362 /// Where the instruction reads it.
363 pub(crate) at: Point,
364 /// The instruction, which is swapped round if the answer takes the second value's register.
365 pub(crate) inst: Inst,
366}
367
368/// Decides where every value in a function lives.
369///
370/// # Panics
371///
372/// Panics if a class has no registers to hand out and something in the function is in that class,
373/// since that is a target description that does not describe the target the function is for.
374#[must_use]
375pub fn assign(func: &Func, order: &Order, live: &Live, env: &Env) -> Assignment {
376 let blocked = blocked(func, order);
377 let forced = forced(func);
378 let reuses = reuses(func, order);
379 let hints = hints(func);
380 let passed = passed(func);
381
382 let mut intervals = Vec::with_capacity(func.vregs());
383 for (number, reuse) in reuses.iter().enumerate() {
384 let reg = Reg::virtual_reg(u32::try_from(number).expect("a register number"));
385 let (Some(mut area), Some(class)) = (live.area(reg), func.class_of(reg)) else {
386 continue;
387 };
388 if let Some(reuse) = reuse {
389 area = area.with(reuse.at);
390 }
391 intervals.push(Interval { reg, class, range: area.hull(), area });
392 }
393 intervals.sort_by_key(|interval| (interval.range.start, interval.reg));
394
395 let mut assignment = Assignment::empty(func.vregs());
396 let mut active = Active::default();
397 for interval in intervals {
398 active.expire(interval.range.start);
399 if forced.contains(&interval.reg) {
400 assignment.spill(interval.reg, interval.class);
401 continue;
402 }
403 // A class with no order is one the target says nothing allocates from, which on x86-64 is
404 // the x87 stack. A value of such a class is a mistake at the point it was made rather than
405 // a value with nowhere to go: what the target means is that the value lives in memory and
406 // that whatever operates on it takes an address. See `ClassInfo::allocatable`.
407 assert!(
408 !env.order(interval.class).is_empty(),
409 "a value in class {}, which the target hands out no registers from",
410 interval.class.number()
411 );
412 let reuse = reuses[index(interval.reg)];
413 let coalesced = |source| coalesce(&assignment, &active, &blocked, live, interval, source);
414 let first = reuse.and_then(|reuse| coalesced(reuse.source));
415 let second = reuse.and_then(|reuse| reuse.second).and_then(coalesced);
416 // An instruction that reads its sources either way round can write over the second one
417 // instead, which is what it needs when the first is read again later and the second is
418 // not. When both would do, the first is kept unless only the second is where something
419 // wants the answer, which saves the move in front of that reader.
420 //
421 // A block the answer is passed to wants it where that block's parameter already is. That
422 // has to count as much as an instruction asking for a register. A sum a loop carries is
423 // passed back to the parameter it was read from, and taking the register of the other
424 // source because the sum is also printed at the end moves the copy onto the back edge,
425 // where it runs every turn instead of once.
426 let hinted_at = |at: Option<PhysReg>| {
427 at.is_some_and(|at| {
428 hints[index(interval.reg)].contains(&at)
429 || passed[index(interval.reg)]
430 .iter()
431 .any(|¶m| assignment.place(param) == Some(Place::Reg(at)))
432 })
433 };
434 let commute =
435 second.is_some() && (first.is_none() || hinted_at(second) && !hinted_at(first));
436 let two_address = if commute { second } else { first };
437 if let (true, Some(reuse)) = (commute, reuse) {
438 assignment.commuted.push(reuse.inst);
439 }
440 // The reuse comes first, because a two address instruction that has to copy its left
441 // operand in pays for the copy whatever the hint says, and taking the hint here would buy
442 // one move at the cost of another.
443 let hinted = hints[index(interval.reg)].iter().copied().find(|&at| {
444 env.order(interval.class).contains(&at)
445 && available(&active, &blocked, interval, at, None, Want::Clear)
446 });
447 // A register nobody else wants anywhere near this value first, and one somebody wants
448 // somewhere the value never goes only when there is no other. Both are correct and the
449 // second is the worse buy, since the instruction that wants it has to be handed it and
450 // whatever this value is doing there has to move out of the way first.
451 let scan = |want| {
452 env.order(interval.class)
453 .iter()
454 .copied()
455 .find(|&at| available(&active, &blocked, interval, at, None, want))
456 };
457 let chosen =
458 two_address.or(hinted).or_else(|| scan(Want::Clear)).or_else(|| scan(Want::Allowed));
459 match chosen {
460 Some(at) => {
461 assignment.places[index(interval.reg)] = Some(Place::Reg(at));
462 active.push(interval.reg, interval.class, interval.range, interval.area, at);
463 }
464 None => spill_one(&mut assignment, &mut active, &blocked, interval),
465 }
466 }
467 assignment
468}
469
470/// How much a register suits an interval.
471#[derive(Debug, Clone, Copy, PartialEq, Eq)]
472pub(crate) enum Want {
473 /// Nothing insists on it anywhere the range reaches, so taking it costs nobody anything.
474 Clear,
475 /// Something insists on it somewhere the range reaches and nowhere the value is live, so taking
476 /// it is allowed and may still cost: the instruction that insists wants the register for a
477 /// value of its own, and that value now has to be moved into it.
478 Allowed,
479}
480
481/// Every register every instruction in the function insists on, arranged to be asked about.
482///
483/// Built once and never changed afterwards, and there is only one question ever asked of it: of the
484/// constraints naming one register of one class, is there one at a point some interval covers. So
485/// the entries are ordered by the register they name and then by the point, and the question is a
486/// binary search for the start of the interval followed by a walk that stops at its end.
487///
488/// It used to be a flat list walked from one end for every candidate register of every interval,
489/// which is quadratic in the size of a function and is most of the compile on a large one. See
490/// tamnd/rucc#1003 for the profile that found it.
491pub(crate) struct Blocks {
492 /// The constraints, sorted by class, then by register, then by point.
493 all: Vec<Blocked>,
494}
495
496impl Blocks {
497 /// Whether an instruction insists on `at` where a value over `area` would be in its way: at any
498 /// point the value's range reaches when the register is wanted clear, and only at a point the
499 /// value is live at when it is merely wanted allowed. The value's own operands never count.
500 pub(crate) fn insists(
501 &self,
502 reg: Reg,
503 class: RegClass,
504 area: Area<'_>,
505 range: Range,
506 at: PhysReg,
507 want: Want,
508 ) -> bool {
509 self.over(class, at, range)
510 .any(|one| one.by != Some(reg) && (want == Want::Clear || area.covers(one.point)))
511 }
512
513 /// Every register an instruction takes for itself where no value may be in it, with the class
514 /// and the point, sorted by class, then by register, then by point.
515 pub(crate) fn taken(&self) -> impl Iterator<Item = (RegClass, PhysReg, Point)> + '_ {
516 self.all.iter().filter(|one| one.by.is_none()).map(|one| (one.class, one.at, one.point))
517 }
518
519 /// The constraints on one register of one class at the points an interval covers.
520 ///
521 /// Both ends of the walk come from the ordering rather than from a test, so what comes back is
522 /// exactly what the old `covers` call used to keep and in the same order.
523 fn over(
524 &self,
525 class: RegClass,
526 at: PhysReg,
527 range: Range,
528 ) -> impl Iterator<Item = &Blocked> + '_ {
529 let first = self
530 .all
531 .partition_point(|one| (one.class, one.at, one.point) < (class, at, range.start));
532 self.all[first..]
533 .iter()
534 .take_while(move |one| one.class == class && one.at == at && one.point <= range.end)
535 }
536}
537
538/// Whether a register is one this interval could have.
539///
540/// The exception is the value a reuse is coalescing with, which holds the register right up to the
541/// point the new value takes it over and is the one thing that may overlap.
542///
543/// The sweep only keeps a value in `active` while the interval around it reaches this one, so the
544/// areas still have to be compared: two values whose intervals cross can have holes that let them
545/// share a register anyway, which on a function with several loops in it is most of them.
546fn available(
547 active: &Active<'_>,
548 blocked: &Blocks,
549 interval: Interval<'_>,
550 at: PhysReg,
551 except: Option<Reg>,
552 want: Want,
553) -> bool {
554 let taken = active.at(at).iter().any(|held| {
555 held.class == interval.class
556 && Some(held.reg) != except
557 && held.area.overlaps(interval.area)
558 });
559 let insisted = blocked.over(interval.class, at, interval.range).any(|one| {
560 one.by != Some(interval.reg) && (want == Want::Clear || interval.area.covers(one.point))
561 });
562 !taken && !insisted
563}
564
565/// The register the value being reused is in, when the value being written is never live at the
566/// same time as it and the register is otherwise free.
567fn coalesce(
568 assignment: &Assignment,
569 active: &Active<'_>,
570 blocked: &Blocks,
571 live: &Live,
572 interval: Interval<'_>,
573 source: Reg,
574) -> Option<PhysReg> {
575 let Some(Place::Reg(at)) = assignment.place(source) else { return None };
576 active.at(at).iter().find(|held| held.reg == source)?;
577 // The two have to be apart everywhere, asked of the areas liveness worked out and without the
578 // point the reuse adds, since that point is the one they are allowed to share.
579 //
580 // That covers both ways it can go wrong. A value read again later needs its register after
581 // this instruction would have overwritten it. And a value being written that is live where the
582 // instruction reads already is what a loop carrying its own result round looks like: the
583 // instruction writes it at the bottom and the top of the loop reads what the last turn wrote.
584 // Either way the two are wanted at once, and no register holds both.
585 //
586 // It used to be asked of the end of the interval around the value being read, and that is not
587 // the same question. A block laid out after this instruction where the value is still live,
588 // such as the default arm of a `switch` that joins back in above it, stretches the interval
589 // past this point when nothing past it reads the value at all. The sum a loop carries round
590 // then went into a new register and was copied back at the bottom of every turn.
591 // tamnd/rucc#1965.
592 let free = available(active, blocked, interval, at, Some(source), Want::Allowed);
593 (apart(live, source, interval.reg) && free).then_some(at)
594}
595
596/// Whether two values are never live at the same time, going by what liveness worked out.
597pub(crate) fn apart(live: &Live, first: Reg, second: Reg) -> bool {
598 match (live.area(first), live.area(second)) {
599 (Some(first), Some(second)) => !first.overlaps(second),
600 _ => false,
601 }
602}
603
604/// Sends values to the stack to free a register: the ones wanted for longest, since a register
605/// held that long pays for itself over the most instructions.
606///
607/// What is chosen is a register rather than a value, because two values whose areas miss each
608/// other share one and taking it means every value in it this one is really on top of has to go.
609/// A register holding two of those costs twice as much to take as one holding a single value, so
610/// the cheap ones are looked at first and the reach only settles ties.
611fn spill_one<'a>(
612 assignment: &mut Assignment,
613 active: &mut Active<'a>,
614 blocked: &Blocks,
615 interval: Interval<'a>,
616) {
617 // What each register would cost: how many values would go, and the furthest any of them
618 // reaches. The list is one entry per register of the class, so walking it for each value in
619 // flight is the same shape as everything else here. The first number is when the earliest of
620 // them was given the register, and sorting by it puts the registers in the order the values
621 // were given them, which is what settles a tie.
622 let mut costs: Vec<(usize, PhysReg, usize, Point)> = Vec::new();
623 for held in active.by.iter().flatten() {
624 if held.class != interval.class || !held.area.overlaps(interval.area) {
625 continue;
626 }
627 match costs.iter_mut().find(|(_, at, _, _)| *at == held.at) {
628 Some((first, _, count, reach)) => {
629 *first = (*first).min(held.since);
630 *count += 1;
631 *reach = (*reach).max(held.range.end);
632 }
633 None => costs.push((held.since, held.at, 1, held.range.end)),
634 }
635 }
636 costs.sort_unstable_by_key(|&(first, _, _, _)| first);
637 // A register the instructions in the way insist on for themselves is no use, because taking it
638 // over would put this value in a register it may not have.
639 let none = Active::default();
640 let chosen = costs
641 .iter()
642 .filter(|&&(_, at, _, reach)| {
643 reach > interval.range.end
644 && available(&none, blocked, interval, at, None, Want::Allowed)
645 })
646 .min_by_key(|&&(_, _, count, reach)| (count, Reverse(reach)))
647 .map(|&(_, at, _, _)| at);
648 match chosen {
649 Some(at) => {
650 active.by[usize::from(at.number())].retain(|held| {
651 let goes = held.class == interval.class && held.area.overlaps(interval.area);
652 if goes {
653 assignment.spill(held.reg, held.class);
654 }
655 !goes
656 });
657 assignment.places[index(interval.reg)] = Some(Place::Reg(at));
658 active.push(interval.reg, interval.class, interval.range, interval.area, at);
659 }
660 None => assignment.spill(interval.reg, interval.class),
661 }
662}
663
664/// The registers the instructions insist on, and where.
665///
666/// A physical register an operand names outright counts the same way. Nothing before allocation
667/// writes one except an instruction that has to, and it has to for the length of that one
668/// instruction, which is the same statement a fixed constraint makes.
669pub(crate) fn blocked(func: &Func, order: &Order) -> Blocks {
670 let mut blocked = Vec::new();
671 let mut claimed: Vec<(RegClass, PhysReg)> = Vec::new();
672 for block in func.blocks() {
673 for inst in func.insts(block) {
674 let operands = &func[func[inst].operands];
675 claimed.clear();
676 for operand in operands {
677 if let Some(at) = insisted(operand) {
678 let key = (operand.class, at);
679 if !claimed.contains(&key) {
680 claimed.push(key);
681 }
682 }
683 }
684 for &(class, at) in &claimed {
685 // Both points, whether or not an operand is at them. A register an instruction
686 // reads and does not write is still gone by the time the instruction is done as far
687 // as anything here knows, which is what stops the value a call is passed in `rdi`
688 // from staying in `rdi` over the call.
689 for (point, role) in [(order.early(inst), Role::Use), (order.late(inst), Role::Def)]
690 {
691 let mut named = false;
692 for operand in operands {
693 let mine = insisted(operand) == Some(at) && operand.class == class;
694 if !mine || !(operand.role == role || operand.role == Role::EarlyDef) {
695 continue;
696 }
697 named = true;
698 let by = operand.reg.is_virtual().then_some(operand.reg);
699 blocked.push(Blocked { class, at, point, by });
700 }
701 // A register no operand names where the operands are read is one the
702 // instruction writes and does not read, which is what a clobber is, and the
703 // seven registers a call destroys are the whole of why that case is worth
704 // separating. Such a register is free right up to the point it is written, so a
705 // value whose last read is this instruction may sit in one: it is read before
706 // the instruction writes anything, the way any other operand is. Blocking it
707 // where the operands are read as well would take every caller saved register
708 // away from the value a call is passed, which is a value that dies at the call
709 // and pays for a callee saved register it holds for two instructions. Anything
710 // living past the instruction is still refused, by the block below.
711 //
712 // This is where a target's early definitions are paid for. An instruction that
713 // fills a register before it has finished reading has to say so, because that
714 // is the one thing a plain definition here no longer covers: a division on
715 // x86-64 is a sign extension and then the division itself, so `rdx` is gone
716 // before the divisor is read, and a divisor that went there would be read as
717 // the dividend's own sign bits. `rucc_target::x86_64` writes both of them down
718 // as early definitions for exactly that reason.
719 if !named && role == Role::Def {
720 blocked.push(Blocked { class, at, point, by: None });
721 }
722 }
723 }
724 }
725 }
726 // Program order already has the points ascending, but the registers one instruction claims are
727 // walked outside the two points rather than inside them, so the list arrives in order by
728 // instruction and not by register. A sort by the key the lookup searches on is what makes it
729 // searchable, and it is stable so two constraints on one register at one point keep the order
730 // the instruction wrote them in.
731 blocked.sort_by_key(|one: &Blocked| (one.class, one.at, one.point));
732 Blocks { all: blocked }
733}
734
735/// The register an operand has to be in, which is the one a constraint asks for or the one the
736/// operand names outright.
737fn insisted(operand: &Operand) -> Option<PhysReg> {
738 match operand.constraint {
739 Constraint::Fixed(at) => Some(at),
740 _ => operand.reg.phys(),
741 }
742}
743
744/// The registers each value would rather be in, which are the ones the operands naming it insist on.
745///
746/// In the order the function writes them down, so the definition comes first where there is one,
747/// since a value written into a fixed register and then moved somewhere else pays for the move at
748/// the top of its life rather than at the bottom. The ones after it are worth keeping for the same
749/// reason the first one is, and the value a call is passed is where that shows: its definition may
750/// insist on the register a parameter arrived in, which the call it is handed to has usually taken
751/// back for an argument of its own by then, and behind that is the register the convention passes
752/// it in, which is free and is exactly where the value wants to end up.
753pub(crate) fn hints(func: &Func) -> Vec<Vec<PhysReg>> {
754 let mut hints = vec![Vec::new(); func.vregs()];
755 for block in func.blocks() {
756 for inst in func.insts(block) {
757 for operand in &func[func[inst].operands] {
758 let Constraint::Fixed(at) = operand.constraint else { continue };
759 let number = operand.reg.number().and_then(|number| usize::try_from(number).ok());
760 let Some(number) = number else { continue };
761 let wanted: &mut Vec<PhysReg> = &mut hints[number];
762 if func.class_of(operand.reg) == Some(operand.class) && !wanted.contains(&at) {
763 wanted.push(at);
764 }
765 }
766 }
767 }
768 hints
769}
770
771/// The block parameters each value is passed to, by the virtual register passed.
772pub(crate) fn passed(func: &Func) -> Vec<Vec<Reg>> {
773 let mut passed = vec![Vec::new(); func.vregs()];
774 for block in func.blocks() {
775 for call in &func[block].succs {
776 for (&arg, param) in call.args.iter().zip(&func[call.block].params) {
777 let number = arg.number().and_then(|number| usize::try_from(number).ok());
778 let Some(number) = number else { continue };
779 let to: &mut Vec<Reg> = &mut passed[number];
780 if !to.contains(¶m.reg) {
781 to.push(param.reg);
782 }
783 }
784 }
785 }
786 passed
787}
788
789/// The values that have to be on the stack whatever else is true of them.
790pub(crate) fn forced(func: &Func) -> Vec<Reg> {
791 let mut forced = Vec::new();
792 for block in func.blocks() {
793 for inst in func.insts(block) {
794 for operand in &func[func[inst].operands] {
795 if operand.constraint == Constraint::Stack
796 && operand.reg.is_virtual()
797 && !forced.contains(&operand.reg)
798 {
799 forced.push(operand.reg);
800 }
801 }
802 }
803 }
804 forced
805}
806
807/// The value each two address instruction reuses, by the virtual register it writes.
808pub(crate) fn reuses(func: &Func, order: &Order) -> Vec<Option<Reuse>> {
809 let mut reuses = vec![None; func.vregs()];
810 for block in func.blocks() {
811 for inst in func.insts(block) {
812 let operands = &func[func[inst].operands];
813 for operand in operands {
814 let Constraint::Reuse(other) = operand.constraint else { continue };
815 let number = operand.reg.number().and_then(|number| usize::try_from(number).ok());
816 let Some(number) = number else { continue };
817 let source = operands[usize::from(other)].reg;
818 let second = if func[inst].flags.contains(Flags::COMMUTES) {
819 swappable(operands, usize::from(other))
820 } else {
821 None
822 };
823 reuses[number] = Some(Reuse { source, second, at: order.early(inst), inst });
824 }
825 }
826 }
827 reuses
828}
829
830/// The second source of an instruction that reads its two sources either way round, when the
831/// answer could go over it instead of over the first.
832///
833/// Only the shape of a two address instruction with two sources, the answer and then the two, with
834/// the answer reusing the first. The second has to be a value of the same class that asks for
835/// nothing more than a register, since after the swap it is the one the answer reuses.
836fn swappable(operands: &[Operand], other: usize) -> Option<Reg> {
837 let [answer, first, second] = operands else { return None };
838 let same = second.class == first.class && second.class == answer.class;
839 let plain = second.role == Role::Use && second.constraint == Constraint::Reg;
840 (other == 1 && same && plain && second.reg.is_virtual() && second.reg != first.reg)
841 .then_some(second.reg)
842}
843
844/// A virtual register's number as a table index.
845fn index(reg: Reg) -> usize {
846 usize::try_from(reg.number().expect("a virtual register")).expect("a register number")
847}
848
849#[cfg(test)]
850mod tests {
851 use rucc_base::Interner;
852 use rucc_mir::{BlockCall, Opcode, Operand, Param};
853 use rucc_target::x86_64::{GPR, R13, R14, R15, RAX, RCX, RDX, REGS, RSI, SYSV};
854
855 use super::*;
856
857 /// The x86-64 environment, with the last three of the allocation order held back as scratch.
858 fn env() -> Env {
859 let (order, scratch) = SYSV.int_order.split_at(SYSV.int_order.len() - 3);
860 Env::new().with(GPR, order, scratch)
861 }
862
863 /// An environment with that many general purpose registers, for putting a function under
864 /// pressure without writing a hundred instructions.
865 fn narrow(count: usize) -> Env {
866 Env::new().with(GPR, &SYSV.int_order[..count], &SYSV.int_order[count..count + 1])
867 }
868
869 /// What a place is called, which is what an assertion reads.
870 fn named(place: Option<Place>) -> String {
871 match place {
872 Some(Place::Reg(reg)) => REGS.name(GPR, reg).expect("a register").to_string(),
873 Some(Place::Slot(slot)) => format!("slot {slot}"),
874 None => "nowhere".to_string(),
875 }
876 }
877
878 /// Where every value in a function went.
879 fn places(func: &Func, env: &Env) -> Vec<String> {
880 let order = Order::of(func);
881 let live = Live::of(func, &order);
882 let assignment = assign(func, &order, &live, env);
883 (0..func.vregs())
884 .map(|number| {
885 let reg = Reg::virtual_reg(u32::try_from(number).expect("a register number"));
886 named(assignment.place(reg))
887 })
888 .collect()
889 }
890
891 #[test]
892 fn two_values_that_are_never_both_wanted_share_a_register() {
893 let mut names = Interner::new();
894 let mut func = Func::new(names.intern("f"));
895 let opcode = Opcode::new(names.intern("x64.nop"));
896 let block = func.create_block();
897 let first = func.new_vreg(GPR);
898 let second = func.new_vreg(GPR);
899 func.build(block, opcode).def(first, GPR).finish();
900 func.build(block, opcode).uses(first, GPR).finish();
901 func.build(block, opcode).def(second, GPR).finish();
902 func.build(block, opcode).uses(second, GPR).finish();
903
904 // The first register in the order, twice, because the first value is finished with before
905 // the second one is written.
906 assert_eq!(places(&func, &env()), ["rax", "rax"]);
907 }
908
909 #[test]
910 fn two_values_that_are_both_wanted_do_not() {
911 let mut names = Interner::new();
912 let mut func = Func::new(names.intern("f"));
913 let opcode = Opcode::new(names.intern("x64.nop"));
914 let block = func.create_block();
915 let first = func.new_vreg(GPR);
916 let second = func.new_vreg(GPR);
917 func.build(block, opcode).def(first, GPR).finish();
918 func.build(block, opcode).def(second, GPR).finish();
919 func.build(block, opcode).uses(first, GPR).finish();
920 func.build(block, opcode).uses(second, GPR).finish();
921
922 assert_eq!(places(&func, &env()), ["rax", "rcx"]);
923 }
924
925 #[test]
926 fn a_value_written_early_that_nothing_reads_still_holds_its_register() {
927 let mut names = Interner::new();
928 let mut func = Func::new(names.intern("f"));
929 let opcode = Opcode::new(names.intern("x64.nop"));
930 let block = func.create_block();
931 let wanted = func.new_vreg(GPR);
932 let spare = func.new_vreg(GPR);
933 // A division: a remainder somebody wants, and a quotient nobody does. Both are written by
934 // the one instruction and the quotient is written before the operands have been read.
935 func.build(block, opcode)
936 .def(wanted, GPR)
937 .operand(Operand::write_early(spare, GPR))
938 .finish();
939 func.build(block, opcode).uses(wanted, GPR).finish();
940
941 // Two registers, not one. A value nothing reads is still somewhere, and the instruction
942 // that wrote it wrote the other one too, so the two cannot be the same place. Handing them
943 // the same register loses the remainder, because the copy that takes the quotient out of
944 // the register the machine insisted on goes on top of it. The quotient gets the first
945 // register because it is written first, which is the whole of what early means.
946 assert_eq!(places(&func, &env()), ["rcx", "rax"]);
947 }
948
949 #[test]
950 fn the_value_wanted_longest_is_the_one_that_goes_to_the_stack() {
951 let mut names = Interner::new();
952 let mut func = Func::new(names.intern("f"));
953 let opcode = Opcode::new(names.intern("x64.nop"));
954 let block = func.create_block();
955 let long = func.new_vreg(GPR);
956 let short = func.new_vreg(GPR);
957 let third = func.new_vreg(GPR);
958 func.build(block, opcode).def(long, GPR).finish();
959 func.build(block, opcode).def(short, GPR).finish();
960 func.build(block, opcode).def(third, GPR).finish();
961 func.build(block, opcode).uses(short, GPR).finish();
962 func.build(block, opcode).uses(third, GPR).finish();
963 func.build(block, opcode).uses(long, GPR).finish();
964
965 // Two registers between three values. The one still wanted at the end of the function is
966 // the one whose register is worth the most to everybody else, so it is the one that goes.
967 assert_eq!(places(&func, &narrow(2)), ["slot 0", "rcx", "rax"]);
968 }
969
970 #[test]
971 fn a_register_an_instruction_insists_on_goes_to_the_values_that_asked_for_it() {
972 let mut names = Interner::new();
973 let mut func = Func::new(names.intern("f"));
974 let opcode = Opcode::new(names.intern("x64.nop"));
975 let block = func.create_block();
976 let across = func.new_vreg(GPR);
977 let dividend = func.new_vreg(GPR);
978 let quotient = func.new_vreg(GPR);
979 let remainder = func.new_vreg(GPR);
980 func.build(block, opcode).def(across, GPR).finish();
981 func.build(block, opcode).def(dividend, GPR).finish();
982 func.build(block, opcode)
983 .operand(Operand::write(quotient, GPR).with(Constraint::Fixed(RAX)))
984 .operand(Operand::write_early(remainder, GPR).with(Constraint::Fixed(RDX)))
985 .operand(Operand::read(dividend, GPR).with(Constraint::Fixed(RAX)))
986 .finish();
987 func.build(block, opcode).uses(across, GPR).finish();
988
989 // The value that has to be across the division is nowhere near `rax` or `rdx`, and each of
990 // the three the division names is in the register the division asked for it in. The
991 // dividend and the quotient share `rax` because the first is read where the second is
992 // written, which is what a division does.
993 assert_eq!(places(&func, &env()), ["rcx", "rax", "rax", "rdx"]);
994 }
995
996 /// A value read by an instruction that fills a register before it reads is kept out of that
997 /// register, even though the read is the last thing the value is wanted for.
998 ///
999 /// The divisor of a division is the case. What the machine runs is `cltd` and then `idivl`, so
1000 /// `rdx` holds the top half of the dividend by the time the divisor is read, and a divisor
1001 /// sitting in `rdx` is read as the dividend's own sign bits. An early definition is how the
1002 /// target says a register goes before the operands are read, and this is where the allocator
1003 /// has to hear it, since a value dying at an instruction is otherwise free to sit in a
1004 /// register that instruction writes. tamnd/rucc#1232.
1005 #[test]
1006 fn a_value_that_dies_at_an_instruction_stays_out_of_what_it_fills_first() {
1007 let mut names = Interner::new();
1008 let mut func = Func::new(names.intern("f"));
1009 let opcode = Opcode::new(names.intern("x64.nop"));
1010 let block = func.create_block();
1011 let across = func.new_vreg(GPR);
1012 let dividend = func.new_vreg(GPR);
1013 let divisor = func.new_vreg(GPR);
1014 let remainder = func.new_vreg(GPR);
1015 func.build(block, opcode).def(across, GPR).finish();
1016 func.build(block, opcode).def(dividend, GPR).finish();
1017 func.build(block, opcode).def(divisor, GPR).finish();
1018 func.build(block, opcode)
1019 .operand(Operand::write_early(remainder, GPR).with(Constraint::Fixed(RDX)))
1020 .operand(Operand::read(dividend, GPR).with(Constraint::Fixed(RAX)))
1021 .operand(Operand::read(divisor, GPR))
1022 .finish();
1023 func.build(block, opcode).uses(across, GPR).uses(remainder, GPR).finish();
1024
1025 // Four registers for four values, and the divisor takes the fourth. `rdx` is free
1026 // everywhere in this function except at the instruction that is about to fill it, which is
1027 // the one instruction the divisor is wanted at.
1028 assert_eq!(places(&func, &narrow(4)), ["rcx", "rax", "rsi", "rdx"]);
1029 }
1030
1031 #[test]
1032 fn a_value_wanted_after_the_instruction_that_insists_does_not_get_that_register() {
1033 let mut names = Interner::new();
1034 let mut func = Func::new(names.intern("f"));
1035 let opcode = Opcode::new(names.intern("x64.nop"));
1036 let block = func.create_block();
1037 let dividend = func.new_vreg(GPR);
1038 let quotient = func.new_vreg(GPR);
1039 func.build(block, opcode).def(dividend, GPR).finish();
1040 func.build(block, opcode)
1041 .operand(Operand::write(quotient, GPR).with(Constraint::Fixed(RAX)))
1042 .operand(Operand::read(dividend, GPR).with(Constraint::Fixed(RAX)))
1043 .finish();
1044 func.build(block, opcode).uses(dividend, GPR).finish();
1045
1046 // The hint is a preference and not a claim. The dividend would rather be in `rax` and
1047 // cannot be, because the division writes `rax` and the dividend is wanted afterwards, so
1048 // it takes the next register and the quotient keeps the one it was promised.
1049 assert_eq!(places(&func, &env()), ["rcx", "rax"]);
1050 }
1051
1052 #[test]
1053 fn a_value_an_instruction_can_only_read_from_memory_is_on_the_stack() {
1054 let mut names = Interner::new();
1055 let mut func = Func::new(names.intern("f"));
1056 let opcode = Opcode::new(names.intern("x64.nop"));
1057 let block = func.create_block();
1058 let value = func.new_vreg(GPR);
1059 func.build(block, opcode).def(value, GPR).finish();
1060 func.build(block, opcode)
1061 .operand(Operand::read(value, GPR).with(Constraint::Stack))
1062 .finish();
1063
1064 assert_eq!(places(&func, &env()), ["slot 0"]);
1065 }
1066
1067 #[test]
1068 fn a_two_address_instruction_writes_the_register_it_read_when_it_can() {
1069 let mut names = Interner::new();
1070 let mut func = Func::new(names.intern("f"));
1071 let opcode = Opcode::new(names.intern("x64.nop"));
1072 let block = func.create_block();
1073 let left = func.new_vreg(GPR);
1074 let right = func.new_vreg(GPR);
1075 let sum = func.new_vreg(GPR);
1076 func.build(block, opcode).def(left, GPR).finish();
1077 func.build(block, opcode).def(right, GPR).finish();
1078 func.build(block, opcode)
1079 .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1080 .uses(left, GPR)
1081 .uses(right, GPR)
1082 .finish();
1083 func.build(block, opcode).uses(right, GPR).finish();
1084
1085 // The addition reads the left value for the last time, so the answer goes where that was
1086 // and the instruction is two address without a move in front of it.
1087 assert_eq!(places(&func, &env()), ["rax", "rcx", "rax"]);
1088 }
1089
1090 #[test]
1091 fn a_two_address_instruction_that_cannot_gets_a_register_nothing_it_reads_is_in() {
1092 let mut names = Interner::new();
1093 let mut func = Func::new(names.intern("f"));
1094 let opcode = Opcode::new(names.intern("x64.nop"));
1095 let block = func.create_block();
1096 let left = func.new_vreg(GPR);
1097 let right = func.new_vreg(GPR);
1098 let sum = func.new_vreg(GPR);
1099 func.build(block, opcode).def(left, GPR).finish();
1100 func.build(block, opcode).def(right, GPR).finish();
1101 func.build(block, opcode)
1102 .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1103 .uses(left, GPR)
1104 .uses(right, GPR)
1105 .finish();
1106 func.build(block, opcode).uses(left, GPR).finish();
1107
1108 // The left value is wanted afterwards, so the answer cannot have its register. It cannot
1109 // have the right one's either, because the rewrite is about to write a move into it before
1110 // the addition has read anything.
1111 assert_eq!(places(&func, &env()), ["rax", "rcx", "rdx"]);
1112 }
1113
1114 #[test]
1115 fn an_answer_that_commutes_goes_over_the_source_that_is_finished_with() {
1116 let mut names = Interner::new();
1117 let mut func = Func::new(names.intern("f"));
1118 let opcode = Opcode::new(names.intern("x64.nop"));
1119 let block = func.create_block();
1120 let left = func.new_vreg(GPR);
1121 let right = func.new_vreg(GPR);
1122 let sum = func.new_vreg(GPR);
1123 func.build(block, opcode).def(left, GPR).finish();
1124 func.build(block, opcode).def(right, GPR).finish();
1125 let add = func
1126 .build(block, opcode)
1127 .flags(Flags::COMMUTES)
1128 .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1129 .uses(left, GPR)
1130 .uses(right, GPR)
1131 .finish();
1132 func.build(block, opcode).uses(left, GPR).uses(sum, GPR).finish();
1133
1134 // The same shape as the one above where the answer got a register of its own, except that
1135 // the addition reads its sources either way round, so the answer goes where the right one
1136 // was and the instruction is marked to be swapped.
1137 assert_eq!(places(&func, &env()), ["rax", "rcx", "rcx"]);
1138 let order = Order::of(&func);
1139 let live = Live::of(&func, &order);
1140 let assignment = assign(&func, &order, &live, &env());
1141 assert_eq!(assignment.commuted(), [add]);
1142
1143 // Once swapped, the instruction is an ordinary reuse of its first source, the checker and
1144 // the trace agree with it, and nothing has to be moved in front of it. The rewrite has put
1145 // the registers in by then, so the right one is `rcx` and the left one `rax`.
1146 let allocation = crate::run(&mut func, &env(), "f", true);
1147 assert!(allocation.edits.is_empty());
1148 let operands = &func[func[add].operands];
1149 let (first, second) = (operands[1].reg.phys(), operands[2].reg.phys());
1150 assert_eq!((first, second), (Some(RCX), Some(RAX)));
1151 }
1152
1153 #[test]
1154 fn an_answer_that_commutes_takes_the_source_something_after_it_wants() {
1155 let mut names = Interner::new();
1156 let mut func = Func::new(names.intern("f"));
1157 let opcode = Opcode::new(names.intern("x64.nop"));
1158 let block = func.create_block();
1159 let left = func.new_vreg(GPR);
1160 let right = func.new_vreg(GPR);
1161 let sum = func.new_vreg(GPR);
1162 func.build(block, opcode).def(left, GPR).finish();
1163 func.build(block, opcode)
1164 .operand(Operand::write(right, GPR).with(Constraint::Fixed(RAX)))
1165 .finish();
1166 let add = func
1167 .build(block, opcode)
1168 .flags(Flags::COMMUTES)
1169 .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1170 .uses(left, GPR)
1171 .uses(right, GPR)
1172 .finish();
1173 func.build(block, opcode)
1174 .operand(Operand::read(sum, GPR).with(Constraint::Fixed(RAX)))
1175 .finish();
1176
1177 // Both sources are finished with, so either register would do for the answer. The one
1178 // reading it wants it in `rax`, which is where the right one already is, so it goes there
1179 // and nothing is moved in front of that reader.
1180 let names = places(&func, &env());
1181 assert_eq!(names[2], "rax");
1182 assert_ne!(names[0], "rax");
1183 let allocation = crate::run(&mut func, &env(), "f", true);
1184 assert!(allocation.edits.is_empty());
1185 assert_eq!(func[func[add].operands][1].reg.phys(), Some(RAX));
1186 }
1187
1188 #[test]
1189 fn an_answer_that_commutes_stays_where_the_loop_passes_it() {
1190 let mut names = Interner::new();
1191 let mut func = Func::new(names.intern("f"));
1192 let opcode = Opcode::new(names.intern("x64.nop"));
1193 let entry = func.create_block();
1194 let head = func.create_block();
1195 let out = func.create_block();
1196 let seed = func.new_vreg(GPR);
1197 let total = func.new_vreg(GPR);
1198 let term = func.new_vreg(GPR);
1199 let next = func.new_vreg(GPR);
1200 func.build(entry, opcode).def(seed, GPR).finish();
1201 *func.succs_mut(entry) = vec![BlockCall::with(head, vec![seed])];
1202 func.params_mut(head).push(Param { reg: total, class: GPR });
1203 func.build(head, opcode).def(term, GPR).finish();
1204 let add = func
1205 .build(head, opcode)
1206 .flags(Flags::COMMUTES)
1207 .operand(Operand::write(next, GPR).with(Constraint::Reuse(1)))
1208 .uses(total, GPR)
1209 .uses(term, GPR)
1210 .finish();
1211 func.build(head, opcode)
1212 .operand(Operand::read(next, GPR).with(Constraint::Fixed(RSI)))
1213 .finish();
1214 *func.succs_mut(head) = vec![BlockCall::with(head, vec![next]), BlockCall::to(out)];
1215
1216 // Both sources are finished with and the sum is wanted in `rsi` as well, but the loop
1217 // passes it back to `total`, so it goes where `total` is and the back edge has nothing to
1218 // copy.
1219 let order = Order::of(&func);
1220 let live = Live::of(&func, &order);
1221 let assignment = assign(&func, &order, &live, &env());
1222 assert_eq!(assignment.place(next), assignment.place(total));
1223 assert!(!assignment.commuted().contains(&add));
1224 }
1225
1226 #[test]
1227 fn an_answer_that_does_not_commute_leaves_its_sources_where_they_are() {
1228 let mut names = Interner::new();
1229 let mut func = Func::new(names.intern("f"));
1230 let opcode = Opcode::new(names.intern("x64.nop"));
1231 let block = func.create_block();
1232 let left = func.new_vreg(GPR);
1233 let right = func.new_vreg(GPR);
1234 let sum = func.new_vreg(GPR);
1235 func.build(block, opcode).def(left, GPR).finish();
1236 func.build(block, opcode).def(right, GPR).finish();
1237 func.build(block, opcode)
1238 .flags(Flags::COMMUTES)
1239 .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1240 .uses(left, GPR)
1241 .uses(right, GPR)
1242 .finish();
1243 func.build(block, opcode).uses(right, GPR).finish();
1244
1245 // The left one is finished with, so the answer goes over it as it always did, and there is
1246 // nothing to swap.
1247 assert_eq!(places(&func, &env()), ["rax", "rcx", "rax"]);
1248 let order = Order::of(&func);
1249 let live = Live::of(&func, &order);
1250 assert!(assign(&func, &order, &live, &env()).commuted().is_empty());
1251 }
1252
1253 #[test]
1254 fn a_value_live_across_a_whole_loop_holds_its_register_over_all_of_it() {
1255 let mut names = Interner::new();
1256 let mut func = Func::new(names.intern("f"));
1257 let opcode = Opcode::new(names.intern("x64.nop"));
1258 let head = func.create_block();
1259 let body = func.create_block();
1260 let carried = func.new_vreg(GPR);
1261 let inside = func.new_vreg(GPR);
1262 func.build(head, opcode).def(carried, GPR).finish();
1263 *func.succs_mut(head) = vec![BlockCall::to(body)];
1264 func.build(body, opcode).def(inside, GPR).finish();
1265 func.build(body, opcode).uses(inside, GPR).uses(carried, GPR).finish();
1266 *func.succs_mut(body) = vec![BlockCall::to(body)];
1267
1268 // The value inside the loop cannot have the carried one's register, even though nothing
1269 // between the two definitions says so.
1270 assert_eq!(places(&func, &env()), ["rax", "rcx"]);
1271 }
1272
1273 #[test]
1274 fn a_two_address_answer_already_live_does_not_take_the_register_it_read() {
1275 let mut names = Interner::new();
1276 let mut func = Func::new(names.intern("f"));
1277 let opcode = Opcode::new(names.intern("x64.nop"));
1278 let head = func.create_block();
1279 let latch = func.create_block();
1280 let out = func.create_block();
1281 let source = func.new_vreg(GPR);
1282 let carried = func.new_vreg(GPR);
1283 func.build(head, opcode).def(source, GPR).finish();
1284 func.build(head, opcode).def(carried, GPR).finish();
1285 *func.succs_mut(head) = vec![BlockCall::to(latch)];
1286 // The bottom of the loop adds the source to the carried value and writes the answer back
1287 // over it, reusing the register the source is in. The next turn round redefines both.
1288 func.build(latch, opcode)
1289 .operand(Operand::write(carried, GPR).with(Constraint::Reuse(1)))
1290 .uses(source, GPR)
1291 .uses(carried, GPR)
1292 .finish();
1293 *func.succs_mut(latch) = vec![BlockCall::to(head), BlockCall::to(out)];
1294 func.build(out, opcode).uses(carried, GPR).finish();
1295
1296 // The source is read here for the last time, which on its own is the shape the two address
1297 // shortcut is for, and taking it would be wrong. The carried value was written by the same
1298 // instruction on the last turn and is read by this one, so the two are both wanted where
1299 // the instruction reads and one register cannot hold both.
1300 assert_eq!(places(&func, &env()), ["rax", "rcx"]);
1301
1302 // And the checker has to agree, since it excused this pair on the same reasoning and so
1303 // would have let the answer through.
1304 let order = Order::of(&func);
1305 let live = Live::of(&func, &order);
1306 let assignment = assign(&func, &order, &live, &env());
1307 assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1308 }
1309
1310 #[test]
1311 fn a_two_address_answer_with_a_hole_in_front_of_it_does_not_take_its_other_operand() {
1312 let mut names = Interner::new();
1313 let mut func = Func::new(names.intern("f"));
1314 let nop = Opcode::new(names.intern("x64.nop"));
1315 let add = Opcode::new(names.intern("x64.add"));
1316 let entry = func.create_block();
1317 let head = func.create_block();
1318 let arm = func.create_block();
1319 let latch = func.create_block();
1320 let out = func.create_block();
1321 let seed = func.new_vreg(GPR);
1322 let sum = func.new_vreg(GPR);
1323 let inside = func.new_vreg(GPR);
1324 let loaded = func.new_vreg(GPR);
1325 func.build(entry, nop).def(seed, GPR).finish();
1326 func.build(entry, nop).def(sum, GPR).finish();
1327 *func.succs_mut(entry) = vec![BlockCall::to(head)];
1328 func.build(head, nop).uses(sum, GPR).finish();
1329 *func.succs_mut(head) = vec![BlockCall::to(arm), BlockCall::to(latch)];
1330 func.build(arm, nop).def(inside, GPR).finish();
1331 func.build(arm, nop).uses(inside, GPR).finish();
1332 *func.succs_mut(arm) = vec![BlockCall::to(out)];
1333 func.build(latch, nop).def(loaded, GPR).finish();
1334 func.build(latch, add)
1335 .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1336 .uses(seed, GPR)
1337 .uses(loaded, GPR)
1338 .finish();
1339 *func.succs_mut(latch) = vec![BlockCall::to(head), BlockCall::to(out)];
1340
1341 // The answer is live in the entry and the head as well, and the arm between them is a hole
1342 // in it, so the piece the addition writes is not the first one. The value the addition reads
1343 // out of memory is still wanted where the addition reads, so it may not be in the register
1344 // the answer is about to be copied into, holes or no holes. tamnd/rucc#982.
1345 let places = places(&func, &env());
1346 assert_ne!(places[index(sum)], places[index(loaded)]);
1347
1348 let order = Order::of(&func);
1349 let live = Live::of(&func, &order);
1350 let assignment = assign(&func, &order, &live, &env());
1351 assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1352 }
1353
1354 #[test]
1355 fn a_sum_a_loop_carries_round_keeps_its_register_past_an_arm_laid_out_after_it() {
1356 let mut names = Interner::new();
1357 let mut func = Func::new(names.intern("f"));
1358 let nop = Opcode::new(names.intern("x64.nop"));
1359 let add = Opcode::new(names.intern("x64.add"));
1360 let entry = func.create_block();
1361 let head = func.create_block();
1362 let join = func.create_block();
1363 let arm = func.create_block();
1364 let out = func.create_block();
1365 let seed = func.new_vreg(GPR);
1366 let term = func.new_vreg(GPR);
1367 let next = func.new_vreg(GPR);
1368 func.build(entry, nop).def(seed, GPR).finish();
1369 *func.succs_mut(entry) = vec![BlockCall::with(head, vec![seed])];
1370 let total = func.append_param(head, GPR);
1371 func.build(head, nop).def(term, GPR).finish();
1372 *func.succs_mut(head) = vec![BlockCall::to(join), BlockCall::to(arm)];
1373 func.build(join, add)
1374 .operand(Operand::write(next, GPR).with(Constraint::Reuse(1)))
1375 .uses(total, GPR)
1376 .uses(term, GPR)
1377 .finish();
1378 *func.succs_mut(join) =
1379 vec![BlockCall::with(head, vec![next]), BlockCall::with(out, vec![next])];
1380 // The default arm of a `switch`, laid out after the addition it joins back in above. The
1381 // sum is live in it and nothing in it or after it reads the sum again.
1382 func.build(arm, nop).def(term, GPR).finish();
1383 *func.succs_mut(arm) = vec![BlockCall::to(join)];
1384 let result = func.append_param(out, GPR);
1385 func.build(out, nop).uses(result, GPR).finish();
1386
1387 // The addition reads the sum for the last time, so the new sum goes where the old one was
1388 // and the edge back to the top of the loop has nothing to move. tamnd/rucc#1965.
1389 let places = places(&func, &env());
1390 assert_eq!(places[index(next)], places[index(total)]);
1391
1392 let order = Order::of(&func);
1393 let live = Live::of(&func, &order);
1394 let assignment = assign(&func, &order, &live, &env());
1395 assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1396 }
1397
1398 /// Two blocks the entry chooses between, with the one the clobber is in written first. The two
1399 /// values written in the entry block are read in the other one, so their ranges cover the
1400 /// clobber whether or not either of them ever reaches it.
1401 fn arms(reaches: bool) -> Func {
1402 let mut names = Interner::new();
1403 let mut func = Func::new(names.intern("f"));
1404 let opcode = Opcode::new(names.intern("x64.nop"));
1405 let entry = func.create_block();
1406 let arm = func.create_block();
1407 let tail = func.create_block();
1408 let first = func.new_vreg(GPR);
1409 let second = func.new_vreg(GPR);
1410 func.build(entry, opcode).def(first, GPR).finish();
1411 func.build(entry, opcode).def(second, GPR).finish();
1412 *func.succs_mut(entry) = vec![BlockCall::to(arm), BlockCall::to(tail)];
1413 // What a call looks like here: an instruction writing the registers the convention says it
1414 // destroys, named outright so that nothing else may be in them.
1415 func.build(arm, opcode).operand(Operand::write(Reg::physical(RAX), GPR)).finish();
1416 *func.succs_mut(arm) = if reaches { vec![BlockCall::to(tail)] } else { Vec::new() };
1417 func.build(tail, opcode).uses(first, GPR).uses(second, GPR).finish();
1418 func
1419 }
1420
1421 #[test]
1422 fn a_register_a_clobber_takes_beats_the_stack_for_a_value_not_live_in_that_block() {
1423 let func = arms(false);
1424
1425 // Two registers between two values, and a clobber in the arm that takes the first of them.
1426 // The intervals around both values cover the clobber, since the arm is written between the
1427 // two blocks they are live in, and the arm is a hole in both of their areas. So the second
1428 // value has `rax` rather than a stack slot: the arm is a block its own path never goes
1429 // through. tamnd/rucc#982.
1430 assert_eq!(places(&func, &narrow(2)), ["rcx", "rax"]);
1431
1432 let order = Order::of(&func);
1433 let live = Live::of(&func, &order);
1434 let assignment = assign(&func, &order, &live, &narrow(2));
1435 assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1436 }
1437
1438 #[test]
1439 fn a_register_a_clobber_takes_is_not_free_to_a_value_that_is_live_there() {
1440 let func = arms(true);
1441
1442 // The same blocks with an edge from the arm to the tail, which is all it takes: both values
1443 // now arrive at the read either way, so the clobber is on a path they are live over and the
1444 // one register left has to do for both of them.
1445 assert_eq!(places(&func, &narrow(2)), ["rcx", "slot 0"]);
1446 }
1447
1448 /// A value and the instruction that destroys a register, written one after the other, with the
1449 /// value read by that instruction or by the one after it.
1450 fn dies_at_the_clobber(here: bool) -> Func {
1451 let mut names = Interner::new();
1452 let mut func = Func::new(names.intern("f"));
1453 let opcode = Opcode::new(names.intern("x64.nop"));
1454 let entry = func.create_block();
1455 let value = func.new_vreg(GPR);
1456 func.build(entry, opcode).def(value, GPR).finish();
1457 let call = func.build(entry, opcode).operand(Operand::write(Reg::physical(RAX), GPR));
1458 if here {
1459 call.uses(value, GPR).finish();
1460 } else {
1461 call.finish();
1462 func.build(entry, opcode).uses(value, GPR).finish();
1463 }
1464 func
1465 }
1466
1467 /// A value whose last read is the instruction that destroys a register may be in that register,
1468 /// because the instruction reads what it is handed before it writes anything.
1469 ///
1470 /// The call is what this is about, and the value a call is passed is the case: seven registers
1471 /// on this machine are destroyed by one, every argument dies at the call that reads it, and
1472 /// refusing all seven to those values left them taking a callee saved register for a life two
1473 /// instructions long and paying for it in the prologue and the epilogue. tamnd/rucc#1232.
1474 #[test]
1475 fn a_value_that_dies_where_a_register_is_destroyed_may_be_in_that_register() {
1476 let func = dies_at_the_clobber(true);
1477 assert_eq!(places(&func, &narrow(1)), ["rax"]);
1478
1479 let order = Order::of(&func);
1480 let live = Live::of(&func, &order);
1481 let assignment = assign(&func, &order, &live, &narrow(1));
1482 assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1483 }
1484
1485 /// And one read later than that is one the instruction really does destroy, which is the same
1486 /// function with the read moved down by one instruction.
1487 #[test]
1488 fn a_value_read_after_the_instruction_that_destroys_a_register_is_not_in_it() {
1489 let func = dies_at_the_clobber(false);
1490 assert_eq!(places(&func, &narrow(1)), ["slot 0"]);
1491 }
1492
1493 #[test]
1494 fn a_hint_is_followed_when_the_register_is_clear_and_not_when_it_is_merely_allowed() {
1495 let mut names = Interner::new();
1496 let mut func = Func::new(names.intern("f"));
1497 let opcode = Opcode::new(names.intern("x64.nop"));
1498 let entry = func.create_block();
1499 let mid = func.create_block();
1500 let tail = func.create_block();
1501 let first = func.new_vreg(GPR);
1502 let second = func.new_vreg(GPR);
1503 func.build(entry, opcode).def(first, GPR).finish();
1504 func.build(entry, opcode).def(second, GPR).finish();
1505 *func.succs_mut(entry) = vec![BlockCall::to(mid), BlockCall::to(tail)];
1506 // Two arms, each ending in an instruction that wants its own value in `rax`, which is what
1507 // a return out of either side of a branch looks like.
1508 func.build(mid, opcode)
1509 .operand(Operand::read(second, GPR).with(Constraint::Fixed(RAX)))
1510 .finish();
1511 func.build(tail, opcode)
1512 .operand(Operand::read(first, GPR).with(Constraint::Fixed(RAX)))
1513 .finish();
1514
1515 // The first value is hinted at `rax` and does not get it, because the other arm wants `rax`
1516 // for the other value and the first value's range reaches that far. Following the hint here
1517 // would save a move in the tail and cost one in the middle, and the second value gets `rax`
1518 // with nothing moved anywhere instead.
1519 assert_eq!(places(&func, &env()), ["rcx", "rax"]);
1520 }
1521
1522 #[test]
1523 fn a_value_living_in_a_hole_of_another_gets_the_same_register() {
1524 let mut names = Interner::new();
1525 let mut func = Func::new(names.intern("f"));
1526 let opcode = Opcode::new(names.intern("x64.nop"));
1527 let entry = func.create_block();
1528 let arm = func.create_block();
1529 let tail = func.create_block();
1530 let across = func.new_vreg(GPR);
1531 let inside = func.new_vreg(GPR);
1532 func.build(entry, opcode).def(across, GPR).finish();
1533 *func.succs_mut(entry) = vec![BlockCall::to(arm), BlockCall::to(tail)];
1534 func.build(arm, opcode).def(inside, GPR).finish();
1535 func.build(arm, opcode).uses(inside, GPR).finish();
1536 func.build(tail, opcode).uses(across, GPR).finish();
1537
1538 // One register between the two of them, and one register is enough. Nothing in the arm can
1539 // reach the read in the tail, so the value the arm makes is welcome to the register the
1540 // value crossing the function is in. The interval around that value covers the arm and the
1541 // value is nowhere near it, which is what used to send one of the two to the stack.
1542 // tamnd/rucc#982.
1543 assert_eq!(places(&func, &narrow(1)), ["rax", "rax"]);
1544
1545 let order = Order::of(&func);
1546 let live = Live::of(&func, &order);
1547 let assignment = assign(&func, &order, &live, &narrow(1));
1548 assert_eq!(assignment.spilled(), 0);
1549 assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1550 }
1551
1552 #[test]
1553 fn a_register_a_clobber_takes_is_the_last_one_offered_rather_than_the_first() {
1554 let func = arms(false);
1555
1556 // With a register to spare the value takes the spare one. Being allowed a register some
1557 // instruction insists on is not the same as it being free: the instruction has to be handed
1558 // it in the end, and what hands it over is a move.
1559 assert_eq!(places(&func, &narrow(3)), ["rcx", "rdx"]);
1560 }
1561
1562 #[test]
1563 fn a_frame_says_what_each_of_its_slots_is_for() {
1564 let mut names = Interner::new();
1565 let mut func = Func::new(names.intern("f"));
1566 let opcode = Opcode::new(names.intern("x64.nop"));
1567 let block = func.create_block();
1568 let first = func.new_vreg(GPR);
1569 let second = func.new_vreg(GPR);
1570 func.build(block, opcode).def(first, GPR).finish();
1571 func.build(block, opcode).def(second, GPR).finish();
1572 func.build(block, opcode).uses(first, GPR).uses(second, GPR).finish();
1573
1574 let order = Order::of(&func);
1575 let live = Live::of(&func, &order);
1576 let assignment = assign(&func, &order, &live, &narrow(1));
1577 assert_eq!(assignment.spilled(), 1);
1578 assert_eq!(assignment.slots(), [GPR]);
1579 // A register that is already a register is where it is, and this has nothing to say about
1580 // it.
1581 assert_eq!(assignment.place(Reg::physical(RCX)), None);
1582 assert_eq!(env().scratch(GPR), [R13, R14, R15]);
1583 }
1584}