Expand description
Instruction selection, scheduling, block layout, frames and prologue emission.
Design: spec/10-backend.md. Layer rank 11, see spec/18-package-layout.md.
§Status
The lowering tables are here. rules/x86-64.rules is compiled into a matching automaton when
this crate is built, and select is the walk over it: hand it a term and it gives back the
rule that fires and what the pattern bound. No lowering is written as match arms in this
crate and none ever will be, which is the settled decision spec/10-backend.md section 10.2
records.
The selector is here too. lower walks a function and builds machine IR out of what the
table gives back, and term is how an IR instruction is shown to the matcher. Between them
they cover the arithmetic the rule file covers, which is every integer operation at every
width the machine has one for. Nothing with an effect is covered, because no rule for one is
written yet.
frame is what a function’s stack looks like while it runs: which registers the prologue has
to put back, where every spilled value went, and how many bytes the stack pointer moves. It is
worked out after allocation because the largest area in most frames is the spill slots and
nothing knows how many of those there are until the allocator has finished running out of
registers.
What is not here yet is the prologues and the block layout. Both land in M3.
Every crate in the workspace is published, and publishing implies a promise. This one is
tier 3: its Rust API is explicitly unstable and will change without a major version bump.
Depend on the rucc binary’s behaviour, not on this.
Modules§
- frame
- The frame: what a function’s stack looks like while it runs.
- lower
- The selector: an IR function becomes a machine IR function.
- select
- Matching a target’s lowering rules against a term.
- term
- The IR as something a lowering rule can match against.
Constants§
- MILESTONE
- The milestone in
spec/17-milestones.mdthat fills this crate in.