rucc_codegen/lower.rs
1//! The selector: an IR function becomes a machine IR function.
2//!
3//! Design: `spec/10-backend.md` sections 10.2 and 10.3.
4//!
5//! What the matcher in [`crate::select`] does is answer one question about one term. What this
6//! does is ask it: walk a function, decide which terms are worth asking about, and build machine
7//! instructions out of what comes back. Nothing here decides what an IR term lowers to. That is
8//! in `rules/x86-64.rules` and it is proved before it is used, which is the whole point of the
9//! arrangement and the reason this file is short.
10//!
11//! # What it does with an instruction
12//!
13//! It tries the ways the instruction can be shown to the matcher, in order, and takes the first
14//! that a rule fires on. [`crate::term`] is what a way of showing one is, and the order is the
15//! most specific first: an operand that is a constant is offered as a constant before it is
16//! offered as a register, and an operand computed by an instruction of its own is offered as
17//! that instruction before it is offered as a register. A rule that wants an immediate too wide
18//! for the machine has a guard that turns it down, and the search carries on to the way of
19//! showing it that puts the constant in a register, which is the right answer and is one nobody
20//! had to write down.
21//!
22//! A constant is not lowered where it is written. It is materialized where a register for it is
23//! first wanted, which is what keeps a constant that every use folded into an immediate from
24//! leaving a dead instruction behind, and it also gives the value the shortest live range it
25//! could have. The instruction that materializes it comes from the rule set like everything else.
26//!
27//! # What it does not do yet
28//!
29//! Everything is in the general purpose registers, because every rule in the set is about an
30//! integer, so a call that passes a `double` and a function that returns one are both reported
31//! rather than lowered. So is an argument that travels on the stack, on either side of a call,
32//! and so is a call through an address rather than to a name.
33//!
34//! # A call
35//!
36//! Not a rule, because a rule pattern sees one term and what a call's operands are is whatever
37//! the signature made them. [`crate::abi`] builds one instead, out of the same description of the
38//! convention the arguments come from: the values it passes are reads constrained to the
39//! registers the convention places them in, what comes back is a write constrained to the
40//! register it comes back in, and every other register the callee is free to destroy is a write
41//! of that register and nothing else, which is all the allocator needs to keep a value out of it.
42//!
43//! What that costs the frame is an argument area, and nothing after selection could work out how
44//! big, so the size of the widest call is given back with the function. A function that makes no
45//! call at all is a leaf, and a leaf is the function that may use the red zone.
46//!
47//! # Where a block goes
48//!
49//! On the block, which is what machine IR does with an edge and is why the branches need no more
50//! rule language than the arithmetic did. A rule never names a block, so an unconditional jump
51//! has no rule at all and a conditional branch has one that is about its condition and nothing
52//! else. The arms are copied across after the block is filled, arguments and all, because an
53//! argument that is a constant is materialized where a register for it is first wanted and the
54//! end of the block is where an edge wants it.
55//!
56//! What this leaves behind is a function whose blocks are in the order the IR held them and whose
57//! branches are still branches on a register. Turning one into a `test` and a `jcc` is the block
58//! layout's, since which of the two arms falls through is the layout's answer, and [`crate::split`]
59//! has to run before allocation so that every edge carrying a value has somewhere to put it.
60//!
61//! A store and a return are the two things here that write no register. A store is emitted like
62//! everything else and the only difference is that there is no result to put anywhere, so the
63//! operands the target describes are all reads. A return is the same, and what it is for is its
64//! one operand: the target constrains it to the register the caller reads the value out of, and
65//! the allocator is what gets it there. The instruction that leaves is not chosen here at all,
66//! because the epilogue has to give the frame back first and [`crate::finish`] writes that after
67//! allocation, so a return of nothing is lowered to nothing.
68//!
69//! The entry block is the one block whose parameters are not block parameters here. They are the
70//! function's arguments, they are already somewhere when it starts, and [`crate::abi`] is what
71//! says where. An argument that arrives on the stack is reported rather than read, because where
72//! the stack put it is a distance into a frame and no frame exists until after allocation.
73//!
74//! Blocks are walked in the order the function holds them and a value is expected to be defined
75//! before it is used, which is true of the IR this is given because every pass before it keeps
76//! definitions ahead of uses.
77
78use std::collections::{HashMap, HashSet};
79use std::fmt;
80
81use rucc_base::{Interner, Symbol};
82use rucc_diag::Span;
83use rucc_ir::{
84 Abi, AsmOperand, AsmOperands, AttrSet, Block, Def, Extra, Flags, FloatPred, Func, Inst,
85 Linkage, MemOrder, Opcode, Param, PrefetchHint, RmwOp, Type, Value, Visibility,
86};
87use rucc_mir as mir;
88use rucc_target::template::{template_name, template_reg};
89use rucc_target::{
90 Address, CallRegs, Constraint, OperandDesc, PhysReg, RegClass, Role, VaList, Variadic,
91};
92use rucc_target::{aarch64, x86_64};
93
94use crate::abi::{self, Missing, Refused};
95use crate::coverage::Fired;
96use crate::elsewhere::Elsewhere;
97use crate::frame::{Layout, Local};
98use crate::select::{Match, Piece, Pointer, Reach, Rule, Selector};
99use crate::term::{MAX_ARGS, PLAIN, Plan, Shown, Term, Terms};
100use crate::varargs;
101
102/// The instruction a template's `jmp` to a name outside it becomes.
103///
104/// Not in [`x86_64::FRAME`] with the other opcodes this file names, because a frame never writes
105/// one: the only function it appears in has no prologue and no epilogue for the frame to write
106/// anything into.
107/// See [`x86_64::Step::Away`].
108const AWAY: &str = "jmp_away";
109
110/// How wide an address is on this target, which is the width a cast between a pointer and an
111/// integer has to be at for the cast to be nothing.
112const ADDRESS_BITS: u32 = 64;
113
114/// How much of a register an operand of an `asm` statement fills, which is the width of its type
115/// with two exceptions. A pointer is an address, and a truth value is the byte it is stored in: a
116/// program that writes `sete %0` into a `_Bool` is asking for exactly that byte, which is what tcc's
117/// own test of the width of one checks.
118fn held_bits(ty: Type) -> u32 {
119 if ty.is_ptr() {
120 ADDRESS_BITS
121 } else if ty.bits() == 1 {
122 8
123 } else {
124 ty.bits()
125 }
126}
127
128/// How many bytes a `long double` takes in memory, and what it is aligned to, which are the same
129/// number and are both more than the ten bytes that mean anything.
130///
131/// The psABI's answer rather than a choice here. `sizeof (long double)` is sixteen on this
132/// machine, so an array of them is laid out this way whatever a slot holding one does, and a slot
133/// that agreed with the array is one fewer thing to get wrong.
134const X87_BYTES: u32 = 16;
135
136/// How many values the x87 stack holds at once.
137///
138/// Eight, which is the machine's number rather than a choice here, and it matters in one place:
139/// the parameters of a block are copied through the stack so that they all move at once, and a
140/// block with more of them than this has nowhere to put the ninth.
141const X87_DEPTH: usize = 8;
142
143/// How far into the buffer of a `__builtin_setjmp` each of the four words it writes is.
144///
145/// The first three are gcc's, measured against gcc 16.2.0 on x86-64 at `-O0`: the frame pointer,
146/// the address control comes back to, and the stack pointer, in that order. The fourth is this
147/// compiler's own. gcc has no word for the answer because it writes a second block that sets the
148/// answer to one and is arrived at from the restore, and this writes the answer through memory
149/// instead, for the reason [`Lowering::saves_place`] gives.
150///
151/// None of the four is an interface. The buffer is the program's memory and its five words are
152/// the front end's promise about how much of it there is, but nothing except the matching restore
153/// ever reads a word of it, and a buffer written by one compiler was never going to be one another
154/// compiler could come back through.
155const JUMP_FRAME: i32 = 0;
156
157/// Where the address control comes back to is. See [`JUMP_FRAME`].
158const JUMP_PC: i32 = 8;
159
160/// Where the stack pointer is. See [`JUMP_FRAME`].
161const JUMP_STACK: i32 = 16;
162
163/// Where the address of the word the answer arrives in is. See [`JUMP_FRAME`].
164const JUMP_ANSWER: i32 = 24;
165
166/// How many bytes the word a `__builtin_setjmp` answers with takes in the frame, and what it is
167/// aligned to, which are the same number because it is one machine word.
168const JUMP_WORD: u32 = 8;
169
170/// How many registers the restore needs to hold things in while it puts the frame back.
171///
172/// Four, and every one of them is a register nothing else in the function may be in, which is why
173/// they are counted here rather than asked for one at a time. See [`Lowering::comes_back`].
174const JUMP_REGS: usize = 4;
175
176/// How many bytes a value passes through on its way between a register and the x87 stack.
177///
178/// Eight, because the widest thing that crosses is a `double` or a sixty four bit integer, and
179/// nothing crosses at eighty bits: a value that wide is already in the frame and the stack reaches
180/// it where it is.
181const X87_CROSSING: u32 = 8;
182
183/// Where the rounding field of the x87 control word is and what it has to be set to for the unit
184/// to cut towards zero, which is the one rounding C asks for that the unit does not do by default.
185///
186/// Both bits on is truncate. The field is ORed into the word that was already there rather than
187/// written over it, so the precision control and the exception masks somebody else set stay set.
188const X87_TRUNCATE: i64 = 0x0c00;
189
190/// Whether a type is the one this machine has no register for.
191///
192/// Only the eighty bit float is, and that is a fact about x86-64 rather than about floats: every
193/// other scalar the front end produces is in a general purpose register or a vector one, and this
194/// one is on the x87 stack while it is being worked on and in memory the rest of the time. So it
195/// has no place in [`Lowering::class_of`] and no name in [`crate::term`], and every instruction
196/// that touches one is written out by hand in this file.
197fn on_x87(ty: Type) -> bool {
198 ty.is_scalar() && ty.is_float() && ty.bits() == 80
199}
200
201/// Where one operand of an assembly statement is, on each side of the assembly.
202///
203/// Two registers rather than one, because an operand written `+` is a value that arrives and a
204/// value that leaves and those are two values. The machine IR has one definition per register by
205/// construction, so an instruction of the template that reads the operand and writes it has to name
206/// a different register in each place, and what makes the two one register in the end is the
207/// [`Constraint::Reuse`] the instruction's description carries: the allocator reads it, gives both
208/// the same physical register, and copies the incoming value somewhere first when something else is
209/// still using it.
210///
211/// Most operands have one of the two. An input has only a place it is read from and an output
212/// written `=` has only a place it is written to, and asking either of them for the other is an
213/// operand read where the opcode writes or written where it reads, which [`Lowering::placed`]
214/// refuses.
215#[derive(Debug, Clone, Copy, Default, PartialEq, Eq)]
216struct Place {
217 /// The register the value arrives in, for an operand something reads.
218 read: Option<mir::Reg>,
219 /// The register the value leaves in, for an operand something writes.
220 write: Option<mir::Reg>,
221}
222
223/// Whether that operand of the statement is one the assembly may read, and so where a read of it
224/// gets its value from.
225///
226/// [`bound`] asks this question of an operand a constraint letter named and this asks it of one the
227/// template numbered, which is the same question twice because a two-address instruction reaches
228/// its first source both ways. `mulq %3` reaches `rax` by the letter on the output and libgmp says
229/// what is in it with `"%0"` on an input. `addq %5,%q1` reaches its first source by numbering the
230/// output, and libgmp says what is in it with `"0"` on an input in the same way.
231///
232/// So an output written `=` has no value of its own and is still readable when an input is tied to
233/// it, and the value the read wants is that input's. An output written `+` carries its own value
234/// and answers with that. An output nothing is tied to answers `None`, which is a program that told
235/// the compiler the assembly only writes the operand while the instruction reads it before it
236/// writes it, and is refused where it is asked.
237fn read_as(list: &[AsmOperand<'_>], index: usize) -> Option<Value> {
238 let operand = list.get(index)?;
239 if operand.value.is_some() {
240 return operand.value;
241 }
242 operand.result?;
243 list.iter().find(|entry| entry.tied == Some(index)).and_then(|entry| entry.value)
244}
245
246/// Which of an assembly statement's operands is in that register, for an instruction that reaches
247/// the register without its text saying so.
248///
249/// The constraint is what says so, and it is the only thing in such a statement that could:
250/// `"=a"` is an output in `rax`, `"c"` is an input in `rcx`, an operand that is a local register
251/// variable is in the register its declaration named, and a register nothing names is a register
252/// nobody has said anything about. So a write looks among the outputs and a read among the inputs,
253/// and an output written `+` answers for either, since it is read before it is written. See
254/// [`pinned`], which is the one question asked of both ways of saying it.
255///
256/// The other way a read of such a register is said is a matching constraint. `"=a"` on an output
257/// and `"0"` on an input is the program saying that one register holds the input on the way in and
258/// the output on the way out, and it is how a statement fills a register the instruction reads and
259/// writes without writing the register down twice. The letter is on the output, which has no value
260/// to read, and the value is on the input, which has no letter, and the answer is the output: its
261/// place is read out of the register the input arrived in, and in a template with a loop in it the
262/// place moves on to wherever the last write left it, which is what a read on the next time round
263/// wants. tcc steps a pointer along a string with `lodsb` and `"=&S"` tied to `"0"`, and a read of
264/// the input would start the string again every time round.
265///
266/// And a read of a register an output alone is in is a read of that output, the same as a read of
267/// an output the template numbered. tcc copies a string with `lodsb` and `stosb` and `"=&a"` on an
268/// output nothing is tied to, and what `stosb` stores is what `lodsb` loaded one line up, which is
269/// the output as the template left it rather than anything the statement handed in.
270///
271/// `None` is a register the instruction uses and the statement put nothing in, which is the usual
272/// answer rather than an unusual one. `cpuid` writes four registers and a program that wanted one
273/// of them names one. See [`Lowering::spare`], which is where that one goes.
274fn bound(list: &[AsmOperand<'_>], reg: PhysReg, role: Role) -> Option<usize> {
275 let output =
276 list.iter().position(|operand| operand.result.is_some() && pinned(operand) == Some(reg));
277 if role.is_def() {
278 return output;
279 }
280 // The output first when something is in it on the way in, which is what `+` and a matching
281 // constraint both say, since its place is where a write earlier in the template left it and
282 // the read wants that. See [`read_as`] for what it holds before anything wrote it.
283 let arrives = |at: usize| read_as(list, at).is_some();
284 if let Some(at) = output.filter(|&at| arrives(at)) {
285 return Some(at);
286 }
287 let named = list.iter().position(|operand| {
288 operand.result.is_none() && operand.value.is_some() && pinned(operand) == Some(reg)
289 });
290 named.or(output)
291}
292
293/// The register one of an assembly statement's operands is in, whichever of the two ways said it.
294///
295/// A constraint letter is one way and is the only way a program can say one of the six registers
296/// that have a letter. A local register variable is the other, and it is the only way to say any
297/// of the rest: there is no letter for `r12`, which is the whole reason the extension exists, so
298/// the declaration says it and the front end wrote the name into the constraint. The name is read
299/// against this machine's table here, the same place the letter is read against it, and a name the
300/// machine has not got answers nothing, which leaves the operand where an operand nobody placed
301/// goes.
302///
303/// The sigil gcc allows in front of a name is taken off here, because what a name is written with
304/// is syntax and which register it means is this question.
305fn pinned(operand: &AsmOperand<'_>) -> Option<PhysReg> {
306 match operand.named {
307 Some(name) => {
308 let (reg, _) = x86_64::gpr_named(name.strip_prefix('%').unwrap_or(name))?;
309 Some(reg)
310 }
311 None => operand.fixed.and_then(x86_64::gpr_letter),
312 }
313}
314
315/// Whether a constraint says nothing but what it says on every machine.
316///
317/// [`AsmOperands::read`] gives the x86 meaning to every letter it knows, and most of the letters
318/// mean something else on AArch64: `Q` is an address in one register there rather than one of four
319/// registers, and `a` to `d` name nothing. So an AArch64 statement is taken only with the letters
320/// the two agree on, which are a register, a constant, memory, the immediate ranges and a matching
321/// number, and anything else is refused rather than read as x86. `w` is the one exception: it is a
322/// register on both, and which file it is in is decided by the caller with [`vector_letter`]. A
323/// register the front end named in braces is read against AArch64's own names, so what is inside
324/// them is not a letter.
325fn shared_letters(constraint: &str) -> bool {
326 let mut inside = false;
327 constraint.chars().all(|c| match c {
328 '{' => {
329 inside = true;
330 true
331 }
332 '}' => {
333 inside = false;
334 true
335 }
336 _ if inside => true,
337 _ => matches!(
338 c,
339 '=' | '+' | '&' | '%' | 'r' | 'w' | 'm' | 'o' | 'V' | 'g' | 'X' | 'i' | 'n' | 'p'
340 | 'I'..='N' | '0'..='9'
341 ),
342 })
343}
344
345/// Whether an AArch64 constraint asks for a floating point or vector register, which is what `w`
346/// means there. A register named in braces is not a letter, so a `w` inside one is not read.
347fn vector_letter(constraint: &str) -> bool {
348 let mut inside = false;
349 constraint.chars().any(|c| {
350 match c {
351 '{' => inside = true,
352 '}' => inside = false,
353 _ => {}
354 }
355 !inside && c == 'w'
356 })
357}
358
359/// Whether a line of a template names, by number, an operand `wanted` says yes to.
360///
361/// `%%` is a percent sign rather than an operand, and a modifier letter may stand between the sign
362/// and the number.
363fn names_one(line: &str, wanted: impl Fn(usize) -> bool) -> bool {
364 let mut rest = line;
365 while let Some(at) = rest.find('%') {
366 let after = &rest[at + 1..];
367 if let Some(escaped) = after.strip_prefix('%') {
368 rest = escaped;
369 continue;
370 }
371 let after = after.strip_prefix(|c: char| c.is_ascii_alphabetic()).unwrap_or(after);
372 let digits = after.len() - after.trim_start_matches(|c: char| c.is_ascii_digit()).len();
373 if after[..digits].parse().is_ok_and(&wanted) {
374 return true;
375 }
376 rest = &after[digits..];
377 }
378 false
379}
380
381/// Why a function could not be lowered.
382///
383/// One reason and then nothing. A function with no rule for something in it is a function this
384/// cannot finish, and the second thing it could not lower is not news.
385#[derive(Debug, Clone, PartialEq, Eq)]
386pub enum Unsupported {
387 /// An instruction no rule fires on.
388 Inst {
389 /// The instruction that stopped it.
390 inst: Inst,
391 /// What the rule file would call it, or nothing if the rule language has no name for it
392 /// at all, which is what an instruction at a width nothing is written about looks like.
393 term: Option<&'static str>,
394 /// The opcode, which is what gets named when the rule language has no word for it.
395 ///
396 /// An opcode the rule language has no word for is exactly the opcode no rule lowers, so
397 /// without this the message would be empty in every case where somebody needs it.
398 opcode: Opcode,
399 /// What it produces, or nothing for an instruction that is only an effect.
400 ty: Option<Type>,
401 },
402 /// A parameter that does not arrive somewhere this can bring it in from.
403 ///
404 /// Not an instruction, which is why it is a separate arm: it is a fact about the signature
405 /// and there is nothing in the body of the function to point at.
406 Argument {
407 /// Its position in the signature.
408 index: usize,
409 /// What is wrong with where it arrives.
410 missing: Missing,
411 },
412 /// A call that passes or gives back a value this cannot put where the convention wants it.
413 Call {
414 /// The call.
415 inst: Inst,
416 /// Which value, and what is wrong with where it travels.
417 refused: Refused,
418 },
419 /// A `return` this cannot put where the convention wants it.
420 ///
421 /// A separate arm from [`Unsupported::Inst`] because it is not an instruction no rule fires
422 /// on. A return of more than one value is built from the convention rather than matched, the
423 /// same way a call is, so what goes wrong with one is what goes wrong with a call and not the
424 /// absence of a rule.
425 Returned {
426 /// The `return`.
427 inst: Inst,
428 /// What is wrong with where one of the values travels.
429 missing: Missing,
430 },
431 /// A stack slot the frame cannot give the bytes it asked for.
432 ///
433 /// Not an instruction no rule covers. An `alloca` is built here rather than matched, so what
434 /// goes wrong with one is what the frame can and cannot hold rather than what the rules spell.
435 Dynamic {
436 /// The `alloca`.
437 inst: Inst,
438 /// What the frame could not do about it.
439 growing: Growing,
440 },
441 /// More parameters of a type that travels on the x87 stack than the stack is deep.
442 ///
443 /// Not an instruction either, for the reason a function's parameter is not one: it is a fact
444 /// about the block and there is nothing in the block to point at. What crosses an edge for one
445 /// of these is the address of where the value is, and the block copies the bytes into a slot
446 /// of its own, all of them through the stack at once so that a block carrying two of them
447 /// swapped is copied in an order that is right. Eight is as many as the stack holds, and a
448 /// ninth would have to be copied before or after the rest, which is the order that could be
449 /// wrong.
450 Phi {
451 /// Which block it arrives at.
452 block: Block,
453 /// How many of them arrive there, which is the whole of what is wrong.
454 count: usize,
455 /// What they are.
456 ty: Type,
457 },
458 /// An `asm` statement this cannot build.
459 ///
460 /// Not an instruction no rule fires on, for the reason a call is not one: what it stands for is
461 /// whatever its template says, and no pattern over terms can read a string.
462 Assembly {
463 /// The `inline_asm`.
464 inst: Inst,
465 /// What about it is not built here yet.
466 refused: Written,
467 },
468 /// A `register long x asm ("...")` naming something this machine has not got.
469 ///
470 /// Not an instruction no rule fires on. There is a rule's worth of instruction here and what
471 /// is wrong is the string beside it, which is a name rather than a term, so the message says
472 /// the name. Which names a machine has is the machine's own question and this is where it is
473 /// asked, at the table a clobber list is read against.
474 Register {
475 /// The `register_value`.
476 inst: Inst,
477 /// The name the program wrote, as it wrote it.
478 name: String,
479 },
480 /// A naked function whose frame is not empty.
481 ///
482 /// Not an instruction no rule fires on, and there is nothing in the body to point at: the
483 /// function asked for no prologue and then wanted bytes only a prologue takes. Refused rather
484 /// than given the bytes anyway, because an offset into a frame nothing set up reaches into
485 /// whatever the caller left below its own stack pointer, which is wrong code that assembles.
486 /// See [`crate::frame::Layout::naked`].
487 Naked {
488 /// How many bytes it wanted, which is the whole of what is wrong.
489 bytes: u32,
490 },
491 /// Something the x86-64 lowering writes by hand and nothing has written for this machine yet.
492 ///
493 /// Refused rather than written with the x86 instructions, which is what the walk would do
494 /// otherwise, since these are the places it names them itself.
495 Unported {
496 /// The instruction, or nothing for the one that is about a signature.
497 inst: Option<Inst>,
498 /// Which of them.
499 what: Unported,
500 },
501}
502
503/// What [`Unsupported::Unported`] is about.
504#[derive(Debug, Clone, Copy, PartialEq, Eq)]
505pub enum Unported {
506 /// The thread pointer on Apple's platforms, which keep it somewhere other than Linux does.
507 Thread,
508}
509
510impl Unported {
511 /// The whole message, since there is nothing to put in front of it.
512 #[must_use]
513 pub fn why(self) -> &'static str {
514 match self {
515 Unported::Thread => "the thread pointer is not written for this platform yet",
516 }
517 }
518}
519
520/// What about an `asm` statement is not built yet.
521#[derive(Debug, Clone, Copy, PartialEq, Eq)]
522pub enum Written {
523 /// A template with instructions in it.
524 Template,
525 /// An `asm goto`, whose labels make the statement a terminator.
526 Goto,
527 /// An operand this cannot put where the constraint says it goes.
528 Operand,
529 /// A clobber list naming something this has no register for.
530 Clobber,
531 /// A `jmp` out of the function in a function that has an epilogue behind it.
532 Away,
533}
534
535impl Written {
536 /// The rest of the sentence that starts with the statement.
537 #[must_use]
538 pub fn why(self) -> &'static str {
539 match self {
540 // The template is the assembler's to read and there is no assembler here yet, so a
541 // template with anything in it is a string nothing can turn into bytes. An empty one is
542 // no instructions, and no instructions is something this can write.
543 Written::Template => "has instructions in its template, which nothing here assembles",
544 Written::Goto => "jumps to a label, which nothing here builds an edge for",
545 Written::Operand => "has an operand this cannot place",
546 Written::Clobber => "says it destroys a register this has no name for",
547 Written::Away => {
548 "jumps out of the function, which only a function that is `naked` may do, since \
549 anywhere else there is an epilogue behind it to give the frame back"
550 }
551 }
552 }
553}
554
555/// What the frame could not do about a stack slot.
556#[derive(Debug, Clone, Copy, PartialEq, Eq)]
557pub enum Growing {
558 /// An object of a size the number a frame counts bytes in does not reach.
559 Huge,
560 /// A variable length array wanting more alignment than a call leaves the stack pointer with.
561 ///
562 /// Rounding the stack pointer down again after the bytes have been taken would put it
563 /// somewhere no constant reaches the rest of the frame from, so a frame like this needs a
564 /// second base register held for the whole of the function. Nothing here holds one.
565 ///
566 /// [`crate::expand::rounds`] takes the array away before this sees it, by asking for the
567 /// alignment in extra bytes and handing out an address inside them, so what is left of this
568 /// is IR that arrived without going through that pass and the fixed local in
569 /// [`crate::pipeline`] that wants the same thing from the other side.
570 Aligned,
571 /// A variable length array in a function written without a prologue.
572 ///
573 /// A frame that grows is reached from a frame pointer, and establishing one is the first two
574 /// instructions of a prologue that `__attribute__((naked))` asked there be none of. See
575 /// [`crate::frame::Layout::naked`].
576 Naked,
577}
578
579impl Growing {
580 /// The rest of the sentence that starts with the slot.
581 #[must_use]
582 pub fn why(self) -> &'static str {
583 match self {
584 Growing::Huge => "is more bytes than a frame counts",
585 Growing::Aligned => {
586 "wants more alignment than the stack pointer is left on, which needs a base \
587 register nothing here keeps"
588 }
589 Growing::Naked => {
590 "is in a function that is `naked`, which has no prologue to point a frame pointer \
591 at it with"
592 }
593 }
594 }
595}
596
597impl Unsupported {
598 /// The instruction it is about, or nothing for the one arm that is about a signature.
599 ///
600 /// What a caller wants this for is the span. The function knows where every instruction in
601 /// it came from, so a caller holding both can point a message at the line somebody wrote
602 /// rather than at the file as a whole, and nothing here has to carry a span of its own.
603 pub fn inst(&self) -> Option<Inst> {
604 match *self {
605 Unsupported::Inst { inst, .. }
606 | Unsupported::Call { inst, .. }
607 | Unsupported::Returned { inst, .. }
608 | Unsupported::Dynamic { inst, .. }
609 | Unsupported::Assembly { inst, .. }
610 | Unsupported::Register { inst, .. } => Some(inst),
611 Unsupported::Unported { inst, .. } => inst,
612 Unsupported::Argument { .. } | Unsupported::Phi { .. } | Unsupported::Naked { .. } => {
613 None
614 }
615 }
616 }
617}
618
619impl fmt::Display for Unsupported {
620 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
621 match *self {
622 Unsupported::Inst { term: Some(term), .. } => write!(f, "no rule lowers `{term}`"),
623 Unsupported::Inst { term: None, opcode, ty: Some(ty), .. } => {
624 write!(f, "no rule lowers a `{opcode}` producing a `{ty}`")
625 }
626 Unsupported::Inst { term: None, opcode, ty: None, .. } => {
627 write!(f, "no rule lowers a `{opcode}`")
628 }
629 Unsupported::Argument { index, missing } => {
630 write!(f, "parameter {index} {}", missing.why())
631 }
632 Unsupported::Call { refused: Refused { argument: Some(index), missing }, .. } => {
633 write!(f, "argument {index} of this call {}", missing.why())
634 }
635 Unsupported::Call { refused: Refused { argument: None, missing }, .. } => {
636 write!(f, "what this call gives back {}", missing.why())
637 }
638 Unsupported::Returned { missing, .. } => {
639 write!(f, "what this function gives back {}", missing.why())
640 }
641 Unsupported::Dynamic { growing, .. } => {
642 write!(f, "this local {}", growing.why())
643 }
644 Unsupported::Phi { block, count, ty } => {
645 let block = block.index();
646 write!(
647 f,
648 "block{block} takes {count} parameters of type `{ty}` and only {X87_DEPTH} can cross an edge at once"
649 )
650 }
651 Unsupported::Assembly { refused, .. } => write!(f, "this `asm` {}", refused.why()),
652 Unsupported::Unported { what, .. } => f.write_str(what.why()),
653 Unsupported::Register { ref name, .. } => {
654 write!(
655 f,
656 "this object is kept in `{name}`, which is not a register this machine has"
657 )
658 }
659 Unsupported::Naked { bytes } => write!(
660 f,
661 "this function is `naked` and wants {bytes} bytes of frame, which there is no prologue to take"
662 ),
663 }
664 }
665}
666
667impl std::error::Error for Unsupported {}
668
669/// A lowered function, and what the frame needs that the machine IR does not hold.
670#[derive(Debug)]
671pub struct Lowered {
672 /// The function, in machine instructions.
673 pub func: mir::Func,
674 /// What it wants its stack to look like, which is separate from the function so that the two
675 /// can be read and written at the same time.
676 pub stack: Stack,
677 /// Which rules of the table lowered it, which is what `-Zrule-coverage` asks for and what
678 /// `crate::coverage` writes down.
679 pub fired: Fired,
680 /// Which machine IR block each IR block became, indexed by the IR block's own index, and
681 /// nothing for a block the walk never reached.
682 ///
683 /// Here because it is the only place the correspondence exists. Selection makes one block per
684 /// block, in the same order and with the arms in the same order, so anything the IR knows
685 /// about a block can be carried down through this and nothing else, and
686 /// [`crate::weights::carry`] is what does.
687 pub blocks: Vec<Option<mir::Block>>,
688}
689
690/// What a function's stack has to hold, as far as selection is able to say.
691///
692/// All of it is answered here because selection is where a call is built and where an `alloca`
693/// is read, and nothing after it could tell what either of them needed.
694#[derive(Debug, Default)]
695pub struct Stack {
696 /// How many bytes the widest call in the function needs below the stack pointer for the
697 /// arguments it passes there, or `None` for a function that makes no call at all.
698 ///
699 /// `None` is a leaf, which is the function that may use the red zone and the one whose stack
700 /// pointer does not have to be left aligned for anybody.
701 pub calls: Option<u32>,
702 /// The memory the function asked for itself, one entry for every `alloca` in it, in the order
703 /// the walk reached them.
704 pub locals: Vec<Local>,
705 /// Which instruction computes the address of which of those locals.
706 ///
707 /// An address in the frame is a distance from the stack pointer, and there is no frame until
708 /// after allocation, so the instruction is written here with nothing in its displacement and
709 /// [`crate::finish`] writes the number in once [`crate::frame::Frame`] knows it.
710 pub addresses: Vec<(mir::Inst, usize)>,
711 /// Which of those locals is which declaration in the source, for the ones the program declared.
712 ///
713 /// The number is the one the IR function carries and means nothing here. What it is for is the
714 /// debugging information, which has to say where a named local ended up and cannot ask the
715 /// frame directly: the frame knows a local by the order the `alloca` for it was lowered in and
716 /// by nothing else.
717 ///
718 /// Shorter than the list above rather than the same length, because most of what a function
719 /// keeps in its frame is memory an expression wanted somewhere to put.
720 pub declared: Vec<(usize, u32)>,
721 /// Which instruction computes the address of a piece of memory whose size the function works
722 /// out while it runs, which is what a variable length array is.
723 ///
724 /// Waiting on [`crate::finish`] for a different number from the one the addresses above are:
725 /// the bytes were taken off the stack pointer by the instruction in front of this one, so where
726 /// they start is however much of the bottom of the frame belongs to the arguments of a call,
727 /// and that is not known until the frame is.
728 pub dynamic: Vec<mir::Inst>,
729 /// Which instruction takes those bytes off the stack pointer, one for every one of them, in the
730 /// order the walk reached them.
731 ///
732 /// Read by [`crate::finish`] on a command line that asked for the stack to be touched a page at
733 /// a time, which is the one thing that has to find these again: the bytes are in a register by
734 /// then, so the walk down to them is a loop, and a loop is written around an instruction rather
735 /// than in front of a block. Nothing else looks at them, because everything else about a frame
736 /// that grows is answered by the address the instruction below this one computes.
737 pub grown: Vec<mir::Inst>,
738 /// Where the function first moves the stack pointer while it runs, if it does at all.
739 ///
740 /// Two things are read off this. One is whether at all, which is what [`crate::frame::Layout`]
741 /// wants, because a frame that moves its stack pointer has a different shape from one that does
742 /// not and the layout is built before the instructions are looked at again. See `Growing` in
743 /// [`crate::frame`]. The other is where, so that a caller that cannot accept such a frame has
744 /// somewhere to point when it says so.
745 pub grown_at: Option<Inst>,
746 /// Which instruction reads which of the arguments the caller passed on the stack, as how far up
747 /// the caller's argument area it reads.
748 ///
749 /// Waiting on [`crate::finish`] for the same reason the addresses above are, and on one thing
750 /// more: where the caller's argument area is from inside this function depends on whether the
751 /// prologue had to force the stack pointer's alignment, so which register the load reads
752 /// through is not settled here either.
753 pub arguments: Vec<(mir::Inst, u32)>,
754 /// Whether the function asked where its own frame is, which is what `__builtin_frame_address`
755 /// and `__builtin_return_address` both start from.
756 ///
757 /// A function like that keeps a frame pointer whatever the flags say, because the register is
758 /// the answer to the first of them and the start of the walk for every depth above zero. There
759 /// is no other way to reach it: the distance from the stack pointer to the frame is a number
760 /// the layout works out, and what a walk up the chain needs is the link the prologue saved.
761 pub walks_frames: bool,
762 /// Whether the function saved a place for a `__builtin_longjmp` to come back to, which is what
763 /// `__builtin_setjmp` does.
764 ///
765 /// A function like that keeps a frame pointer whatever the flags say as well, and for a reason
766 /// of the same shape: the two registers the restore puts back are the frame pointer and the
767 /// stack pointer, and a frame that did not keep the first of them has nothing in it saying
768 /// where the caller's frame is for the epilogue to find after control has come back.
769 pub saves_place: bool,
770}
771
772impl Stack {
773 /// The layout given, with the three fields only the lowering knows the answer to filled in.
774 ///
775 /// Everything else in a layout comes from the flags the function is compiled under or from the
776 /// allocation, so this takes one and returns it rather than building one.
777 ///
778 /// A function that saved a place is not a leaf whatever it called. What a leaf buys is the red
779 /// zone, which is the words below the stack pointer nothing else may write, and a function
780 /// control comes back into from a `__builtin_longjmp` has already had something else running
781 /// down there: whatever it called and whatever that called, or a signal handler on the same
782 /// stack. Every one of those has written over the red zone by the time control arrives, so a
783 /// value this function left there would not be there any more.
784 #[must_use]
785 pub fn layout<'a>(&'a self, base: Layout<'a>) -> Layout<'a> {
786 Layout {
787 leaf: self.calls.is_none() && !self.saves_place,
788 outgoing: self.calls.unwrap_or(0),
789 locals: &self.locals,
790 grows: self.grown_at.is_some(),
791 ..base
792 }
793 }
794}
795
796/// The machine IR for that function, for the machine the selector describes.
797///
798/// # Errors
799///
800/// The first instruction no rule fires on, which today is anything at a width the rule set is not
801/// written at, a parameter that does not arrive in a register this can read, or a call that
802/// passes something this cannot put where the convention wants it.
803pub fn func(
804 source: &Func,
805 names: &mut Interner,
806 selector: &'static Selector,
807 conv: &'static CallRegs,
808 elsewhere: &Elsewhere,
809) -> Result<Lowered, Unsupported> {
810 Lowering::new(source, names, selector, conv, elsewhere).run()
811}
812
813/// What the matcher settled on for one block, indexed the way the block's instructions are.
814struct Decided {
815 /// What each instruction matched, and nothing for one that matched no rule or was folded
816 /// into a later one.
817 found: Vec<Option<Match<Term>>>,
818 /// How each instruction showed its operands to the matcher, which is what says what it took.
819 plans: Vec<Option<Plan>>,
820 /// The instructions some other instruction took, which are the ones with nothing to write.
821 folded: Vec<Inst>,
822}
823
824/// The instruction in front of an assignment that starts a declaration on a value, and the first
825/// machine instruction after it once the block is filled.
826type Mark = (Option<Inst>, Option<mir::Inst>);
827
828/// One function being lowered.
829struct Lowering<'a> {
830 source: &'a Func,
831 names: &'a mut Interner,
832 out: mir::Func,
833 /// The machine register each IR value is in, once it has one.
834 regs: Vec<Option<mir::Reg>>,
835 /// For a constant that has been written into a register, the block it was written into,
836 /// which is the only block that register is any good in.
837 written: Vec<Option<mir::Block>>,
838 /// How many times each IR value is read, which is what says whether an instruction may be
839 /// folded into the one that reads it.
840 uses: Vec<u32>,
841 /// The block being filled.
842 at: Option<mir::Block>,
843 /// The machine IR block each IR block became.
844 blocks: Vec<Option<mir::Block>>,
845 /// The class an address is in, which is the general purpose one and is not a question: every
846 /// register an addressing mode names holds part of an address, and there is no machine here
847 /// that computes an address anywhere but in this file. Which class a *value* is in is
848 /// [`Lowering::class_of`], and it is a question, because a float is in the other one.
849 gpr: RegClass,
850 /// The machine this selects for.
851 selector: &'static Selector,
852 /// Where the convention this function is compiled for puts things, which is read for the
853 /// arguments and for the calls.
854 conv: &'static CallRegs,
855 /// Which names this function may not work an address out for itself, which is a fact about the
856 /// module and so is worked out before any of this and handed in.
857 elsewhere: &'a Elsewhere,
858 /// What the function wants its stack to look like, filled in as the walk finds out.
859 stack: Stack,
860 /// What a `va_start` in this function has to write, or nothing for a function that takes no
861 /// arguments its signature does not name.
862 ///
863 /// Worked out once, when the entry block binds the parameters, because every number in it is
864 /// about where those parameters left the walk over the argument registers and there is nowhere
865 /// else that knows.
866 varargs: Option<Varargs>,
867 /// Which of the function's stack objects each eighty bit value lives in, once it has asked
868 /// for one.
869 ///
870 /// One slot per value and it is never given back, which is what makes an eighty bit value
871 /// behave like every other one: it is written once and read wherever it is read, and no two
872 /// of them share a slot the way two of them would share a register. What is in a register is
873 /// the address, and that is worked out again at every use rather than kept, so nothing here
874 /// holds a general purpose register open across a whole function.
875 slots: Vec<Option<usize>>,
876 /// The eight bytes a value passes through between a register and the x87 stack, once
877 /// something has wanted them.
878 ///
879 /// One for the whole function, because every group that uses it is a handful of instructions
880 /// with nothing in between: the bytes are written, read straight back and never looked at
881 /// again, so a second slot would be a second slot holding the same nothing.
882 crossing: Option<usize>,
883 /// The four bytes the control word is saved in and the changed copy written to, once
884 /// something has wanted them.
885 ///
886 /// One for the whole function for the reason above, and four rather than two because it is
887 /// two words: the one the unit had and the one with the rounding field turned to truncate.
888 control: Option<usize>,
889 /// The word a `__builtin_setjmp` in this function answers with, once one has asked for it.
890 ///
891 /// One for the whole function however many saves there are in it, because the word is written
892 /// and read back with nothing in between: the save writes a zero into it and the instruction
893 /// straight after reads it, and the only other thing that ever writes it is a restore arriving
894 /// between those two. Two saves sharing it is two pairs each doing that, and neither can be
895 /// inside the other.
896 answer: Option<usize>,
897 /// Which rules have fired so far.
898 fired: Fired,
899 /// Where each assignment that starts a declaration on a value part of the way through is, by
900 /// the IR block it is in and the instruction in front of it, and which machine instruction
901 /// is the first one after it once the block has been filled. See
902 /// [`rucc_ir::Func::declare_value_from`].
903 marks: HashMap<Block, Vec<Mark>>,
904}
905
906/// What a `va_start` in a variadic function writes into the list it is given.
907///
908/// Two shapes, because two conventions describe a list two ways, and [`crate::varargs`] is where
909/// both are written down. Neither is a set of numbers on its own: where the save area is and where
910/// the caller's argument area is are distances into a frame that does not exist until after
911/// allocation, so each is a `lea` [`crate::finish`] fills in.
912#[derive(Debug, Clone, Copy, PartialEq, Eq)]
913enum Varargs {
914 /// The four field list, whose two offsets are settled here and whose two addresses are not.
915 Fields {
916 /// Which of the function's stack objects is the register save area.
917 save: usize,
918 /// How far up the caller's argument area the first argument the signature does not name is,
919 /// which is the whole of that area the named ones did not take.
920 incoming: u32,
921 /// What `gp_offset` starts at, which is past the general purpose registers the named
922 /// arguments took.
923 integers: u32,
924 /// What `fp_offset` starts at, which is past the vector ones.
925 floats: u32,
926 },
927 /// The AAPCS64 list, whose two offsets count up to zero from the top of each half of the save
928 /// area. The two tops are addresses in the frame and so is the first field, like the SysV list.
929 Aapcs {
930 /// Which of the function's stack objects is the register save area.
931 save: usize,
932 /// How far up the caller's argument area the first argument the signature does not name is.
933 incoming: u32,
934 /// Where the general purpose half of the save area ends.
935 integers_end: u32,
936 /// Where the vector half ends, which is the end of the area.
937 floats_end: u32,
938 /// What `__gr_offs` starts at, which is minus the general purpose half the named arguments
939 /// did not take.
940 integers: i32,
941 /// What `__vr_offs` starts at.
942 floats: i32,
943 },
944 /// The list that is a pointer, which is the one address and nothing else.
945 Pointer {
946 /// How far up the caller's argument area the first argument the signature does not name is,
947 /// which on this convention is the word belonging to the position the named ones stopped
948 /// at.
949 incoming: u32,
950 },
951}
952
953/// How far a function's name reaches, narrowed from the linkage the IR gave it.
954///
955/// The IR has five and an object file says three, and the two the linker cannot tell apart are
956/// the two weak ones: which of them a symbol had is a fact the optimizer reads and the linker has
957/// no way to record. A function is never `Common`, since that is what a tentative definition of an
958/// object is and there is no tentative definition of a function, and it is written here rather
959/// than left out so that a linkage added later has to come past this.
960const fn binding(linkage: Linkage) -> mir::Binding {
961 match linkage {
962 Linkage::Internal => mir::Binding::Local,
963 Linkage::Weak | Linkage::LinkOnce => mir::Binding::Weak,
964 Linkage::External | Linkage::Common => mir::Binding::Global,
965 }
966}
967
968/// How far a function's name reaches outside a shared library, carried across unchanged.
969///
970/// Nothing is narrowed here the way [`binding`] narrows the linkage, because ELF records all
971/// three of these and the two enumerations are the same three answers written twice: once in a
972/// crate that is not allowed to know what an object file is and once in one that is.
973const fn visibility(visibility: Visibility) -> mir::Visibility {
974 match visibility {
975 Visibility::Default => mir::Visibility::Default,
976 Visibility::Hidden => mir::Visibility::Hidden,
977 Visibility::Protected => mir::Visibility::Protected,
978 }
979}
980
981impl<'a> Lowering<'a> {
982 fn new(
983 source: &'a Func,
984 names: &'a mut Interner,
985 selector: &'static Selector,
986 conv: &'static CallRegs,
987 elsewhere: &'a Elsewhere,
988 ) -> Self {
989 let counts = source.counts();
990 let name = source.name;
991 let mut uses = vec![0; counts.values];
992 for block in source.blocks() {
993 for inst in source.insts(block) {
994 for &arg in &source[source[inst].args] {
995 uses[arg.index()] += 1;
996 }
997 for call in source.successors(inst) {
998 for &arg in &source[call.args] {
999 uses[arg.index()] += 1;
1000 }
1001 }
1002 }
1003 }
1004 let mut out = mir::Func::new(name);
1005 out.align = source.align;
1006 // Carried rather than worked out here, because where a function was declared is a fact
1007 // about the source and this is a long way past it. What wants it is the line table.
1008 out.declared = source.declared;
1009 out.binding = binding(source.linkage);
1010 out.visibility = visibility(source.visibility);
1011 Self {
1012 source,
1013 names,
1014 out,
1015 regs: vec![None; counts.values],
1016 written: vec![None; counts.values],
1017 blocks: vec![None; counts.blocks],
1018 uses,
1019 at: None,
1020 gpr: selector.gpr,
1021 selector,
1022 conv,
1023 elsewhere,
1024 stack: Stack::default(),
1025 varargs: None,
1026 slots: vec![None; counts.values],
1027 crossing: None,
1028 control: None,
1029 answer: None,
1030 fired: Fired::new(),
1031 marks: HashMap::new(),
1032 }
1033 }
1034
1035 fn run(mut self) -> Result<Lowered, Unsupported> {
1036 for value in self.source.values() {
1037 for start in self.source.value_starts(value) {
1038 let Some((block, after)) = self.source.start_place(start) else { continue };
1039 let marks = self.marks.entry(block).or_default();
1040 if !marks.iter().any(|&(have, _)| have == after) {
1041 marks.push((after, None));
1042 }
1043 }
1044 }
1045 // Every block before any of them is filled, because a block that jumps forward has to
1046 // name the block it jumps to and a machine IR block is named by a handle rather than by
1047 // the IR block it came from.
1048 for block in self.source.blocks() {
1049 let out = self.out.create_block();
1050 self.blocks[block.index()] = Some(out);
1051 }
1052 for block in self.order() {
1053 self.block(block)?;
1054 }
1055 // And the name each block an image holds the address of was given, which nothing in the
1056 // walk above would ask for: the `lea` a label address is inside the function needs no
1057 // symbol, and the one thing that does is a relocation in another section.
1058 let named: Vec<(Block, Symbol)> = self.source.named_blocks().collect();
1059 let labels: Vec<(mir::Block, Symbol)> =
1060 named.into_iter().map(|(block, name)| (self.out_block(block), name)).collect();
1061 self.out.labels = labels;
1062 self.naming();
1063 Ok(Lowered { func: self.out, stack: self.stack, fired: self.fired, blocks: self.blocks })
1064 }
1065
1066 /// Which register each declaration the front end kept in a value ended up in, as far as this
1067 /// walk can say, which is the other half of what [`Lowering::new_reg`] writes down as it goes.
1068 ///
1069 /// Two halves because there are two ways a value gets a register here. Most of them ask for a
1070 /// fresh one and that is where `new_reg` catches them, and the rest are put in a register
1071 /// something else chose: a parameter arrives in whichever one the convention handed it, a block
1072 /// parameter in whichever one the edge agreed on, and a result of a rule that names its own
1073 /// registers in the one the rule named. None of those goes past the mint, so this is the map at
1074 /// the end read off the other side, and the two together are every value a declaration is
1075 /// behind.
1076 ///
1077 /// The map on its own would not do, which is why `new_reg` writes down what it writes down: the
1078 /// entry for a constant is cleared every time the walk leaves the block that wrote it, so a
1079 /// local a constant holds is in the map for one block of the function and nowhere else.
1080 fn naming(&mut self) {
1081 let mut named = std::mem::take(&mut self.out.named);
1082 for value in self.source.values() {
1083 let Some(reg) = self.regs[value.index()] else { continue };
1084 named.extend(self.source.value_decls(value).map(|decl| (decl, reg)));
1085 // A start in a block a pass took out was never reached above, and it says nothing
1086 // rather than something about another place.
1087 for start in self.source.value_starts(value) {
1088 let Some((block, after)) = self.source.start_place(start) else { continue };
1089 let first = self.marks.get(&block).and_then(|marks| {
1090 marks.iter().find(|&&(have, _)| have == after).and_then(|&(_, at)| at)
1091 });
1092 if let Some(first) = first {
1093 self.out.starts.push((start.decl, reg, first));
1094 }
1095 }
1096 }
1097 named.sort_unstable();
1098 named.dedup();
1099 self.out.named = named;
1100 self.out.starts.sort_unstable();
1101 self.out.starts.dedup();
1102 // Which of its values a declaration holds on the way into a block, for the blocks where
1103 // two of them are live at once. A block a pass took out says nothing, and neither does a
1104 // value the map above has lost the register of, since that is not the same as having none.
1105 let mut entries = Vec::new();
1106 for (decl, block, value) in crate::holding::on_entry(self.source) {
1107 if let (Some(block), Some(reg)) = (self.blocks[block.index()], self.regs[value.index()])
1108 {
1109 entries.push((decl, block, reg));
1110 }
1111 }
1112 entries.sort_unstable();
1113 entries.dedup();
1114 self.out.entries = entries;
1115 }
1116
1117 /// The order the blocks are filled in, which is not the order they are written in.
1118 ///
1119 /// Reverse postorder, because a value is written in a block that dominates every block that
1120 /// reads it and a block in reverse postorder comes before every block it dominates. The order
1121 /// the blocks are written in does not have that property: a block written early can read a
1122 /// value a block below it writes, and reading a value with no register yet mints one, so the
1123 /// register the definition writes later is not the register the read named. Nothing writes the
1124 /// one the read named, and what comes out is a function that loads a stack slot no store ever
1125 /// reached. It is the order this walk goes in rather than the order the blocks come out in,
1126 /// which is what the loop above fixes, so the machine function is still written the way the IR
1127 /// function was.
1128 ///
1129 /// Blocks the entry does not reach come last, in the order they are written in. Nothing runs
1130 /// them and nothing they name is read by anything that does, but they still have to be filled,
1131 /// because a machine block with no terminator is not one the passes below can read.
1132 fn order(&self) -> Vec<Block> {
1133 let Some(entry) = self.source.entry() else { return self.source.blocks().collect() };
1134 let count = self.blocks.len();
1135 let mut succs: Vec<Vec<Block>> = vec![Vec::new(); count];
1136 for block in self.source.blocks() {
1137 let Some(term) = self.source.terminator(block) else { continue };
1138 succs[block.index()] = self.source.successors(term).map(|call| call.block).collect();
1139 }
1140 // An explicit stack, because the depth of the walk is the number of blocks and a function
1141 // built by a generator has as many of those as it likes.
1142 let mut seen = vec![false; count];
1143 let mut order = Vec::with_capacity(count);
1144 let mut stack = vec![(entry, 0usize)];
1145 seen[entry.index()] = true;
1146 while let Some((block, at)) = stack.pop() {
1147 let Some(&next) = succs[block.index()].get(at) else {
1148 order.push(block);
1149 continue;
1150 };
1151 stack.push((block, at + 1));
1152 if !seen[next.index()] {
1153 seen[next.index()] = true;
1154 stack.push((next, 0));
1155 }
1156 }
1157 order.reverse();
1158 order.extend(self.source.blocks().filter(|block| !seen[block.index()]));
1159 order
1160 }
1161
1162 /// One block: its parameters, then every instruction in it that is not folded into another.
1163 fn block(&mut self, block: Block) -> Result<(), Unsupported> {
1164 let out = self.out_block(block);
1165 self.at = Some(out);
1166 if self.source.entry() == Some(block) {
1167 self.arrive(block, out)?;
1168 } else {
1169 let mut arriving = Vec::new();
1170 for ¶m in &self.source[block].params {
1171 // A value with no register to arrive in, which the class would not say, since
1172 // `class_of` puts one of these in the general purpose file on purpose and what it
1173 // means by that is that nothing there can hold it. What crosses the edge for one
1174 // of those is the address of where the value already is, so the parameter is a
1175 // pointer here and the bytes it points at are copied below.
1176 let ty = self.source[param].ty;
1177 let reg = self.out.append_param(out, self.class_of(ty));
1178 self.regs[param.index()] = Some(reg);
1179 if on_x87(ty) {
1180 arriving.push((param, reg));
1181 }
1182 }
1183 self.settle(block, &arriving)?;
1184 }
1185
1186 // What each instruction matched, and which instructions were folded into another. The
1187 // decision is made for the whole block before any of it is written, and it is made more
1188 // than once: a value that only some of its readers took has to be put back in a register
1189 // for all of them, and taking it away from those readers changes what they match.
1190 let insts: Vec<Inst> = self.source.insts(block).collect();
1191 let mut refused: HashSet<Value> = HashSet::new();
1192 let mut decided = self.decide(&insts, &refused);
1193 while let Some(value) = self.left_alive(&insts, &decided.plans) {
1194 refused.insert(value);
1195 decided = self.decide(&insts, &refused);
1196 }
1197 let Decided { found, folded, .. } = decided;
1198
1199 // Where each assignment in this block that starts a declaration on a value is, as the
1200 // machine instruction in front of the place its IR instruction left off, or the block
1201 // for one where nothing has been written yet. What comes after it is not known until the
1202 // block is filled, so that is read below.
1203 let wanted: HashSet<Option<Inst>> =
1204 self.marks.get(&block).into_iter().flatten().map(|&(after, _)| after).collect();
1205 let mut reached: Vec<(Option<Inst>, mir::Block, Option<mir::Inst>)> = Vec::new();
1206 for (index, (&inst, matched)) in insts.iter().zip(found).enumerate() {
1207 let before = index.checked_sub(1).map(|index| insts[index]);
1208 if wanted.contains(&before) {
1209 let at = self.at.unwrap_or(out);
1210 reached.push((before, at, self.out.terminator(at)));
1211 }
1212 if folded.contains(&inst) || self.writes_nothing(inst) {
1213 continue;
1214 }
1215 // A call is built from the convention rather than matched, which is why it is the one
1216 // opcode looked at by name here. Through an address it is a different instruction and
1217 // the same convention, so the two arrive at the same place and differ in one line of
1218 // it.
1219 match self.source[inst].opcode {
1220 Opcode::Call | Opcode::CallIndirect => {
1221 self.called(inst)?;
1222 continue;
1223 }
1224 // Built from the frame rather than matched, for the same shape of reason a call
1225 // is built from the convention: what a rule replaces a term with is instructions,
1226 // and what an `alloca` needs first is bytes, which the rule language has no way
1227 // to ask for.
1228 Opcode::Alloca => {
1229 self.reserve(inst)?;
1230 continue;
1231 }
1232 // Reading the stack pointer and writing it back, which are the two ends of a scope
1233 // holding a variable length array. Built here for the reason an `alloca` is: the
1234 // value is a register the rule language has no way to name, because what it holds
1235 // is not a value the program computed but where the machine's stack had got to.
1236 Opcode::StackSave => {
1237 self.stack_pointer(inst, false)?;
1238 continue;
1239 }
1240 Opcode::StackRestore => {
1241 self.stack_pointer(inst, true)?;
1242 continue;
1243 }
1244 // The address of a name, built here for the same reason an `alloca` is: what a
1245 // rule replaces a term with is instructions over values, and the operand of this
1246 // one is a symbol, which is a thing the rule language has no way to bind and the
1247 // solver has no way to say anything about. There is nothing in `lea sym(%rip)` a
1248 // proof over bitvectors could discharge, because what makes it the right answer
1249 // is the relocation and what the linker does with it.
1250 Opcode::GlobalAddr => {
1251 self.address_of(inst)?;
1252 continue;
1253 }
1254 // The address of a label and the branch that reads one, built here for the same
1255 // reason and for one more. The reason is the same: what the first of them names is
1256 // a block, which is not a value a rule pattern can bind, and there is nothing in
1257 // the distance between two places in one function that a proof over bitvectors
1258 // could discharge. The extra one is that the second is a terminator whose arms are
1259 // not two and not fixed, and a rule says what an instruction reads rather than
1260 // where a block goes.
1261 Opcode::BlockAddr => {
1262 self.block_address(inst)?;
1263 continue;
1264 }
1265 Opcode::IndirectBr => {
1266 self.indirect_branch(inst)?;
1267 continue;
1268 }
1269 // A `switch` that `crate::switch` found dense enough for a table, which is a load
1270 // out of the table and the same jump. Built here for the reasons the jump above
1271 // is, and because what the load reads is a place in this function.
1272 Opcode::Switch => {
1273 self.jump_table(inst)?;
1274 continue;
1275 }
1276 // The pair that saves a place in this function and comes back to it. Built here
1277 // for the reason the address of a label is, and for two more. The reason is the
1278 // same: the first of them writes down where control comes back to, which is a
1279 // place in this function and not a value a rule pattern can bind. The extra ones
1280 // are that each of them is a group of instructions over a buffer the program owns
1281 // rather than one instruction, and that the first of them leaves the block it was
1282 // written in and carries on in a new one, which is a thing no rule can do.
1283 Opcode::SetjmpMarker => {
1284 self.saves_place(inst)?;
1285 continue;
1286 }
1287 Opcode::LongjmpMarker => {
1288 self.comes_back(inst)?;
1289 continue;
1290 }
1291 // Where this thread's own storage starts, built here for a reason of the same
1292 // shape: what it reads is `%fs`, which is not a register the rule language can
1293 // bind and not one a proof over bitvectors could say anything about, because what
1294 // makes the load the right answer is an agreement between the loader and the C
1295 // library rather than any arithmetic.
1296 Opcode::ThreadPointer => {
1297 self.thread_pointer(inst)?;
1298 continue;
1299 }
1300 // What a named machine register holds, built here for the reason above written
1301 // about any register rather than about one: which register it is is a string
1302 // beside the instruction, and a rule matches on an opcode and a type and could
1303 // not see it. There is nothing to prove either, since the answer is the register
1304 // and the instruction is the move that reads it.
1305 Opcode::RegisterValue => {
1306 self.register_value(inst)?;
1307 continue;
1308 }
1309 // Where a frame is and what it returns to, built here for the same reason and one
1310 // more. The reason is the same: what the walk starts from is the frame pointer,
1311 // which is not a register a rule pattern can bind, and there is nothing in reading
1312 // the link the prologue saved that a proof over bitvectors could discharge. The
1313 // extra one is that how long the walk is comes out of a number beside the
1314 // instruction, so one of these is not one instruction but however many the depth
1315 // says, and a rule replaces a term with a term.
1316 Opcode::FrameAddress | Opcode::ReturnAddress => {
1317 self.frames(inst)?;
1318 continue;
1319 }
1320 // Built from the frame for the reason an `alloca` is, and from the convention for
1321 // the reason a call is: three of the four fields it writes are distances that do
1322 // not exist until the frame does, and the fourth is where the walk over the
1323 // argument registers stopped. A function that is not variadic has no such walk to
1324 // report, so it has nothing here and is refused below, which is the right answer
1325 // for a `va_start` in one.
1326 Opcode::VaStart if self.varargs.is_some() => {
1327 self.va_start(inst)?;
1328 continue;
1329 }
1330 // A return of more than one value, which is a structure small enough to come
1331 // back in a pair of registers. Built from the convention for the reason a call
1332 // is: which register each half goes in depends on the halves in front of it,
1333 // because the two register files are walked separately, and a pattern over a term
1334 // cannot see them. A return of one value is a term with a name and a rule, and it
1335 // stays one.
1336 //
1337 // A return of none in a function whose answer went through memory is here too,
1338 // and for a different reason: what it gives back is not written in the IR at all.
1339 // The convention says the address the caller handed over comes back, and only the
1340 // signature says this function was handed one.
1341 //
1342 // And a return of one eighty bit value, for a third reason: what a rule would
1343 // write is an instruction leaving the value in a register, and this one is left on
1344 // the x87 stack instead. A rule could not name that stack any more than any other
1345 // rule about this type could.
1346 Opcode::Return
1347 if self.source[self.source[inst].args].len() > 1
1348 || self.sret().is_some()
1349 || self.gives_back_x87(inst) =>
1350 {
1351 self.returned(inst)?;
1352 continue;
1353 }
1354 // A cast between a pointer and an integer of the same width, which on this
1355 // machine is every one the front end writes. No instruction at all, so no rule
1356 // could name one.
1357 Opcode::PtrToInt | Opcode::IntToPtr => {
1358 self.rename(inst)?;
1359 continue;
1360 }
1361 // A barrier, which is one instruction or none depending on the ordering. Written
1362 // by name because there is nothing about it a rule could be proved against, the
1363 // way there is nothing to prove about the address of a symbol.
1364 Opcode::Fence => {
1365 self.barrier(inst)?;
1366 continue;
1367 }
1368 // A hint, written by name for the reason a barrier is and one step further: not
1369 // only is there no equality for a proof to discharge, there is nothing about the
1370 // program around it either. Which of the four instructions it is comes out of the
1371 // number the builtin was given, which is beside the instruction rather than in it.
1372 Opcode::Prefetch => {
1373 self.hint(inst)?;
1374 continue;
1375 }
1376 // Stopping, written by name for the first half of the barrier's reason: it
1377 // computes nothing, so there is no term for a rule to replace, and what makes it
1378 // right is what the operating system does with the fault rather than anything a
1379 // proof over bitvectors could discharge.
1380 Opcode::Trap => {
1381 self.trap(inst);
1382 continue;
1383 }
1384 // A compare and exchange, which is written by name because it produces two values
1385 // and a rule produces one. The replacement of a rule is one term, a term names the
1386 // value an instruction computes, and there is no way in that language to say that
1387 // an instruction leaves an answer in one place and a yes or no in another.
1388 Opcode::Cmpxchg => {
1389 self.exchange(inst)?;
1390 continue;
1391 }
1392 // A read modify write, which is written by name for a different reason: it produces
1393 // one value, so a rule could name it, and what it does is not in the head a rule
1394 // matches on. Every one of the thirteen operations is the same opcode at the same
1395 // type and differs only in what is carried beside it, so one pattern would be all
1396 // thirteen patterns. Of the thirteen only the three with an instruction reach here,
1397 // since `crate::retry` turned the rest into loops a long way above this.
1398 Opcode::AtomicRmw => {
1399 self.modify(inst)?;
1400 continue;
1401 }
1402 // An `asm` statement, whose lowering is its template and there is no term for a
1403 // string. Written by name for the reason a barrier is, and before the x87 arm
1404 // below so that an `asm` holding a `long double` is refused as the `asm` it is
1405 // rather than as an instruction nothing computes.
1406 Opcode::InlineAsm => {
1407 // The template is read as x86 assembly, and that reader is the only one there
1408 // is. AArch64 keeps every template as text, and any other machine's `asm` is
1409 // refused here rather than read as the wrong language.
1410 if self.on_aarch64() {
1411 self.spelled(inst)?;
1412 continue;
1413 }
1414 if !std::ptr::eq(self.selector.shapes, &x86_64::MACHINE) {
1415 return Err(self.unsupported(inst));
1416 }
1417 self.assembly(inst)?;
1418 continue;
1419 }
1420 // Anything at all with an eighty bit float in it, which is the one arm here
1421 // chosen by a type rather than by an opcode, because what makes these different
1422 // is not what they do but where the value is. A `long double` has no register,
1423 // so it has no name in `crate::term` and no rule could bind one: every one of
1424 // these is a group of instructions over a frame slot, written out below.
1425 //
1426 // Last of the arms, so that a call and a return with one of these in them reach
1427 // the convention first and are refused by it, which is the truer answer: what is
1428 // wrong there is where the value has to travel and not that nothing can compute
1429 // it.
1430 _ if self.touches_x87(inst) => {
1431 self.x87(inst)?;
1432 continue;
1433 }
1434 _ => {}
1435 }
1436 let matched = matched.ok_or_else(|| self.unsupported(inst))?;
1437 self.emit(inst, &matched)?;
1438 // After it is built rather than when it matched, so that what is recorded is the rules
1439 // this function was lowered by and not the rules something was tried with.
1440 self.fired.mark(matched.rule);
1441 }
1442 // Whichever block the walk ended in rather than the one it started in. The two are the
1443 // same block for every function that does not save a place for a `__builtin_longjmp`, and
1444 // where they differ it is the last of them that the terminator and the arms belong to.
1445 // See [`Self::saves_place`].
1446 let last = self.at.expect("a block is being filled");
1447 self.edges(block, last)?;
1448 // Now that the block is filled, the instruction after each place an assignment was is the
1449 // first one it holds its value at. One with nothing after it, which a block ending in the
1450 // assignment would be, stays unanswered.
1451 if let Some(marks) = self.marks.get_mut(&block) {
1452 for &(before, at, last) in &reached {
1453 let first = match last {
1454 Some(last) => self.out.next_inst(last),
1455 None => self.out.insts(at).next(),
1456 };
1457 for mark in marks.iter_mut().filter(|(after, _)| *after == before) {
1458 mark.1 = first;
1459 }
1460 }
1461 }
1462 Ok(())
1463 }
1464
1465 /// One call, which is built from the convention rather than matched against the table for the
1466 /// same reason the arguments of the function itself are.
1467 ///
1468 /// The arguments are read before the call is built, which is what materializes a constant
1469 /// argument into a register, since no call passes an immediate.
1470 ///
1471 /// A call to a name and a call through an address are both here, and what tells them apart is
1472 /// the opcode rather than whether a callee was recorded, which is the same thing the verifier
1473 /// reads. Through an address the first operand is the address and the arguments are the ones
1474 /// behind it, and everything after that is the same: where each argument goes, where the value
1475 /// comes back and which registers are gone across it are the convention's answers and the
1476 /// convention does not ask what is being called.
1477 fn called(&mut self, inst: Inst) -> Result<(), Unsupported> {
1478 let data = &self.source[inst];
1479 let Extra::Call(info) = data.extra else { return Err(self.unsupported(inst)) };
1480 let info = self.source[info];
1481 let indirect = data.opcode == Opcode::CallIndirect;
1482
1483 let values: Vec<Value> = self.source[data.args].to_vec();
1484 let callee = if indirect {
1485 let &address = values.first().ok_or_else(|| self.unsupported(inst))?;
1486 abi::Callee::Through(self.reg_of(address)?)
1487 } else {
1488 abi::Callee::Named(info.callee.ok_or_else(|| self.unsupported(inst))?)
1489 };
1490
1491 // What the ABI asks of each argument, read out before any of them is, because reading one
1492 // borrows the function this is a table in. The ones the signature names are the signature's
1493 // answer and the ones behind them are the call's, which is where a structure passed to a
1494 // variadic callee by value says that its bytes travel: there is no parameter to say it on.
1495 let signature = &self.source[info.signature];
1496 let variadic = signature.variadic;
1497 let named: Vec<Abi> = signature.params.iter().map(|param| param.abi).collect();
1498 let beyond: Vec<Abi> = self.source[info.varargs].to_vec();
1499 // Every value that comes back and not only the first. A structure small enough to travel
1500 // in registers comes back in up to two of them, and which register each half is in is the
1501 // convention's answer, which is why the whole list goes to the same place the arguments do
1502 // rather than to a rule.
1503 let returns: Vec<Type> = signature.return_types().collect();
1504
1505 let mut args = Vec::with_capacity(values.len());
1506 for (index, value) in values.into_iter().skip(usize::from(indirect)).enumerate() {
1507 let abi = named.get(index).or_else(|| beyond.get(index - named.len()));
1508 let abi = abi.copied().unwrap_or_default();
1509 let ty = self.source[value].ty;
1510 // What travels for an eighty bit value is its bytes, so what the call is handed is
1511 // where they are rather than a register they are in, and there is no register they
1512 // could be in. Everything else about it is a sixteen byte object passed by value and
1513 // is built by the same code.
1514 let reg =
1515 if abi::on_the_stack(ty) { self.x87_slot(value) } else { self.reg_of(value)? };
1516 args.push(abi::Passing { ty, reg, abi });
1517 }
1518 let block = self.at.expect("a block is being filled");
1519 let what = abi::Calling {
1520 callee,
1521 args: &args,
1522 returns: &returns,
1523 variadic,
1524 named: named.len(),
1525 at: self.source.span(inst),
1526 };
1527 let made = abi::call(&mut self.out, block, &what, self.conv, self.selector.abi, self.names)
1528 .map_err(|refused| Unsupported::Call { inst, refused })?;
1529 let calls = &mut self.stack.calls;
1530 *calls = Some(calls.unwrap_or(0).max(made.outgoing));
1531 // An eighty bit value came back on the x87 stack, and the one thing that has to happen
1532 // before anything else touches that stack is taking it off. So the `fstp` goes here, in
1533 // front of everything the block does next, and after it the value is in its slot and is
1534 // read the way every other one is. A complex one is two of them, the real half on top, so
1535 // taking them off in order leaves each in its own slot and the stack empty.
1536 let results: Vec<Value> = self.source[inst].results().collect();
1537 let types: Vec<Type> = results.iter().map(|&result| self.source[result].ty).collect();
1538 if abi::back_on_x87(&types) {
1539 let span = self.source.span(inst);
1540 for result in results {
1541 let into = self.x87_slot(result);
1542 let into = self.through(into);
1543 self.x87_at("fstp_t", span, into);
1544 }
1545 return Ok(());
1546 }
1547 for (result, ®) in results.into_iter().zip(&made.results) {
1548 self.regs[result.index()] = Some(reg);
1549 }
1550 Ok(())
1551 }
1552
1553 /// The pointer a function returning through memory was handed, or nothing in a function that
1554 /// was not.
1555 ///
1556 /// It is the first parameter and the signature is what says so, since in the IR it is an
1557 /// ordinary pointer and reads like one everywhere in the body. A function with a signature
1558 /// like that and no entry block has nothing to give back and no body to give it back from.
1559 fn sret(&self) -> Option<Value> {
1560 let first = self.source.signature().params.first()?;
1561 if !matches!(first.abi, Abi::Sret { .. }) {
1562 return None;
1563 }
1564 self.source[self.source.entry()?].params.first().copied()
1565 }
1566
1567 /// One `return` the convention has to write, as the place each value has to be in by the end.
1568 ///
1569 /// One pseudo per value, each a read constrained to a return register, which is what a return
1570 /// of one value already is and is the whole of what either does. The `ret` itself comes from
1571 /// the epilogue for both, long after this, because the frame has to be given back first.
1572 ///
1573 /// The two register files are counted separately, so a structure of a `double` and a `long`
1574 /// leaves the `double` in the first vector register and the `long` in the first integer one
1575 /// rather than in the second of either. That is the same walk `rucc_codegen::abi` makes on
1576 /// the other side of the call, which is what makes the two ends agree.
1577 ///
1578 /// A function whose answer went through memory gives back the address it was handed, in front
1579 /// of nothing else, because a signature that returns that way returns nothing else. That the
1580 /// caller already knows the address is not enough: it is allowed to read the register instead,
1581 /// and a caller that does gets whatever the allocator last left there. In a leaf function that
1582 /// is usually the right answer by accident, and one call in the body is enough to make it a
1583 /// wild pointer, which is why this is written rather than left to luck.
1584 ///
1585 /// Where everything goes is worked out before anything is written, so a return this cannot
1586 /// make leaves no half of one behind.
1587 /// Whether what a `return` gives back goes back on the x87 stack, per [`abi::back_on_x87`].
1588 fn gives_back_x87(&self, inst: Inst) -> bool {
1589 let values = &self.source[self.source[inst].args];
1590 let types: Vec<Type> = values.iter().map(|&value| self.source[value].ty).collect();
1591 abi::back_on_x87(&types)
1592 }
1593
1594 fn returned(&mut self, inst: Inst) -> Result<(), Unsupported> {
1595 let values: Vec<Value> = self.source[self.source[inst].args].to_vec();
1596 let (mut ints, mut floats) = (0usize, 0usize);
1597 let mut parts = Vec::with_capacity(values.len() + 1);
1598 // An eighty bit value goes back on the x87 stack, which is where the convention says it is
1599 // and is the one place a value is left rather than put in a register. So the whole of the
1600 // return is an `fld` of its slot, and the stack it leaves the value on is not empty at the
1601 // `ret`, which is the one time in this file that is true and is what the convention asks
1602 // for. What comes after is the epilogue, which gives the frame back and touches nothing in
1603 // the unit. A complex one loads its imaginary half first so that the real half ends up on
1604 // top of it, in `st(0)`, with the imaginary half under it in `st(1)`.
1605 if self.gives_back_x87(inst) && self.sret().is_none() {
1606 let span = self.source.span(inst);
1607 for &value in values.iter().rev() {
1608 let from = self.x87_slot(value);
1609 let from = self.through(from);
1610 self.x87_at("fld_t", span, from);
1611 }
1612 return Ok(());
1613 }
1614 for value in self.sret().into_iter().chain(values) {
1615 let ty = self.source[value].ty;
1616 let at = if crate::term::in_vector_file(ty) { &mut floats } else { &mut ints };
1617 // Why it cannot come back, and not only that it cannot. A type that travels nowhere
1618 // says so itself, and a type that travels perfectly well ran out of registers.
1619 let missing = abi::refuses(ty, self.selector.abi).unwrap_or(Missing::NoRoom);
1620 let name =
1621 (self.selector.abi.ret)(ty, *at).ok_or(Unsupported::Returned { inst, missing })?;
1622 *at += 1;
1623 // The register is the target's answer and not one worked out here, the same as it is
1624 // for a return of one value, so that both halves of a pair and every rule that writes
1625 // half of one are reading the same table.
1626 let opcode =
1627 name.strip_prefix(self.selector.prefix()).ok_or_else(|| self.unsupported(inst))?;
1628 let descs = self.selector.operands(opcode).ok_or_else(|| self.unsupported(inst))?;
1629 let [desc] = descs else { return Err(self.unsupported(inst)) };
1630 parts.push((self.names.intern(name), self.reg_of(value)?, *desc));
1631 }
1632
1633 let block = self.at.expect("a block is being filled");
1634 let span = self.source.span(inst);
1635 for (opcode, reg, desc) in parts {
1636 let operand = mir::Operand {
1637 reg,
1638 class: desc.class,
1639 role: desc.role,
1640 constraint: desc.constraint,
1641 };
1642 self.out.build(block, mir::Opcode::new(opcode)).at(span).operand(operand).finish();
1643 }
1644 Ok(())
1645 }
1646
1647 /// One `alloca`: the bytes it asks for go on the list the frame is laid out from, and the
1648 /// address of them is one instruction.
1649 ///
1650 /// The instruction is a `lea` off the stack pointer, which is the one register that reaches
1651 /// the frame in every function, and its displacement is left at nothing because there is no
1652 /// frame yet. Which instruction is waiting for which local is remembered, and
1653 /// [`crate::finish`] fills the numbers in after [`crate::frame::Frame`] has placed them.
1654 ///
1655 /// There is deliberately no rule for `alloca` and no name for one in [`crate::term`], and
1656 /// that is what stops it being folded into something else. An operand shown as the
1657 /// instruction that computed it is offered to the matcher by its name, so an `alloca` with no
1658 /// name is one no pattern can reach past, and the address it computes is always in a register
1659 /// by the time anything reads it.
1660 fn reserve(&mut self, inst: Inst) -> Result<(), Unsupported> {
1661 let data = &self.source[inst];
1662 // A variable length array carries the size it wants as an operand rather than in the
1663 // instruction, which is the whole of what tells the two apart here.
1664 if let Some(&size) = self.source[data.args].first() {
1665 return self.grow(inst, size);
1666 }
1667 let Extra::Mem(mem) = data.extra else { return Err(self.unsupported(inst)) };
1668 let info = self.source[mem];
1669 let size = u32::try_from(info.size)
1670 .map_err(|_| Unsupported::Dynamic { inst, growing: Growing::Huge })?;
1671 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
1672
1673 // At least one, because the frame divides by the alignment and an object with no
1674 // alignment at all is one the front end had nothing to say about rather than one that may
1675 // go anywhere.
1676 let index = self.stack.locals.len();
1677 self.stack.locals.push(Local { size, align: info.align.max(1) });
1678 if let Some(decl) = self.source.mem_decl(mem) {
1679 self.stack.declared.push((index, decl));
1680 }
1681
1682 let block = self.at.expect("a block is being filled");
1683 let reg = self.new_reg(result);
1684 let span = self.source.span(inst);
1685 let lea = self.named(self.selector.frame.lea);
1686 let sp = mir::Operand::read(mir::Reg::physical(self.conv.stack_pointer), self.gpr);
1687 let made =
1688 self.out.build(block, lea).at(span).def(reg, self.gpr).mem(mir::Mem::at(sp)).finish();
1689 self.stack.addresses.push((made, index));
1690 Ok(())
1691 }
1692
1693 /// The other kind of `alloca`: one whose size the function does not know until it runs, which
1694 /// is what a variable length array is.
1695 ///
1696 /// Nothing about it is a slot the frame laid out, because the frame is laid out once and this
1697 /// happens as often as control reaches the declaration. The bytes come off the stack pointer
1698 /// where the declaration stands, which is two instructions:
1699 ///
1700 /// ```text
1701 /// sub sp, bytes the stack pointer moves down over the memory, which is what takes it
1702 /// lea reg, [sp+n] where the memory starts, which is above the outgoing argument area
1703 /// ```
1704 ///
1705 /// The displacement is left at nothing for the reason the constant kind leaves its own at
1706 /// nothing, and for a different number: that area belongs to the arguments of whatever this
1707 /// function calls, it stays at the bottom of the frame wherever the bottom has moved to, and
1708 /// how big it is is not known until every call in the function has been seen.
1709 ///
1710 /// The bytes are already a multiple of the stack pointer's alignment by the time they arrive,
1711 /// because [`crate::expand::rounds`] rounded them up in the IR, so nothing here has to mask the
1712 /// stack pointer afterwards and the stack pointer stays somewhere a call can be made from.
1713 ///
1714 /// Two instructions here and not always two in the finished function. On a command line that
1715 /// asked for the stack to be touched a page at a time, the subtraction becomes a loop that
1716 /// walks the same distance a page at a time, which [`crate::finish`] writes. That is why the
1717 /// instruction is written down in [`Stack::grown`] as well as left where it is.
1718 ///
1719 /// An array wanting more alignment than the convention leaves the stack pointer with does not
1720 /// reach here asking for it: [`crate::expand::rounds`] gives it the alignment in extra bytes
1721 /// and turns the array into a `ptr_add` of the offset that lands inside them, so what arrives
1722 /// is a block asking for the convention's alignment like any other. The refusal below is what
1723 /// answers IR that came from somewhere other than that pass, since forcing the alignment here
1724 /// would be a second rounding of a register the frame already rounded, and after it no
1725 /// constant reaches the rest of the frame from anywhere. See `Growing` in [`crate::frame`].
1726 fn grow(&mut self, inst: Inst, size: Value) -> Result<(), Unsupported> {
1727 let data = &self.source[inst];
1728 let Extra::Mem(mem) = data.extra else { return Err(self.unsupported(inst)) };
1729 let info = self.source[mem];
1730 if info.align > self.conv.stack_align {
1731 return Err(Unsupported::Dynamic { inst, growing: Growing::Aligned });
1732 }
1733 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
1734 let bytes = self.reg_of(size)?;
1735
1736 let block = self.at.expect("a block is being filled");
1737 let span = self.source.span(inst);
1738 let stack = mir::Reg::physical(self.conv.stack_pointer);
1739 let grow = self.named(self.selector.frame.grow);
1740 let took = self
1741 .out
1742 .build(block, grow)
1743 .at(span)
1744 .operand(mir::Operand::write(stack, self.gpr))
1745 .operand(mir::Operand::read(stack, self.gpr))
1746 .operand(mir::Operand::read(bytes, self.gpr))
1747 .finish();
1748 self.stack.grown.push(took);
1749
1750 let reg = self.new_reg(result);
1751 let lea = self.named(self.selector.frame.lea);
1752 let sp = mir::Operand::read(stack, self.gpr);
1753 let made =
1754 self.out.build(block, lea).at(span).def(reg, self.gpr).mem(mir::Mem::at(sp)).finish();
1755 self.stack.dynamic.push(made);
1756 self.stack.grown_at.get_or_insert(inst);
1757 Ok(())
1758 }
1759
1760 /// Where the stack pointer is, kept so that something later can put it back.
1761 ///
1762 /// One move out of the stack pointer and one move into it, which is the whole of what the two
1763 /// halves are. What makes them worth writing is where the front end puts them: a scope holding
1764 /// a variable length array saves the stack pointer as it opens and puts it back as it closes,
1765 /// so a loop declaring one takes its bytes once round rather than once per iteration, and a
1766 /// jump out of the scope gives the bytes back on the way out.
1767 ///
1768 /// The value travels in an ordinary register the allocator hands out, so it may be spilled like
1769 /// any other, and a spill slot in a frame that grows is reached through the frame pointer,
1770 /// which is exactly the register that still means something after the stack pointer has moved.
1771 fn stack_pointer(&mut self, inst: Inst, into: bool) -> Result<(), Unsupported> {
1772 let data = &self.source[inst];
1773 let block = self.at.expect("a block is being filled");
1774 let span = self.source.span(inst);
1775 let stack = mir::Reg::physical(self.conv.stack_pointer);
1776 let mov =
1777 self.selector.frame.moves(self.gpr).expect("a class the target says how to move").mov;
1778 let mov = self.named(mov);
1779 let (write, read) = if into {
1780 let &saved = self.source[data.args].first().ok_or_else(|| self.unsupported(inst))?;
1781 (stack, self.reg_of(saved)?)
1782 } else {
1783 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
1784 (self.new_reg(result), stack)
1785 };
1786 self.out
1787 .build(block, mov)
1788 .at(span)
1789 .operand(mir::Operand::write(write, self.gpr))
1790 .operand(mir::Operand::read(read, self.gpr))
1791 .finish();
1792 // Only the write is a move of the stack pointer, and it is the one that makes the frame a
1793 // growing one. A read of it in a function that never writes it back is a function that
1794 // asked where the stack was and did nothing with the answer.
1795 if into {
1796 self.stack.grown_at.get_or_insert(inst);
1797 }
1798 Ok(())
1799 }
1800
1801 /// Whether an instruction has an eighty bit float anywhere in it.
1802 ///
1803 /// Producing one and reading one are the same question here, because what makes one of these
1804 /// different from every other instruction is not the operation but where the value is. A
1805 /// `long double` is on the x87 stack while it is being worked on and in a frame slot the rest
1806 /// of the time, and neither of those is somewhere the operand of a rule could point.
1807 fn touches_x87(&self, inst: Inst) -> bool {
1808 let data = &self.source[inst];
1809 data.results().any(|value| on_x87(self.source[value].ty))
1810 || self.source[data.args].iter().any(|&arg| on_x87(self.source[arg].ty))
1811 }
1812
1813 /// Everything that happens to an eighty bit float, as the group of instructions it is.
1814 ///
1815 /// The first six move one, and every one of those is a load, a store, or a load and a store at
1816 /// two different formats, because that is the whole of what this machine converts with: the
1817 /// x87 has no instruction that turns one thing on its stack into another, so a widening is
1818 /// `fld` of the narrow format and a narrowing is `fstp` of it.
1819 ///
1820 /// The rest work on one, and they are here rather than in a rule for the same reason the six
1821 /// are. An add is a push, a push, the add and a pop, and what passes between those four is the
1822 /// top of a stack nothing allocates from, so there is no value in the middle of the group for
1823 /// a pattern to bind or a replacement to name. The comparison is the same shape with its last
1824 /// two instructions folded into one opcode, which is where the byte it produces comes from.
1825 ///
1826 /// Every group leaves the stack as empty as it found it, which is what `spec/10-backend.md`
1827 /// section 10.8 asks of one and is why nothing in this file has to track a depth: each push
1828 /// below is answered by a pop a line or two later, so no two groups can ever be looking at
1829 /// the same eight registers.
1830 fn x87(&mut self, inst: Inst) -> Result<(), Unsupported> {
1831 match self.source[inst].opcode {
1832 Opcode::Load => self.x87_load(inst),
1833 Opcode::Store => self.x87_store(inst),
1834 Opcode::FPExt => self.x87_widen(inst),
1835 Opcode::FPTrunc => self.x87_narrow(inst),
1836 Opcode::SIToFP => self.x87_from_signed(inst),
1837 Opcode::FPToSI => self.x87_to_signed(inst),
1838 Opcode::FAdd => self.x87_arith(inst, "fadd_p"),
1839 Opcode::FSub => self.x87_arith(inst, "fsubr_p"),
1840 Opcode::FMul => self.x87_arith(inst, "fmul_p"),
1841 Opcode::FDiv => self.x87_arith(inst, "fdivr_p"),
1842 Opcode::FNeg => self.x87_flip(inst),
1843 Opcode::FCmp => self.x87_compare(inst),
1844 Opcode::FConst => self.x87_const(inst),
1845 _ => Err(self.unsupported(inst)),
1846 }
1847 }
1848
1849 /// The eighty bit parameters of a block, copied out of the addresses an edge handed over and
1850 /// into slots of the block's own.
1851 ///
1852 /// What crosses an edge for a value of this type is an address, because the value is sixteen
1853 /// bytes of the frame and no register holds any of it. The block cannot keep that address: a
1854 /// second edge into the same block hands over a second one, and a read after the block would
1855 /// then be a read of whichever edge was taken rather than of one place. So the block has a
1856 /// slot per parameter and the bytes are copied into it here, which is the move on an edge that
1857 /// every other type gets from the allocator.
1858 ///
1859 /// Every load runs before every store and the stores run backwards, so all of the values are
1860 /// on the x87 stack at once and nothing reads a slot another one has already written. That
1861 /// costs nothing in the ordinary case of one parameter and is what makes the back edge of a
1862 /// loop that swaps two of these work. It is also the reason for the limit: the stack is eight
1863 /// deep, and a block with more of these than that is refused rather than copied in an order
1864 /// that could be wrong.
1865 fn settle(&mut self, block: Block, arriving: &[(Value, mir::Reg)]) -> Result<(), Unsupported> {
1866 let Some(&(first, _)) = arriving.first() else { return Ok(()) };
1867 if arriving.len() > X87_DEPTH {
1868 let ty = self.source[first].ty;
1869 return Err(Unsupported::Phi { block, count: arriving.len(), ty });
1870 }
1871 // A block parameter comes from no instruction, so what this points at is the first thing
1872 // in the block, which is where a reader looking for the copy would look.
1873 let first_inst = self.source.insts(block).next();
1874 let span = first_inst.map_or(Span::DUMMY, |it| self.source.span(it));
1875 for &(_, reg) in arriving {
1876 let from = self.through(reg);
1877 self.x87_at("fld_t", span, from);
1878 }
1879 for &(param, _) in arriving.iter().rev() {
1880 let into = self.x87_slot(param);
1881 let into = self.through(into);
1882 self.x87_at("fstp_t", span, into);
1883 }
1884 Ok(())
1885 }
1886
1887 /// The frame slot an eighty bit value lives in, as its address in a fresh register.
1888 ///
1889 /// The slot is the value's for the whole function and is taken the first time somebody asks.
1890 /// The address is worked out again every time, which is a `lea` per use and is deliberate: one
1891 /// address kept in a register from the definition to the last use would hold a general purpose
1892 /// register open across everything in between, and a function with a handful of these in it
1893 /// would spend its registers on addresses of things rather than on things.
1894 fn x87_slot(&mut self, value: Value) -> mir::Reg {
1895 // An argument of the function has a slot already and it is the caller's. The convention
1896 // puts the bytes in the argument area and hands over where they are, so the address that
1897 // arrived is the answer and no second copy of the value is made. Nothing ever writes to a
1898 // value of this type once it exists, so nothing writes to the caller's copy either. A
1899 // parameter of any other block is not this: what arrived there is an address a predecessor
1900 // chose, [`Lowering::settle`] has already copied the bytes out of it, and the slot those
1901 // bytes landed in is the one below.
1902 let entry = self.source.entry();
1903 if let (Def::Param { block, .. }, Some(reg)) =
1904 (self.source[value].def, self.regs[value.index()])
1905 {
1906 if entry == Some(block) {
1907 return reg;
1908 }
1909 }
1910 let index = match self.slots[value.index()] {
1911 Some(index) => index,
1912 None => {
1913 let index = self.stack.locals.len();
1914 self.stack.locals.push(Local { size: X87_BYTES, align: X87_BYTES });
1915 self.slots[value.index()] = Some(index);
1916 index
1917 }
1918 };
1919 let block = self.at.expect("a block is being filled");
1920 self.frame_address(block, index)
1921 }
1922
1923 /// The bytes a value crosses between a register and the x87 stack through, as their address
1924 /// in a fresh register.
1925 fn x87_crossing(&mut self) -> mir::Reg {
1926 let index = match self.crossing {
1927 Some(index) => index,
1928 None => {
1929 let index = self.stack.locals.len();
1930 self.stack.locals.push(Local { size: X87_CROSSING, align: X87_CROSSING });
1931 self.crossing = Some(index);
1932 index
1933 }
1934 };
1935 let block = self.at.expect("a block is being filled");
1936 self.frame_address(block, index)
1937 }
1938
1939 /// The two control words, as the address of the first of them in a fresh register.
1940 fn x87_control(&mut self) -> mir::Reg {
1941 let index = match self.control {
1942 Some(index) => index,
1943 None => {
1944 let index = self.stack.locals.len();
1945 self.stack.locals.push(Local { size: 4, align: 4 });
1946 self.control = Some(index);
1947 index
1948 }
1949 };
1950 let block = self.at.expect("a block is being filled");
1951 self.frame_address(block, index)
1952 }
1953
1954 /// An address held in a register, as the addressing mode that reaches it.
1955 fn through(&self, reg: mir::Reg) -> mir::Mem {
1956 mir::Mem::at(mir::Operand::read(reg, self.gpr))
1957 }
1958
1959 /// One instruction of a group, which names an address and nothing else.
1960 ///
1961 /// Every x87 instruction that moves a value is one of these. What it does to the stack is in
1962 /// the mnemonic rather than in an operand, so there is no register to write down and no
1963 /// register the allocator gets a say in.
1964 fn x87_at(&mut self, name: &str, span: Span, at: mir::Mem) {
1965 let block = self.at.expect("a block is being filled");
1966 let opcode = self.named(name);
1967 self.out.build(block, opcode).at(span).mem(at).finish();
1968 }
1969
1970 /// The one instruction of a group that reaches the program's own memory.
1971 ///
1972 /// A `long double` moves in two instructions with a frame slot at one end of them, and the
1973 /// other end is the address the program wrote. That end is the access, so it is the one that
1974 /// carries what the program said about it, and the trip through the slot is this compiler's
1975 /// own business the way a spill is. See [`Self::carried`].
1976 fn x87_touching(&mut self, name: &str, inst: Inst, at: mir::Mem) {
1977 let block = self.at.expect("a block is being filled");
1978 let opcode = self.named(name);
1979 let (span, flags) = (self.source.span(inst), self.carried(inst));
1980 self.out.build(block, opcode).at(span).flags(flags).mem(at).finish();
1981 }
1982
1983 /// One instruction of a group that names nothing at all.
1984 ///
1985 /// The arithmetic is these. Both of an add's operands are already on the stack when it runs
1986 /// and so is where the answer goes, and the stack is not somewhere an instruction says, so
1987 /// `faddp` has an argument in the assembler's syntax and nothing here for the argument to come
1988 /// from. What it works on is which two pushes came before it, which is a fact about the order
1989 /// of the group and is why the group is written in one place.
1990 fn x87_only(&mut self, name: &str, span: Span) {
1991 let block = self.at.expect("a block is being filled");
1992 let opcode = self.named(name);
1993 self.out.build(block, opcode).at(span).finish();
1994 }
1995
1996 /// A `load` of a `long double`: onto the stack from where it was, and off it into the slot.
1997 ///
1998 /// Two instructions rather than the two general purpose moves the same sixteen bytes would
1999 /// take, because `fld` and `fstp` at this format neither convert nor look: the value goes on
2000 /// in the format it was already in and comes back off in it, so a signalling NaN stays one
2001 /// and nothing is raised. Which is what makes this a copy at all.
2002 fn x87_load(&mut self, inst: Inst) -> Result<(), Unsupported> {
2003 let (args, result) = self.ends(inst)?;
2004 let &address = args.first().ok_or_else(|| self.unsupported(inst))?;
2005 let span = self.source.span(inst);
2006 let from = self.reg_of(address)?;
2007 let from = self.through(from);
2008 let into = self.x87_slot(result);
2009 let into = self.through(into);
2010 self.x87_touching("fld_t", inst, from);
2011 self.x87_at("fstp_t", span, into);
2012 Ok(())
2013 }
2014
2015 /// A `store` of a `long double`: the same pair the other way round.
2016 fn x87_store(&mut self, inst: Inst) -> Result<(), Unsupported> {
2017 let args = self.source[self.source[inst].args].to_vec();
2018 let [value, address] = args[..] else { return Err(self.unsupported(inst)) };
2019 let span = self.source.span(inst);
2020 let from = self.x87_slot(value);
2021 let from = self.through(from);
2022 let into = self.reg_of(address)?;
2023 let into = self.through(into);
2024 self.x87_at("fld_t", span, from);
2025 self.x87_touching("fstp_t", inst, into);
2026 Ok(())
2027 }
2028
2029 /// A `float`, a `double` or an integer becoming a `long double`.
2030 ///
2031 /// Through memory, because the x87 reads memory and nothing else: the value is in a register
2032 /// the machine has and the unit has no way to be handed one, so it is written to the crossing
2033 /// bytes and loaded back at the format that widens it. Every one of these is exact. Sixty four
2034 /// bits of significand and fifteen of exponent hold every `float`, every `double` and every
2035 /// sixty four bit integer outright, so none of the four can round and none can raise.
2036 fn x87_across(
2037 &mut self,
2038 inst: Inst,
2039 put: &'static str,
2040 class: RegClass,
2041 get: &'static str,
2042 ) -> Result<(), Unsupported> {
2043 let (args, result) = self.ends(inst)?;
2044 let &source = args.first().ok_or_else(|| self.unsupported(inst))?;
2045 let span = self.source.span(inst);
2046 let value = self.reg_of(source)?;
2047 let across = self.x87_crossing();
2048 let across = self.through(across);
2049 let into = self.x87_slot(result);
2050 let into = self.through(into);
2051
2052 let block = self.at.expect("a block is being filled");
2053 let store = self.named(put);
2054 self.out.build(block, store).at(span).uses(value, class).mem(across).finish();
2055 self.x87_at(get, span, across);
2056 self.x87_at("fstp_t", span, into);
2057 Ok(())
2058 }
2059
2060 /// A `long double` becoming a `float`, a `double` or an integer.
2061 ///
2062 /// Through memory for the reason above and in the same three instructions backwards. The two
2063 /// that go to a float round to nearest, which is what the control word says unless somebody
2064 /// has changed it and is what C wants. The two that go to an integer do not, which is why they
2065 /// do not come here.
2066 fn x87_back(
2067 &mut self,
2068 inst: Inst,
2069 put: &'static str,
2070 get: &'static str,
2071 class: RegClass,
2072 ) -> Result<(), Unsupported> {
2073 let (args, result) = self.ends(inst)?;
2074 let &source = args.first().ok_or_else(|| self.unsupported(inst))?;
2075 let span = self.source.span(inst);
2076 let from = self.x87_slot(source);
2077 let from = self.through(from);
2078 let across = self.x87_crossing();
2079 let across = self.through(across);
2080
2081 self.x87_at("fld_t", span, from);
2082 self.x87_at(put, span, across);
2083 let block = self.at.expect("a block is being filled");
2084 let reg = self.new_reg(result);
2085 let load = self.named(get);
2086 self.out.build(block, load).at(span).def(reg, class).mem(across).finish();
2087 Ok(())
2088 }
2089
2090 /// An `fpext` up to a `long double`, which is the only direction this machine has one in.
2091 fn x87_widen(&mut self, inst: Inst) -> Result<(), Unsupported> {
2092 let sse = self.conv.sse_class;
2093 match self.source[self.narrow(inst)?].ty.bits() {
2094 32 => self.x87_across(inst, "movss_mr", sse, "fld_s"),
2095 64 => self.x87_across(inst, "movsd_mr", sse, "fld_l"),
2096 _ => Err(self.unsupported(inst)),
2097 }
2098 }
2099
2100 /// An `fptrunc` down from a `long double`, which is the other direction of the same.
2101 fn x87_narrow(&mut self, inst: Inst) -> Result<(), Unsupported> {
2102 let sse = self.conv.sse_class;
2103 let result = self.source[inst].first_result.ok_or_else(|| self.unsupported(inst))?;
2104 match self.source[result].ty.bits() {
2105 32 => self.x87_back(inst, "fstp_s", "movss_rm", sse),
2106 64 => self.x87_back(inst, "fstp_l", "movsd_rm", sse),
2107 _ => Err(self.unsupported(inst)),
2108 }
2109 }
2110
2111 /// A `sitofp` up to a `long double`.
2112 ///
2113 /// Thirty two bits and sixty four, and nothing narrower, because C widens an integer to `int`
2114 /// before it converts one and the front end writes that widening down. An unsigned integer is
2115 /// not here at all: `fild` reads its operand as signed, so a value above the signed range
2116 /// comes back short by two to the sixty fourth and has to be added back, which is arithmetic
2117 /// rather than a move and waits with the rest of it.
2118 fn x87_from_signed(&mut self, inst: Inst) -> Result<(), Unsupported> {
2119 let gpr = self.gpr;
2120 match self.source[self.narrow(inst)?].ty.bits() {
2121 32 => self.x87_across(inst, "mov_mr_32", gpr, "fild_l"),
2122 64 => self.x87_across(inst, "mov_mr_64", gpr, "fild_ll"),
2123 _ => Err(self.unsupported(inst)),
2124 }
2125 }
2126
2127 /// An `fptosi` down from a `long double`, which is the one conversion here with no single
2128 /// instruction behind it.
2129 ///
2130 /// C cuts towards zero and the unit rounds the way its control word says, so the store that
2131 /// takes the value off the stack is wrapped in the control word being saved, changed and put
2132 /// back. Five instructions around the one that does the work, and three more moving the word
2133 /// through a register, because this machine has no way to OR a constant into memory at this
2134 /// width. The unit has a shorter answer in `fisttp`, and `spec/10-backend.md` section 10.8
2135 /// says why it is not used: it is SSE3, the x86-64 baseline is not, and there is nothing here
2136 /// that can gate an instruction on a feature yet.
2137 fn x87_to_signed(&mut self, inst: Inst) -> Result<(), Unsupported> {
2138 let (args, result) = self.ends(inst)?;
2139 let &source = args.first().ok_or_else(|| self.unsupported(inst))?;
2140 let (put, get) = match self.source[result].ty.bits() {
2141 32 => ("fistp_l", "mov_rm_32"),
2142 64 => ("fistp_ll", "mov_rm_64"),
2143 _ => return Err(self.unsupported(inst)),
2144 };
2145 let span = self.source.span(inst);
2146 let gpr = self.gpr;
2147 let from = self.x87_slot(source);
2148 let from = self.through(from);
2149 let across = self.x87_crossing();
2150 let across = self.through(across);
2151 let control = self.x87_control();
2152 let saved = self.through(control).plus(0);
2153 let cut = self.through(control).plus(2);
2154
2155 // The word the unit has now, into the first of the two slots and into a register, with the
2156 // rounding field turned to truncate on the way to the second.
2157 self.x87_at("fnstcw", span, saved);
2158 let block = self.at.expect("a block is being filled");
2159 let was = self.out.new_vreg(gpr);
2160 let read = self.named("mov_rm_16");
2161 self.out.build(block, read).at(span).def(was, gpr).mem(saved).finish();
2162 let now = self.out.new_vreg(gpr);
2163 let set = self.named("or_ri_16");
2164 // Two address, which is written out here rather than taken from the two shorthands
2165 // because the shorthands leave an operand unconstrained: this machine ORs into the
2166 // register it read, so the two have to be the same one and only the constraint says so.
2167 self.out
2168 .build(block, set)
2169 .at(span)
2170 .operand(mir::Operand::write(now, gpr).with(Constraint::Reuse(1)))
2171 .operand(mir::Operand::read(was, gpr))
2172 .imm(X87_TRUNCATE)
2173 .finish();
2174 let write = self.named("mov_mr_16");
2175 self.out.build(block, write).at(span).uses(now, gpr).mem(cut).finish();
2176
2177 // The conversion itself, under the changed word, and then the word the unit had put back
2178 // before anything else runs.
2179 self.x87_at("fldcw", span, cut);
2180 self.x87_at("fld_t", span, from);
2181 self.x87_at(put, span, across);
2182 self.x87_at("fldcw", span, saved);
2183
2184 let block = self.at.expect("a block is being filled");
2185 let reg = self.new_reg(result);
2186 let load = self.named(get);
2187 self.out.build(block, load).at(span).def(reg, gpr).mem(across).finish();
2188 Ok(())
2189 }
2190
2191 /// A constant of this type, as the bits of it written into its slot.
2192 ///
2193 /// No x87 instruction at all, which is the surprise here. A slot holding an eighty bit value is
2194 /// the value, so a constant is ten bytes put where the value lives, and the unit never has to
2195 /// see it: whatever reads it will `fld` it out of the slot the way it reads any other one.
2196 ///
2197 /// Ten bytes in two goes, because the machine stores eight at a time and there is no store of
2198 /// an immediate to memory, so each half is put in a register first. The six bytes above the ten
2199 /// are left alone, since nothing reads them: they are the padding that makes the type sixteen
2200 /// wide and they are unspecified in the psABI rather than zero.
2201 ///
2202 /// The other way is a constant pool, an `fldt` of a symbol, and a relocation, which is what a
2203 /// compiler with somewhere to put a literal does. This back end has nowhere to put one yet, and
2204 /// four instructions in the frame is what that costs until it does.
2205 fn x87_const(&mut self, inst: Inst) -> Result<(), Unsupported> {
2206 let Extra::Imm(imm) = self.source[inst].extra else { return Err(self.unsupported(inst)) };
2207 let result = self.source[inst].first_result.ok_or_else(|| self.unsupported(inst))?;
2208 let bits = self.source[imm].bits();
2209 let span = self.source.span(inst);
2210 let gpr = self.gpr;
2211 let slot = self.x87_slot(result);
2212 let low = self.through(slot).plus(0);
2213 let high = self.through(slot).plus(8);
2214
2215 let block = self.at.expect("a block is being filled");
2216 for (bytes, at, into) in
2217 [(bits as u64 as i64, low, "64"), (((bits >> 64) & 0xffff) as i64, high, "16")]
2218 {
2219 let held = self.out.new_vreg(gpr);
2220 let put = self.named(&format!("mov_ri_{into}"));
2221 self.out.build(block, put).at(span).def(held, gpr).imm(bytes).finish();
2222 let store = self.named(&format!("mov_mr_{into}"));
2223 self.out.build(block, store).at(span).uses(held, gpr).mem(at).finish();
2224 }
2225 Ok(())
2226 }
2227
2228 /// One arithmetic instruction on two eighty bit values, as the four it takes.
2229 ///
2230 /// The left operand is pushed first and the right one on top of it, so the left ends up
2231 /// underneath and the answer wanted is the one below against the top in that order. Which of
2232 /// the two mnemonics computes that is a question about the spelling rather than about the
2233 /// machine, and the two spellings disagree. Intel's `FSUBP ST(i), ST(0)` is `ST(i) - ST(0)`
2234 /// and is `DE E8+i`, and AT&T's `fsubp` is `DE E0+i`, which is the other subtraction. This
2235 /// compiler writes AT&T and encodes what gas encodes, so what it asks for here is `fsubr_p`
2236 /// and `fdivr_p`, and the `r` is not a reversal of anything the code generator decided.
2237 ///
2238 /// An addition and a multiplication have one form each and do not care, which is why a test
2239 /// that reads the mnemonic back would not have caught this and one that computes a subtraction
2240 /// and checks the answer does.
2241 ///
2242 /// The answer is left where the deeper of the two was and the shallower is gone, which is what
2243 /// the `p` on the mnemonic means, so one push has already been paid back by the time the
2244 /// `fstp` runs and the stack is level again after it.
2245 ///
2246 /// Nothing here is folded and nothing is reused. Two values that are the same value get two
2247 /// pushes of the same slot, and an operand that was just computed is read back out of the slot
2248 /// it was written to rather than left on the stack, which costs a store and a load per
2249 /// instruction in an expression. Keeping a partial result on the stack across the next
2250 /// instruction's operands means knowing how deep the stack is at every point in the block, and
2251 /// that is a different thing from writing a group.
2252 fn x87_arith(&mut self, inst: Inst, with: &'static str) -> Result<(), Unsupported> {
2253 let (args, result) = self.ends(inst)?;
2254 let [left, right] = args[..] else { return Err(self.unsupported(inst)) };
2255 let span = self.source.span(inst);
2256 let left = self.x87_slot(left);
2257 let left = self.through(left);
2258 let right = self.x87_slot(right);
2259 let right = self.through(right);
2260 let into = self.x87_slot(result);
2261 let into = self.through(into);
2262 self.x87_at("fld_t", span, left);
2263 self.x87_at("fld_t", span, right);
2264 self.x87_only(with, span);
2265 self.x87_at("fstp_t", span, into);
2266 Ok(())
2267 }
2268
2269 /// A negation, which is a push, the sign bit turned over and a pop.
2270 ///
2271 /// `fchs` does not read the value as a number, so this is right for a zero, for an infinity
2272 /// and for a NaN, and it raises nothing on any of them. Which is what C asks of a negation and
2273 /// is not what subtracting from zero would give: `0.0L - x` is a different answer at a
2274 /// negative zero and a signalling one at a NaN.
2275 fn x87_flip(&mut self, inst: Inst) -> Result<(), Unsupported> {
2276 let (args, result) = self.ends(inst)?;
2277 let &source = args.first().ok_or_else(|| self.unsupported(inst))?;
2278 let span = self.source.span(inst);
2279 let from = self.x87_slot(source);
2280 let from = self.through(from);
2281 let into = self.x87_slot(result);
2282 let into = self.through(into);
2283 self.x87_at("fld_t", span, from);
2284 self.x87_only("fchs", span);
2285 self.x87_at("fstp_t", span, into);
2286 Ok(())
2287 }
2288
2289 /// A comparison of two eighty bit values, as the two pushes and the one opcode that reads them.
2290 ///
2291 /// The right operand is pushed first and the left one on top of it, which is the other way
2292 /// round from the arithmetic and is because `fucomip` asks about the top against what is under
2293 /// it: the comparison this machine can do is the top's, so the value the predicate is about
2294 /// has to be the top. The pop that gets the loser off the stack and the byte that reads the
2295 /// flags are both inside the opcode, since what passes between those and the comparison is the
2296 /// flags and the flags are not something anything here can name.
2297 ///
2298 /// Which of the ten opcodes, and which way round, is the same table the vector comparisons
2299 /// match against in `rules/x86-64.rules`, and it has to stay the same table: a predicate that
2300 /// picked a different condition here than there would be a `long double` comparison that
2301 /// disagreed with the `double` comparison of the same two numbers, which is the one thing a
2302 /// wider format is not allowed to do.
2303 ///
2304 /// The always false and the always true are refused rather than folded into a constant,
2305 /// because a comparison this machine never has to do is one the optimizer should have removed
2306 /// and an instruction here that quietly agreed with it would hide that it did not.
2307 fn x87_compare(&mut self, inst: Inst) -> Result<(), Unsupported> {
2308 let Extra::FloatPred(pred) = self.source[inst].extra else {
2309 return Err(self.unsupported(inst));
2310 };
2311 let (args, result) = self.ends(inst)?;
2312 let [left, right] = args[..] else { return Err(self.unsupported(inst)) };
2313 // Two of the fourteen need a second byte and an instruction to put the two together,
2314 // because they are two conditions at once: an ordered equal is equal and not unordered,
2315 // and an unordered not equal is either. The opcode carries all of that and says here only
2316 // that it writes somewhere else as well.
2317 let (name, reversed, both) = match pred {
2318 FloatPred::Ogt => ("fucomip_set_a", false, false),
2319 FloatPred::Oge => ("fucomip_set_ae", false, false),
2320 FloatPred::Olt => ("fucomip_set_a", true, false),
2321 FloatPred::Ole => ("fucomip_set_ae", true, false),
2322 FloatPred::One => ("fucomip_set_ne", false, false),
2323 FloatPred::Ord => ("fucomip_set_np", false, false),
2324 FloatPred::Uno => ("fucomip_set_p", false, false),
2325 FloatPred::Ueq => ("fucomip_set_e", false, false),
2326 FloatPred::Ult => ("fucomip_set_b", false, false),
2327 FloatPred::Ule => ("fucomip_set_be", false, false),
2328 FloatPred::Ugt => ("fucomip_set_b", true, false),
2329 FloatPred::Uge => ("fucomip_set_be", true, false),
2330 FloatPred::Oeq => ("fucomip_set_e_and_np", false, true),
2331 FloatPred::Une => ("fucomip_set_ne_or_p", false, true),
2332 FloatPred::False | FloatPred::True => return Err(self.unsupported(inst)),
2333 };
2334 let (top, under) = if reversed { (right, left) } else { (left, right) };
2335
2336 let span = self.source.span(inst);
2337 let gpr = self.gpr;
2338 let under = self.x87_slot(under);
2339 let under = self.through(under);
2340 let top = self.x87_slot(top);
2341 let top = self.through(top);
2342 self.x87_at("fld_t", span, under);
2343 self.x87_at("fld_t", span, top);
2344
2345 let block = self.at.expect("a block is being filled");
2346 let reg = self.new_reg(result);
2347 // Taken before the instruction is started rather than inside it, since both come from the
2348 // same function being built and only one thing at a time may be adding to it.
2349 let spare = both.then(|| self.out.new_vreg(gpr));
2350 let opcode = self.named(name);
2351 let mut build = self.out.build(block, opcode).at(span).def(reg, gpr);
2352 if let Some(spare) = spare {
2353 build = build.def(spare, gpr);
2354 }
2355 build.finish();
2356 Ok(())
2357 }
2358
2359 /// The operands and the one result of an instruction that has exactly one.
2360 fn ends(&self, inst: Inst) -> Result<(&'a [Value], Value), Unsupported> {
2361 let data = &self.source[inst];
2362 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
2363 Ok((&self.source[data.args], result))
2364 }
2365
2366 /// The operand of a conversion, which is the end of it that is not the `long double`.
2367 fn narrow(&self, inst: Inst) -> Result<Value, Unsupported> {
2368 let args = &self.source[self.source[inst].args];
2369 args.first().copied().ok_or_else(|| self.unsupported(inst))
2370 }
2371
2372 /// One `va_start`, as the fields of the list it was handed.
2373 ///
2374 /// On the four field list, two of them are numbers this already knows, and each costs an
2375 /// instruction to put in a register before it can be stored, because the machine here has no
2376 /// store of an immediate to memory. The other two are addresses in the frame, and each is a
2377 /// `lea` [`crate::finish`] finishes: the save area is one of the function's own stack objects,
2378 /// and the caller's argument area is where the parameters that had no register came from, which
2379 /// is the same place and the same fixup a parameter past the sixth already uses.
2380 ///
2381 /// On the list that is a pointer it is the second of those four and nothing else, since the
2382 /// whole of what that list says is where the walk is and the walk starts at the first argument
2383 /// the signature does not name. One `lea` and one store.
2384 ///
2385 /// What is written is exactly the fields [`crate::varargs`] describes, in the order they are
2386 /// laid out, so that reading this beside that table is the whole of the check.
2387 fn va_start(&mut self, inst: Inst) -> Result<(), Unsupported> {
2388 let Some(&list) = self.source[self.source[inst].args].first() else {
2389 return Err(self.unsupported(inst));
2390 };
2391 let started = self.varargs.ok_or_else(|| self.unsupported(inst))?;
2392 let list = self.reg_of(list)?;
2393 let block = self.at.expect("a block is being filled");
2394 let span = self.source.span(inst);
2395
2396 let (save, incoming) = match started {
2397 Varargs::Pointer { incoming } => (None, incoming),
2398 Varargs::Fields { save, incoming, integers, floats } => {
2399 let counts = [(varargs::GP_OFFSET, integers), (varargs::FP_OFFSET, floats)];
2400 for (at, count) in counts {
2401 self.store_small(list, at, i64::from(count), span);
2402 }
2403 (Some(save), incoming)
2404 }
2405 Varargs::Aapcs { save, incoming, integers_end, floats_end, integers, floats } => {
2406 let counts =
2407 [(varargs::aapcs::GR_OFFS, integers), (varargs::aapcs::VR_OFFS, floats)];
2408 for (at, count) in counts {
2409 self.store_small(list, at, i64::from(count), span);
2410 }
2411 let overflow = self.overflow(block, incoming, span);
2412 let integers_top = self.frame_address_plus(block, save, integers_end);
2413 let floats_top = self.frame_address_plus(block, save, floats_end);
2414 let fields = [
2415 (varargs::aapcs::STACK, overflow),
2416 (varargs::aapcs::GR_TOP, integers_top),
2417 (varargs::aapcs::VR_TOP, floats_top),
2418 ];
2419 for (at, held) in fields {
2420 self.store_word(list, at, held, span);
2421 }
2422 return Ok(());
2423 }
2424 };
2425
2426 // At the front of the list when that address is the whole of it, and at the field the
2427 // layout gives it when there are four, with the save area behind it.
2428 let overflow = self.overflow(block, incoming, span);
2429 let fields = match save {
2430 None => vec![(0, overflow)],
2431 Some(save) => {
2432 let save = self.frame_address(block, save);
2433 vec![(varargs::OVERFLOW, overflow), (varargs::SAVE_AREA, save)]
2434 }
2435 };
2436 for (at, held) in fields {
2437 self.store_word(list, at, held, span);
2438 }
2439 Ok(())
2440 }
2441
2442 /// The first argument the signature did not name, which is as far up the caller's argument
2443 /// area as the ones it did name reached. Nothing here knows where that area is, so the distance
2444 /// is recorded the way a parameter read out of it is and finished with it.
2445 fn overflow(&mut self, block: mir::Block, incoming: u32, span: Span) -> mir::Reg {
2446 let overflow = self.out.new_vreg(self.gpr);
2447 let lea = self.named(self.selector.frame.lea);
2448 let sp = mir::Operand::read(mir::Reg::physical(self.conv.stack_pointer), self.gpr);
2449 let made = self
2450 .out
2451 .build(block, lea)
2452 .at(span)
2453 .def(overflow, self.gpr)
2454 .mem(mir::Mem::at(sp))
2455 .finish();
2456 self.stack.arguments.push((made, incoming));
2457 overflow
2458 }
2459
2460 /// Writes a small constant into a 32 bit field of a list.
2461 fn store_small(&mut self, list: mir::Reg, at: i64, value: i64, span: Span) {
2462 let block = self.at.expect("a block is being filled");
2463 let held = self.out.new_vreg(self.gpr);
2464 let load = mir::Opcode::new(self.names.intern(self.selector.abi.small));
2465 self.out.build(block, load).at(span).def(held, self.gpr).imm(value).finish();
2466
2467 let head = (self.selector.abi.store)(Type::int(32)).expect("a store of a word");
2468 let store = mir::Opcode::new(self.names.intern(head));
2469 let mem = self.field(list, at);
2470 self.out.build(block, store).at(span).uses(held, self.gpr).mem(mem).finish();
2471 }
2472
2473 /// Writes an address into a pointer field of a list.
2474 fn store_word(&mut self, list: mir::Reg, at: i64, held: mir::Reg, span: Span) {
2475 let block = self.at.expect("a block is being filled");
2476 let head = (self.selector.abi.store)(Type::int(64)).expect("a store of an address");
2477 let store = mir::Opcode::new(self.names.intern(head));
2478 let mem = self.field(list, at);
2479 self.out.build(block, store).at(span).uses(held, self.gpr).mem(mem).finish();
2480 }
2481
2482 /// One field of a list, as the addressing mode that reaches it.
2483 fn field(&self, list: mir::Reg, at: i64) -> mir::Mem {
2484 let base = mir::Operand::read(list, self.gpr);
2485 mir::Mem::at(base).plus(i32::try_from(at).expect("a field of a list is a small offset"))
2486 }
2487
2488 /// The address of a name: one `lea` off the instruction pointer, with the name on it.
2489 ///
2490 /// That is x86-64, and [`Selector::symbols`] is what says so. AArch64 writes the same thing as
2491 /// an `adrp` of the page and an `add` of the low twelve bits, which is one opcode with the name
2492 /// as its own symbol and no addressing mode, and the table read is an `adrp` and an `ldr`.
2493 ///
2494 /// The same instruction an `alloca` gets and for a related reason. An address that is not in
2495 /// the program is a `lea` of an addressing mode that names no register, and the mode carries
2496 /// the symbol so that [`rucc_asm`] can write it relative to `%rip` and leave the relocation
2497 /// for the assembler. Both halves of that already existed: the printer writes `sym(%rip)` and
2498 /// the encoder emits the relocation, because a call to a name the file does not define needed
2499 /// them first.
2500 ///
2501 /// One `mov` and not one `lea` when the name is one [`Elsewhere`] holds, because the distance
2502 /// the `lea` adds to the instruction pointer is a number only a link that puts the name in
2503 /// this program can work out, and the address of a function this file merely declares is not
2504 /// such a number. The load reads the address out of the slot the linker fills in instead. The
2505 /// linker turns it back into the `lea` when the name turns out to have been here all along,
2506 /// so this is not slower in the case that was already right.
2507 ///
2508 /// There is deliberately no name for this in [`crate::term`], which is what stops the address
2509 /// being folded into the instruction that reads it. Folding it is the right thing to do and
2510 /// is what turns a load of a global from two instructions into one, but it is a separate
2511 /// question about addressing modes and issue #282 is it. Until then the address is in a
2512 /// register before anything uses it, which is correct and one instruction longer.
2513 ///
2514 /// What this does not do is give the name anything to refer to. A module carries its globals
2515 /// and nothing writes them out, so a file that defines the variable it reads compiles to a
2516 /// reference the linker cannot resolve. Issue #293 is the other half.
2517 ///
2518 /// A thread-local variable is neither of the two above and is [`Self::thread_address`].
2519 fn address_of(&mut self, inst: Inst) -> Result<(), Unsupported> {
2520 let data = &self.source[inst];
2521 let Extra::Symbol(symbol) = data.extra else { return Err(self.unsupported(inst)) };
2522 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
2523 if self.elsewhere.thread(symbol) {
2524 return self.thread_address(inst, symbol, result);
2525 }
2526
2527 let block = self.at.expect("a block is being filled");
2528 let reg = self.new_reg(result);
2529 let span = self.source.span(inst);
2530 let far = self.elsewhere.holds(symbol);
2531 let symbols = self.selector.symbols;
2532 match if far { symbols.far } else { symbols.near } {
2533 Reach::Mode(name) => {
2534 let mem = if far { mir::Mem::got(symbol) } else { mir::Mem::of(symbol) };
2535 let opcode = self.named(name);
2536 self.out.build(block, opcode).at(span).def(reg, self.gpr).mem(mem).finish();
2537 }
2538 Reach::Own(name) => {
2539 let opcode = self.named(name);
2540 self.out.build(block, opcode).at(span).def(reg, self.gpr).symbol(symbol).finish();
2541 }
2542 }
2543 Ok(())
2544 }
2545
2546 /// The address of a thread-local variable, which is this thread's copy of it.
2547 ///
2548 /// Neither instruction the ordinary case writes would mean anything here. There is no distance
2549 /// to the variable for a `lea` to add, because there is no variable: there is one copy of it per
2550 /// thread and they are at different addresses, so a link asked for the distance to the name
2551 /// refuses rather than picking one. And there is no address for a table slot to hold either, for
2552 /// the same reason.
2553 ///
2554 /// What is the same in every thread is where the variable sits inside the block of storage a
2555 /// thread gets, so that offset is what the link writes down, and the address of the running
2556 /// thread's block is what turns it into an address. x86-64 keeps that address in `%fs`, at the
2557 /// front of the block, so the whole of this is three instructions:
2558 ///
2559 /// ```text
2560 /// movq x@gottpoff(%rip), %off # how far into the block x sits, which the link fills in
2561 /// movq %fs:0, %tp # where this thread's block is, which only the machine knows
2562 /// addq %tp, %off # this thread's copy of x
2563 /// ```
2564 ///
2565 /// That is the initial exec model. It is one instruction longer than what gcc writes at `-O2`
2566 /// in an executable, which folds the addition into the instruction that uses the address, and
2567 /// the difference is issue #282 rather than anything about threads: nothing here folds an
2568 /// address into its reader yet. The link relaxes the first instruction into an immediate when it
2569 /// is making an executable, since it lays the blocks out and therefore knows the number, so the
2570 /// table slot costs nothing in the case that is common.
2571 ///
2572 /// It is not the most general model. A library loaded by `dlopen` gets its storage after the
2573 /// program is already running, and the block this reaches was laid out before it started, so
2574 /// the loader has to find room in that block for the library's variables. glibc keeps a little
2575 /// spare room for exactly this and a library that fits in it loads and runs; one that does not
2576 /// fails to load, with a message saying so. The model with no such limit calls `__tls_get_addr`
2577 /// and is what gcc writes under `-fPIC` by default, and it is issue #1104.
2578 ///
2579 /// So this is the model gcc writes under `-ftls-model=initial-exec`: right for an executable,
2580 /// right for a library the program is linked against, and a load that either works or is
2581 /// refused out loud for a library something opens later. What it is never is quietly wrong.
2582 ///
2583 /// AArch64 Linux is the same three steps. The slot is reached with `adrp` and `ldr` against
2584 /// `:gottprel:`, the thread pointer is `tpidr_el0` read with `mrs`, and the add has three
2585 /// operands. Apple's platforms reach a thread-local variable through a descriptor call instead,
2586 /// which is [`Self::thread_descriptor`].
2587 fn thread_address(
2588 &mut self,
2589 inst: Inst,
2590 symbol: Symbol,
2591 result: Value,
2592 ) -> Result<(), Unsupported> {
2593 if self.elsewhere.described() {
2594 return self.thread_descriptor(inst, symbol, result);
2595 }
2596 let block = self.at.expect("a block is being filled");
2597 let span = self.source.span(inst);
2598 let gpr = self.gpr;
2599
2600 let offset = self.out.new_vreg(gpr);
2601 match self.selector.symbols.thread {
2602 Reach::Mode(name) => {
2603 let load = self.named(name);
2604 let mem = mir::Mem::thread(symbol);
2605 self.out.build(block, load).at(span).def(offset, gpr).mem(mem).finish();
2606 }
2607 Reach::Own(name) => {
2608 let load = self.named(name);
2609 self.out.build(block, load).at(span).def(offset, gpr).symbol(symbol).finish();
2610 }
2611 }
2612 let pointer = self.out.new_vreg(gpr);
2613 self.read_thread_pointer(block, span, pointer);
2614
2615 // Two address on x86-64, for the reason `x87_to_int` gives: that machine adds into the
2616 // register it read, and only the constraint says the two are the same one.
2617 let reg = self.new_reg(result);
2618 let jumps = self.selector.jumps;
2619 let add = self.named(jumps.add);
2620 let written = mir::Operand::write(reg, gpr);
2621 let written = if jumps.two_address { written.with(Constraint::Reuse(1)) } else { written };
2622 self.out
2623 .build(block, add)
2624 .at(span)
2625 .operand(written)
2626 .operand(mir::Operand::read(offset, gpr))
2627 .operand(mir::Operand::read(pointer, gpr))
2628 .finish();
2629 Ok(())
2630 }
2631
2632 /// A thread-local variable on Mach-O, which is a call.
2633 ///
2634 /// The slot the machine's thread load reads holds the address of the variable's descriptor
2635 /// there, `_v@TLVP` on x86-64 and `_v@TLVPPAGE` with `_v@TLVPPAGEOFF` on AArch64. The first
2636 /// word of the descriptor is the function that finds this thread's copy, and it takes the
2637 /// descriptor's address as its one argument and gives back the copy's address. That is the
2638 /// sequence clang writes on both machines.
2639 ///
2640 /// The call is built as an ordinary call through an address, so it costs what any call costs:
2641 /// everything the convention does not preserve is taken to be gone across it. Apple's function
2642 /// keeps more than that, all but the result and the two scratch registers on AArch64, and
2643 /// taking the fewer registers as gone would be faster. What this gives up is speed, and a
2644 /// function that reads a thread-local is no longer a leaf.
2645 fn thread_descriptor(
2646 &mut self,
2647 inst: Inst,
2648 symbol: Symbol,
2649 result: Value,
2650 ) -> Result<(), Unsupported> {
2651 let block = self.at.expect("a block is being filled");
2652 let span = self.source.span(inst);
2653 let gpr = self.gpr;
2654
2655 let descriptor = self.out.new_vreg(gpr);
2656 match self.selector.symbols.thread {
2657 Reach::Mode(name) => {
2658 let load = self.named(name);
2659 let mem = mir::Mem::thread(symbol);
2660 self.out.build(block, load).at(span).def(descriptor, gpr).mem(mem).finish();
2661 }
2662 Reach::Own(name) => {
2663 let load = self.named(name);
2664 let build = self.out.build(block, load).at(span);
2665 build.def(descriptor, gpr).symbol(symbol).finish();
2666 }
2667 }
2668 let finder = self.out.new_vreg(gpr);
2669 let word = (self.selector.abi.load)(Type::PTR).ok_or_else(|| self.unsupported(inst))?;
2670 let word = mir::Opcode::new(self.names.intern(word));
2671 let mem = mir::Mem::at(mir::Operand::read(descriptor, gpr));
2672 self.out.build(block, word).at(span).def(finder, gpr).mem(mem).finish();
2673
2674 let args = [abi::Passing { ty: Type::PTR, reg: descriptor, abi: Abi::default() }];
2675 let what = abi::Calling {
2676 callee: abi::Callee::Through(finder),
2677 args: &args,
2678 returns: &[Type::PTR],
2679 variadic: false,
2680 named: 1,
2681 at: span,
2682 };
2683 let made = abi::call(&mut self.out, block, &what, self.conv, self.selector.abi, self.names)
2684 .map_err(|refused| Unsupported::Call { inst, refused })?;
2685 let calls = &mut self.stack.calls;
2686 *calls = Some(calls.unwrap_or(0).max(made.outgoing));
2687 let &[reg] = &made.results[..] else { return Err(self.unsupported(inst)) };
2688 self.regs[result.index()] = Some(reg);
2689 Ok(())
2690 }
2691
2692 /// Refuses the thread pointer where it is not written, which is Mach-O. Apple keeps it in a
2693 /// different register from the one Linux does on both machines, and nothing written for it
2694 /// has been checked on one.
2695 fn threads_written(&self, inst: Inst) -> Result<(), Unsupported> {
2696 if self.elsewhere.described() {
2697 return Err(Unsupported::Unported { inst: Some(inst), what: Unported::Thread });
2698 }
2699 Ok(())
2700 }
2701
2702 /// The front of this thread's block into `reg`.
2703 ///
2704 /// On x86-64 that is the one thing no instruction can work out: `%fs` is not a register a
2705 /// program can read, and what it points at is a word holding its own address, so reading
2706 /// through it at zero is how the address is come by. AArch64 keeps it in `tpidr_el0`, which
2707 /// `mrs` reads.
2708 fn read_thread_pointer(&mut self, block: mir::Block, span: Span, reg: mir::Reg) {
2709 let gpr = self.gpr;
2710 match self.selector.symbols.pointer {
2711 Pointer::Segment(name, segment) => {
2712 let load = self.named(name);
2713 let at = mir::Mem::in_segment(segment, 0);
2714 self.out.build(block, load).at(span).def(reg, gpr).mem(at).finish();
2715 }
2716 Pointer::Own(name) => {
2717 let read = self.named(name);
2718 self.out.build(block, read).at(span).def(reg, gpr).finish();
2719 }
2720 }
2721 }
2722
2723 /// `&&label`, GNU's address of a label, which is the same `lea` a global gets against a place
2724 /// in this same function.
2725 ///
2726 /// What the two have in common is the whole of the instruction: an address worked out from
2727 /// where the instruction is, which is what `(%rip)` means and is the only way this compiler
2728 /// reaches anything. What they do not have in common is what fills the four bytes in. A
2729 /// global is a name, so the number is a relocation and the linker writes it. A block is a
2730 /// place in this function, so both ends are in one section and the number is known as soon as
2731 /// the blocks have been laid out, which is why `rucc_asm` fills it in the way it fills in a
2732 /// jump rather than leaving a relocation behind.
2733 ///
2734 /// Nothing here says the block is one control can arrive at. That is said by the
2735 /// [`Opcode::IndirectBr`] that reads the address, which lists every block it can arrive at,
2736 /// and by nothing else: an address on its own is a number.
2737 fn block_address(&mut self, inst: Inst) -> Result<(), Unsupported> {
2738 let result = self.source[inst].first_result.ok_or_else(|| self.unsupported(inst))?;
2739 let Some(call) = self.source.successors(inst).next() else {
2740 return Err(self.unsupported(inst));
2741 };
2742 let block = self.at.expect("a block is being filled");
2743 let reg = self.new_reg(result);
2744 let span = self.source.span(inst);
2745 let opcode = self.named(self.selector.jumps.near);
2746 let mem = mir::Mem::block(self.out_block(call.block));
2747 self.out.build(block, opcode).at(span).def(reg, self.gpr).mem(mem).finish();
2748 Ok(())
2749 }
2750
2751 /// `goto *p`, GNU's computed goto, which is a jump through a register.
2752 ///
2753 /// Where it goes is not written here and cannot be. Every block it can arrive at is on the
2754 /// block this ends, the way every other arm is, and which of them the address holds is decided
2755 /// while the program runs. So this is one instruction with one operand, and the arms are
2756 /// copied across by [`Self::edges`] like anybody else's.
2757 fn indirect_branch(&mut self, inst: Inst) -> Result<(), Unsupported> {
2758 let data = &self.source[inst];
2759 let &address = self.source[data.args].first().ok_or_else(|| self.unsupported(inst))?;
2760 let reg = self.reg_of(address)?;
2761 let block = self.at.expect("a block is being filled");
2762 let span = self.source.span(inst);
2763 let name = self.selector.branch.indirect;
2764 let opcode = self.named(name);
2765 self.out.build(block, opcode).at(span).operand(mir::Operand::read(reg, self.gpr)).finish();
2766 Ok(())
2767 }
2768
2769 /// A `switch` on an index from zero up, as a jump through a table of this function.
2770 ///
2771 /// Every `switch` that reaches here is one `crate::switch` left behind on purpose: it has
2772 /// already checked the value is inside the table and taken the lowest case off it, so the
2773 /// operand is a 64 bit index, the cases are the values from zero up with gaps where the
2774 /// program had no case, and the default is only where those gaps go. What is written is the
2775 /// shape gcc writes for the same statement in position independent code:
2776 ///
2777 /// ```text
2778 /// leaq table(%rip), %base
2779 /// movslq (%base,%index,4), %offset
2780 /// addq %base, %offset
2781 /// jmp *%offset
2782 /// ```
2783 ///
2784 /// The table holds distances from itself to each arm rather than addresses, which is what
2785 /// lets it be filled in by the assembler with nothing left for a linker to do. Each cell is
2786 /// stored as the place of an arm among this block's successors, which [`Self::edges`] copies
2787 /// across in the IR's own order, the default first and then one per case. See
2788 /// [`mir::Table`] for why a place and not a block.
2789 fn jump_table(&mut self, inst: Inst) -> Result<(), Unsupported> {
2790 let data = &self.source[inst];
2791 let Extra::Switch(info) = data.extra else { return Err(self.unsupported(inst)) };
2792 let &index = self.source[data.args].first().ok_or_else(|| self.unsupported(inst))?;
2793 let ty = self.source[index].ty;
2794 if ty != Type::int(u64::BITS) {
2795 return Err(self.unsupported(inst));
2796 }
2797 let cases = self.source[self.source[info].cases].to_vec();
2798 let mut cells: Vec<u32> = Vec::new();
2799 for (arm, case) in cases.iter().enumerate() {
2800 let at = usize::try_from(case.signed(ty)).map_err(|_| self.unsupported(inst))?;
2801 if at >= cells.len() {
2802 cells.resize(at + 1, 0);
2803 }
2804 cells[at] = u32::try_from(arm + 1).map_err(|_| self.unsupported(inst))?;
2805 }
2806 let reg = self.reg_of(index)?;
2807 let block = self.at.expect("a block is being filled");
2808 let span = self.source.span(inst);
2809 let gpr = self.gpr;
2810 let table = u32::try_from(self.out.tables.len()).expect("fewer tables than that");
2811
2812 let jumps = self.selector.jumps;
2813
2814 let base = self.out.new_vreg(gpr);
2815 let near = self.named(jumps.near);
2816 self.out.build(block, near).at(span).def(base, gpr).mem(mir::Mem::table(table)).finish();
2817 let offset = self.out.new_vreg(gpr);
2818 let cell =
2819 mir::Mem::at(mir::Operand::read(base, gpr)).indexed(mir::Operand::read(reg, gpr), 4);
2820 let load = self.named(jumps.cell);
2821 self.out.build(block, load).at(span).def(offset, gpr).mem(cell).finish();
2822 // Two address on x86-64, for the reason `thread_pointer` gives.
2823 let to = self.out.new_vreg(gpr);
2824 let add = self.named(jumps.add);
2825 let written = mir::Operand::write(to, gpr);
2826 let written = if jumps.two_address { written.with(Constraint::Reuse(1)) } else { written };
2827 self.out
2828 .build(block, add)
2829 .at(span)
2830 .operand(written)
2831 .operand(mir::Operand::read(offset, gpr))
2832 .operand(mir::Operand::read(base, gpr))
2833 .finish();
2834 let jump = self.named(self.selector.branch.indirect);
2835 let jump =
2836 self.out.build(block, jump).at(span).operand(mir::Operand::read(to, gpr)).finish();
2837 self.out.tables.push(mir::Table { jump, cells });
2838 Ok(())
2839 }
2840
2841 /// `__builtin_setjmp`, which writes down where the function is so that a `__builtin_longjmp`
2842 /// somewhere else can bring control back here, and answers zero on the way past.
2843 ///
2844 /// Four words of the buffer, the three gcc writes and one of this compiler's own, and then the
2845 /// block ends: everything after the save in the IR block is put into a new machine IR block,
2846 /// and the address of that block is what went into the buffer. That is the whole reason the
2847 /// block is split here. An address points at a label, a machine IR block is the only thing in
2848 /// this representation that has one, and a save is in the middle of a block rather than at the
2849 /// end of one.
2850 ///
2851 /// # How the answer gets back
2852 ///
2853 /// Through the frame rather than through a register. The save writes a zero into a word of its
2854 /// own frame, puts the address of that word in the buffer, and the new block reads the word
2855 /// back. The restore writes a one through the address it finds in the buffer before it goes.
2856 /// So one load answers zero on the way past and one on the way back, and neither path has to
2857 /// agree with the other about a register.
2858 ///
2859 /// gcc does it the other way round, with a second block that sets the answer to one and is
2860 /// what the restore arrives at. That block is one nothing in the function jumps to, and a
2861 /// machine IR whose blocks are walked from the entry has nowhere to put such a thing: the
2862 /// allocator lays a function out in the line it is going to be emitted in, and a block no edge
2863 /// reaches is not in that line. The word in the frame costs eight bytes of stack and one load,
2864 /// and it needs nothing said anywhere about a block arrived at from outside.
2865 ///
2866 /// # What the allocator is told
2867 ///
2868 /// That every register it hands out is gone at the end of the first block. That is what makes
2869 /// the rest of the function right on the way back: control arrives from a `__builtin_longjmp`
2870 /// in some other function, and the only two registers that puts back are the stack pointer and
2871 /// the frame pointer, so anything this function still wants has to be in the frame those two
2872 /// reach. It is said with a write of every one of those registers, which is the same thing a
2873 /// call says about the registers a callee may destroy, on an instruction with nothing else on
2874 /// it so that the stores above are not caught up in it.
2875 fn saves_place(&mut self, inst: Inst) -> Result<(), Unsupported> {
2876 let data = &self.source[inst];
2877 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
2878 let &buffer = self.source[data.args].first().ok_or_else(|| self.unsupported(inst))?;
2879 let span = self.source.span(inst);
2880 let buf = self.reg_of(buffer)?;
2881 let at = self.at.expect("a block is being filled");
2882 let gpr = self.gpr;
2883 let moves = self.selector.frame.moves(gpr).expect("a class the target says how to move");
2884 let store = self.named(moves.store);
2885 let load = self.named(moves.load);
2886 let lea = self.named(self.selector.frame.lea);
2887 let put = self.named(self.selector.frame.imm);
2888 let nothing =
2889 self.selector.frame.pad.expect("a target with an instruction that does nothing");
2890 let nothing = self.named(nothing);
2891 self.stack.saves_place = true;
2892 let answer = self.answer_slot();
2893 let back = self.out.create_block();
2894
2895 // The zero this answers with, into the word a restore writes a one into.
2896 let zero = self.out.new_vreg(gpr);
2897 self.out.build(at, put).at(span).def(zero, gpr).imm(0).finish();
2898 let mem = self.frame_mem();
2899 let made = self.out.build(at, store).at(span).uses(zero, gpr).mem(mem).finish();
2900 self.stack.addresses.push((made, answer));
2901
2902 // The four words: where that word is, where control comes back to, and the two registers
2903 // the restore puts back.
2904 let found = self.frame_address(at, answer);
2905 self.write_word(at, span, store, found, buf, JUMP_ANSWER);
2906 let pc = self.out.new_vreg(gpr);
2907 self.out.build(at, lea).at(span).def(pc, gpr).mem(mir::Mem::block(back)).finish();
2908 self.write_word(at, span, store, pc, buf, JUMP_PC);
2909 let frame = mir::Reg::physical(self.conv.frame_pointer);
2910 self.write_word(at, span, store, frame, buf, JUMP_FRAME);
2911 let stack = mir::Reg::physical(self.conv.stack_pointer);
2912 self.write_word(at, span, store, stack, buf, JUMP_STACK);
2913
2914 // Nothing is in a register past this point, which is what the rest of the function is
2915 // allowed to assume about the way back in.
2916 let gone = self.across_jump();
2917 let mut build = self.out.build(at, nothing).at(span);
2918 for (reg, class) in gone {
2919 build = build.operand(mir::Operand::write(reg, class));
2920 }
2921 build.finish();
2922
2923 // And the rest of the block, which is the block the address above was of.
2924 *self.out.succs_mut(at) = vec![mir::BlockCall::to(back)];
2925 self.at = Some(back);
2926 let reg = self.new_reg(result);
2927 let mem = self.frame_mem();
2928 let made = self.out.build(back, load).at(span).def(reg, gpr).mem(mem).finish();
2929 self.stack.addresses.push((made, answer));
2930 Ok(())
2931 }
2932
2933 /// `__builtin_longjmp`, which reads a buffer a `__builtin_setjmp` filled in and goes there.
2934 ///
2935 /// Everything comes out of the buffer before anything is put back, and the four registers it
2936 /// comes out into are physical ones rather than values the allocator places. Both of those are
2937 /// about the same moment. The stack pointer is one of the things being put back, a value the
2938 /// allocator sent to the stack is reached through the stack pointer, and between the
2939 /// instruction that moves it and the jump there is no stack this function owns any more. A
2940 /// register named outright is a register nothing reloads into and nothing else is in, which is
2941 /// the only way to hold something across that moment.
2942 ///
2943 /// Four of them because that is how many things are in the air at once: where to go, the frame
2944 /// pointer to put back, the one the matching save is to answer with, and one register used
2945 /// twice, first for the address that one is written through and then for the stack pointer.
2946 ///
2947 /// Nothing after this in the block is reached. The marker is not a terminator, for the reason
2948 /// `spec/08-ir.md` gives, so the block goes on and whatever the front end wrote after it is
2949 /// written out and never run.
2950 fn comes_back(&mut self, inst: Inst) -> Result<(), Unsupported> {
2951 let data = &self.source[inst];
2952 let &buffer = self.source[data.args].first().ok_or_else(|| self.unsupported(inst))?;
2953 let span = self.source.span(inst);
2954 let buf = self.reg_of(buffer)?;
2955 let at = self.at.expect("a block is being filled");
2956 let gpr = self.gpr;
2957 let moves = self.selector.frame.moves(gpr).expect("a class the target says how to move");
2958 let load = self.named(moves.load);
2959 let store = self.named(moves.store);
2960 let mov = self.named(moves.mov);
2961 let put = self.named(self.selector.frame.imm);
2962 let jump = self.named(self.selector.branch.indirect);
2963
2964 let held = self.jump_regs();
2965 if held.len() < JUMP_REGS {
2966 return Err(self.unsupported(inst));
2967 }
2968 let pc = mir::Reg::physical(held[0]);
2969 let frame = mir::Reg::physical(held[1]);
2970 let spare = mir::Reg::physical(held[2]);
2971 let one = mir::Reg::physical(held[3]);
2972
2973 self.read_word(at, span, load, pc, buf, JUMP_PC);
2974 self.read_word(at, span, load, frame, buf, JUMP_FRAME);
2975 self.read_word(at, span, load, spare, buf, JUMP_ANSWER);
2976
2977 // What the matching save answers with, written through the address that came out of the
2978 // buffer, because the word it goes in is in the other function's frame and this one has no
2979 // way of knowing where that is.
2980 self.out.build(at, put).at(span).def(one, gpr).imm(1).finish();
2981 let mem = mir::Mem::at(mir::Operand::read(spare, gpr));
2982 self.out.build(at, store).at(span).uses(one, gpr).mem(mem).finish();
2983
2984 // The stack last of the four, so that the register the buffer is reached through is done
2985 // with before the stack it may have been spilled to stops being this function's.
2986 self.read_word(at, span, load, spare, buf, JUMP_STACK);
2987 let stack = mir::Reg::physical(self.conv.stack_pointer);
2988 self.copy(at, span, mov, stack, spare);
2989 let base = mir::Reg::physical(self.conv.frame_pointer);
2990 self.copy(at, span, mov, base, frame);
2991
2992 // And the jump, which reads the two registers just put back as well as the address it
2993 // goes through. Neither of those is printed, because the target's spelling of an indirect
2994 // jump has one argument and it is the first one read. They are there because the code
2995 // control arrives at reaches its frame through them, and because without them the two
2996 // instructions above write registers nothing reads: a scheduler is then free to put the
2997 // jump in front of them, and at `-O2` it does.
2998 self.out
2999 .build(at, jump)
3000 .at(span)
3001 .operand(mir::Operand::read(pc, gpr))
3002 .operand(mir::Operand::read(stack, gpr))
3003 .operand(mir::Operand::read(base, gpr))
3004 .finish();
3005 Ok(())
3006 }
3007
3008 /// One word of the buffer of a `__builtin_setjmp`, written from a register.
3009 fn write_word(
3010 &mut self,
3011 at: mir::Block,
3012 span: Span,
3013 store: mir::Opcode,
3014 from: mir::Reg,
3015 buf: mir::Reg,
3016 word: i32,
3017 ) {
3018 let mem = mir::Mem::at(mir::Operand::read(buf, self.gpr)).plus(word);
3019 self.out.build(at, store).at(span).uses(from, self.gpr).mem(mem).finish();
3020 }
3021
3022 /// One word of that buffer, read back into a register.
3023 fn read_word(
3024 &mut self,
3025 at: mir::Block,
3026 span: Span,
3027 load: mir::Opcode,
3028 into: mir::Reg,
3029 buf: mir::Reg,
3030 word: i32,
3031 ) {
3032 let mem = mir::Mem::at(mir::Operand::read(buf, self.gpr)).plus(word);
3033 self.out.build(at, load).at(span).def(into, self.gpr).mem(mem).finish();
3034 }
3035
3036 /// One register into another, which is the one shape of instruction the builder has no word
3037 /// for because neither operand is a definition of a value or a read of memory.
3038 fn copy(
3039 &mut self,
3040 at: mir::Block,
3041 span: Span,
3042 mov: mir::Opcode,
3043 into: mir::Reg,
3044 from: mir::Reg,
3045 ) {
3046 self.out
3047 .build(at, mov)
3048 .at(span)
3049 .operand(mir::Operand::write(into, self.gpr))
3050 .operand(mir::Operand::read(from, self.gpr))
3051 .finish();
3052 }
3053
3054 /// The word a `__builtin_setjmp` in this function answers with, asked for once and kept.
3055 fn answer_slot(&mut self) -> usize {
3056 match self.answer {
3057 Some(index) => index,
3058 None => {
3059 let index = self.stack.locals.len();
3060 self.stack.locals.push(Local { size: JUMP_WORD, align: JUMP_WORD });
3061 self.answer = Some(index);
3062 index
3063 }
3064 }
3065 }
3066
3067 /// An address in this function's frame with nothing in its displacement, which is what an
3068 /// instruction reaching one of its stack objects is written with until [`crate::finish`] knows
3069 /// where the object is.
3070 fn frame_mem(&self) -> mir::Mem {
3071 mir::Mem::at(mir::Operand::read(mir::Reg::physical(self.conv.stack_pointer), self.gpr))
3072 }
3073
3074 /// Every register the allocator hands out, which is what a `__builtin_setjmp` destroys.
3075 ///
3076 /// Both files, since a `double` live across a save has the same problem an integer does. The
3077 /// two registers a frame is reached through are not here: the restore puts both of them back,
3078 /// which is the whole of what it puts back, and a function whose frame pointer was destroyed
3079 /// by its own save would have nothing left to find its caller with.
3080 fn across_jump(&self) -> Vec<(mir::Reg, RegClass)> {
3081 let mut gone = Vec::new();
3082 for ® in self.conv.int_order {
3083 if reg == self.conv.stack_pointer || reg == self.conv.frame_pointer {
3084 continue;
3085 }
3086 gone.push((mir::Reg::physical(reg), self.gpr));
3087 }
3088 for ® in self.conv.sse_order {
3089 gone.push((mir::Reg::physical(reg), self.conv.sse_class));
3090 }
3091 gone
3092 }
3093
3094 /// The registers a `__builtin_longjmp` may hold things in while it puts a frame back.
3095 ///
3096 /// The ones the allocator hands out, less the two a frame is reached through. The scratch
3097 /// registers are not among them on purpose: the rewriter writes a reload into one of those
3098 /// wherever it likes, and one of these has to survive from the load that fills it to the
3099 /// instruction that reads it however many instructions apart those are.
3100 fn jump_regs(&self) -> Vec<PhysReg> {
3101 self.conv
3102 .int_order
3103 .iter()
3104 .copied()
3105 .filter(|®| {
3106 reg != self.conv.stack_pointer
3107 && reg != self.conv.frame_pointer
3108 && !self.selector.scratch.contains(®)
3109 })
3110 .collect()
3111 }
3112
3113 /// A machine opcode of this target from the name the target gives it.
3114 fn named(&mut self, name: &str) -> mir::Opcode {
3115 mir::Opcode::new(self.names.intern(&format!("{}{name}", self.selector.prefix())))
3116 }
3117
3118 /// `__builtin_frame_address` and `__builtin_return_address`, which are a walk up the chain of
3119 /// saved frame pointers and then one thing read at the end of it.
3120 ///
3121 /// Every frame that kept a frame pointer holds the caller's at the address the register points
3122 /// at, and the address that frame returns to one word above that, which is where the call
3123 /// instruction put it and where the prologue's push left it. So the walk is a load through the
3124 /// register for each link, the frame address is wherever the walk stopped, and the return
3125 /// address is one more load from a word above it. gcc 16.2.0 writes exactly this, measured on
3126 /// x86-64 at `-O2` for depths zero to three of both builtins.
3127 ///
3128 /// The function is given a frame pointer because of this, which is what [`Stack::walks_frames`]
3129 /// carries out to the layout. A depth of zero needs it as the answer and every depth above zero
3130 /// needs it as the start, so there is no case here where it is not wanted.
3131 ///
3132 /// How far the chain actually reaches is the program's business and not this one's. A caller
3133 /// compiled without a frame pointer has no link in it for the walk to follow, so a depth above
3134 /// zero is a promise about how the whole program was built. That is why gcc documents a nonzero
3135 /// depth as unsafe rather than as an answer, and why the depth is refused above a limit in
3136 /// `check/builtin/frame.rs` rather than walked as far as it says.
3137 fn frames(&mut self, inst: Inst) -> Result<(), Unsupported> {
3138 let data = &self.source[inst];
3139 let Extra::Depth(depth) = data.extra else { return Err(self.unsupported(inst)) };
3140 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
3141 let returning = data.opcode == Opcode::ReturnAddress;
3142 let block = self.at.expect("a block is being filled");
3143 let span = self.source.span(inst);
3144 let moves =
3145 self.selector.frame.moves(self.gpr).expect("a class the target says how to move");
3146 let load = self.named(moves.load);
3147 self.stack.walks_frames = true;
3148
3149 // Where the walk is up to. The frame pointer to begin with, and the register the last load
3150 // wrote after that.
3151 let reg = self.new_reg(result);
3152 let mut base = mir::Reg::physical(self.conv.frame_pointer);
3153 for link in 0..depth {
3154 // The last load of a walk that is looking for a frame writes the answer itself, which
3155 // is what keeps a walk of so many links that many instructions and not one more.
3156 let ends_here = link + 1 == depth && !returning;
3157 let next = if ends_here { reg } else { self.out.new_vreg(self.gpr) };
3158 let at = mir::Mem::at(mir::Operand::read(base, self.gpr));
3159 self.out.build(block, load).at(span).def(next, self.gpr).mem(at).finish();
3160 base = next;
3161 }
3162
3163 if returning {
3164 let up = i32::try_from(self.conv.return_address).expect("a word above the frame");
3165 let at = mir::Mem::at(mir::Operand::read(base, self.gpr)).plus(up);
3166 self.out.build(block, load).at(span).def(reg, self.gpr).mem(at).finish();
3167 } else if depth == 0 {
3168 // The one case with no load in it at all: the frame this function is running in is the
3169 // register itself, and a physical register is not one the allocator hands out, so the
3170 // answer is a copy of it.
3171 let mov = self.named(moves.mov);
3172 self.out
3173 .build(block, mov)
3174 .at(span)
3175 .operand(mir::Operand::write(reg, self.gpr))
3176 .operand(mir::Operand::read(base, self.gpr))
3177 .finish();
3178 }
3179 Ok(())
3180 }
3181
3182 /// `__builtin_thread_pointer`, which is the front of the block [`Self::thread_address`] adds
3183 /// an offset to.
3184 ///
3185 /// The same one instruction, on its own this time and with nothing to add to it. A program
3186 /// writes this when what it wants is a number that is different in every thread and cheap to
3187 /// come by, rather than a variable of its own in the block, so there is no relocation here and
3188 /// no name for the link to resolve.
3189 fn thread_pointer(&mut self, inst: Inst) -> Result<(), Unsupported> {
3190 self.threads_written(inst)?;
3191 let result = self.source[inst].first_result.ok_or_else(|| self.unsupported(inst))?;
3192 let block = self.at.expect("a block is being filled");
3193 let span = self.source.span(inst);
3194 let reg = self.new_reg(result);
3195 self.read_thread_pointer(block, span, reg);
3196 Ok(())
3197 }
3198
3199 /// What a named machine register holds, which is `register long x asm ("rbx");`.
3200 ///
3201 /// One move out of that register, with the register named as itself the way a register a
3202 /// template wrote is named, which is [`Self::itself`] and is the thing #1653 built. What it
3203 /// buys here is what it buys there: the register is part of the instruction the allocator
3204 /// sees, so it is a use the allocator will not have written over first, and the value goes
3205 /// into an ordinary one of its own that everything downstream reads.
3206 ///
3207 /// The whole sixty four bits are moved whatever the type is, because the register is that
3208 /// wide and a narrower type reads the low end of the copy, which is the same low end. A type
3209 /// wider than the register is refused, since there is no register holding it to read. On
3210 /// AArch64 a float may be kept in a vector register, `register double x asm ("d8");`, and it is
3211 /// moved out of that file the same way.
3212 ///
3213 /// A name the machine has not got is refused too, and is the only thing that can be wrong
3214 /// with the string: which register a name means is this machine's question and this is where
3215 /// the question is asked, at the same table `asm` asks about clobbers at. The sigil gcc
3216 /// allows in front of it is taken off here, because what the name is written with is syntax.
3217 fn register_value(&mut self, inst: Inst) -> Result<(), Unsupported> {
3218 let Extra::Symbol(symbol) = self.source[inst].extra else {
3219 return Err(self.unsupported(inst));
3220 };
3221 let result = self.source[inst].first_result.ok_or_else(|| self.unsupported(inst))?;
3222 let ty = self.source[result].ty;
3223 let bits = if ty.is_ptr() { ADDRESS_BITS } else { ty.bits() };
3224 if bits > ADDRESS_BITS {
3225 return Err(self.unsupported(inst));
3226 }
3227 let spelled = self.names.resolve(symbol).to_owned();
3228 let bare = spelled.strip_prefix('%').unwrap_or(&spelled);
3229 let named = if self.on_aarch64() {
3230 aarch64::named(bare)
3231 } else if self.class_of(ty) != self.gpr {
3232 return Err(self.unsupported(inst));
3233 } else {
3234 x86_64::gpr_named(bare).map(|(reg, _)| (reg, self.gpr))
3235 };
3236 let Some((held, file)) = named else {
3237 return Err(Unsupported::Register { inst, name: spelled });
3238 };
3239 // A float in a general purpose register, or a number in a vector one, is a register the
3240 // machine has holding a type that is not kept there, and would need a move between the
3241 // files that nothing here makes yet.
3242 if on_x87(ty) || self.class_of(ty) != file {
3243 return Err(self.unsupported(inst));
3244 }
3245 let block = self.at.expect("a block is being filled");
3246 let span = self.source.span(inst);
3247 let mov = self.selector.frame.moves(file).expect("a class the target says how to move").mov;
3248 let mov = self.named(mov);
3249 let into = self.new_reg(result);
3250 self.out
3251 .build(block, mov)
3252 .at(span)
3253 .operand(mir::Operand::write(into, file))
3254 .operand(
3255 mir::Operand::read(mir::Reg::physical(held), file).with(Constraint::Fixed(held)),
3256 )
3257 .finish();
3258 Ok(())
3259 }
3260
3261 /// A conversion that converts nothing: the result is the operand under another type.
3262 ///
3263 /// `ptrtoint` and `inttoptr` at one width are the whole of this. An address on this machine is
3264 /// an integer as wide as the machine addresses, so a cast between the two changes what the
3265 /// type system calls the value and changes nothing about the value, and the register holding
3266 /// it is the register that already held it. The front end never writes either of them at any
3267 /// other width, because it widens or narrows around the cast rather than through it, so the
3268 /// two widths disagreeing here means the IR came from somewhere else and is refused rather
3269 /// than guessed at.
3270 ///
3271 /// Reading the operand first is what materializes it when it is a constant, which is the case
3272 /// that matters: a null pointer is an `inttoptr` of zero, and that zero has to reach a
3273 /// register before anything can call it an address.
3274 fn rename(&mut self, inst: Inst) -> Result<(), Unsupported> {
3275 let data = &self.source[inst];
3276 let [arg] = self.source[data.args] else { return Err(self.unsupported(inst)) };
3277 let result = data.first_result.ok_or_else(|| self.unsupported(inst))?;
3278 if !self.is_address_width(self.source[arg].ty)
3279 || !self.is_address_width(self.source[result].ty)
3280 {
3281 return Err(self.unsupported(inst));
3282 }
3283 let reg = self.reg_of(arg)?;
3284 self.regs[result.index()] = Some(reg);
3285 Ok(())
3286 }
3287
3288 /// One barrier, which on this machine is one instruction at the strongest ordering and no
3289 /// instruction at all at every other one.
3290 ///
3291 /// x86-64 is total store order, so the only reordering the machine does is a store followed by
3292 /// a load of a different address, and the only ordering that forbids that is sequential
3293 /// consistency. An acquire, a release and an acquire release fence are therefore already true
3294 /// of every program running here, and what a program wanted from writing one is that the
3295 /// compiler not move memory accesses across it. The optimizer has finished by the time this
3296 /// runs and nothing below reorders one access past another, so the constraint is already
3297 /// discharged and there is nothing to write.
3298 ///
3299 /// The strongest one is `mfence`, which is what gcc 16.2.0 writes for
3300 /// `__atomic_thread_fence(__ATOMIC_SEQ_CST)` and for `__sync_synchronize`. A locked instruction
3301 /// on the stack is faster on most parts and is what some compilers write instead; it is also a
3302 /// write to memory the program did not ask for, and the plain barrier is the one that says what
3303 /// it means.
3304 ///
3305 /// Written here by name rather than by a rule, for the same reason a `lea` of a symbol is:
3306 /// there is nothing in a barrier that a proof over bitvectors could discharge. It computes
3307 /// nothing, so there is no equality to state, and what makes it the right answer is the memory
3308 /// model, which the rule language cannot talk about.
3309 fn barrier(&mut self, inst: Inst) -> Result<(), Unsupported> {
3310 let Extra::Order(order) = self.source[inst].extra else {
3311 return Err(self.unsupported(inst));
3312 };
3313 if order != MemOrder::SeqCst {
3314 return Ok(());
3315 }
3316 let block = self.at.expect("a block is being filled");
3317 let span = self.source.span(inst);
3318 let fence = self.named(self.selector.fence);
3319 self.out.build(block, fence).at(span).finish();
3320 Ok(())
3321 }
3322
3323 /// The instruction a program stops on, which is one byte pair and no operands.
3324 ///
3325 /// `ud2` is an opcode the manual promises will never be given a meaning, so a processor that
3326 /// reaches it raises the fault for an instruction it does not know, and on Linux that arrives
3327 /// at the program as `SIGILL`. That is what `__builtin_trap` is for: a stop that cannot be
3328 /// caught by anything the program installed for an ordinary error, cannot be returned from,
3329 /// and leaves the address of the fault in the core file.
3330 ///
3331 /// Why not a call to `abort`. It is two bytes against a call and a relocation, it needs no
3332 /// library, and it works in the places this one is written most, which are a kernel and a
3333 /// freestanding program that has no `abort` to call. gcc 16.2.0 writes `ud2` here too.
3334 fn trap(&mut self, inst: Inst) {
3335 let block = self.at.expect("a block is being filled");
3336 let span = self.source.span(inst);
3337 let stop = self.named(self.selector.trap);
3338 self.out.build(block, stop).at(span).finish();
3339 }
3340
3341 /// One hint that an address is about to be used, which is one instruction and no promise.
3342 ///
3343 /// Four instructions on this machine and the locality picks between them, which is what the
3344 /// number means: how much of the data will still be wanted after the access. None of it wanted
3345 /// is `prefetchnta`, which brings the line in without keeping it, and all of it wanted is
3346 /// `prefetcht0`, which brings it as close as the machine can. The two in between are the levels
3347 /// between those. Measured against gcc 16.2.0 on x86-64 rather than read off the manual: zero
3348 /// gives `prefetchnta`, one `prefetcht2`, two `prefetcht1` and three `prefetcht0`.
3349 ///
3350 /// Whether the access will write is not read here, and that is this machine rather than an
3351 /// omission. The write hint is `prefetchw`, which is not in the base instruction set, and gcc
3352 /// writes it only when the command line said the part has it. So a prefetch for a write is the
3353 /// same instruction as a prefetch for a read, which is what gcc 16.2.0 writes without
3354 /// `-mprfchw`, and the difference is carried in the IR for a target that can use it.
3355 ///
3356 /// The address goes in the addressing mode rather than in an operand, the way a store's does.
3357 /// It is built here as the plainest one there is, a register and nothing else, because what
3358 /// arrives is a value and folding an addition into the mode is a rule's job and no rule reaches
3359 /// this instruction. An address the program computed is therefore one `lea` or one add in front
3360 /// of this, which is what it would have been for the load the hint is about anyway.
3361 fn hint(&mut self, inst: Inst) -> Result<(), Unsupported> {
3362 let Extra::Prefetch(hint) = self.source[inst].extra else {
3363 return Err(self.unsupported(inst));
3364 };
3365 let args: Vec<Value> = self.source[self.source[inst].args].to_vec();
3366 let [address] = args[..] else { return Err(self.unsupported(inst)) };
3367 let name = match hint.locality {
3368 0 => "prefetch_nta",
3369 1 => "prefetch_t2",
3370 2 => "prefetch_t1",
3371 PrefetchHint::MOST => "prefetch_t0",
3372 // Nothing else exists. The checker reads a locality outside the range as zero and the
3373 // verifier refuses one that got here another way, so this is a hint that was built
3374 // rather than checked, and the safe answer for a hint is to write no instruction.
3375 _ => return Err(self.unsupported(inst)),
3376 };
3377 let base = self.reg_of(address)?;
3378 let block = self.at.expect("a block is being filled");
3379 let opcode = self.named(name);
3380 self.out
3381 .build(block, opcode)
3382 .at(self.source.span(inst))
3383 .mem(mir::Mem::at(mir::Operand::read(base, self.gpr)))
3384 .finish();
3385 Ok(())
3386 }
3387
3388 /// One compare and exchange, which is the instruction every other atomic on this machine is
3389 /// built out of.
3390 ///
3391 /// What the IR asks for is: read what is at an address, compare it against a value the program
3392 /// expected, put a second value there if the two were equal, and say both what was read and
3393 /// whether the exchange happened. The machine has exactly that instruction, and the `lock` in
3394 /// front of it is what makes the whole of it one step as far as every other processor is
3395 /// concerned.
3396 ///
3397 /// The ordering is not read here, and that is the memory model rather than an omission. A
3398 /// locked instruction on x86-64 is a full barrier whatever the program asked for, so a relaxed
3399 /// compare and exchange and a sequentially consistent one are the same instruction, and there
3400 /// is nothing weaker to emit for the weaker orderings. The failure ordering is not read for the
3401 /// same reason.
3402 ///
3403 /// The two values it produces are why this is written by name. The one the program compares
3404 /// against and the one it gets back are both `rax`, which the instruction reads and writes
3405 /// without being told, and the table says so with a fixed constraint at each end rather than
3406 /// leaving the allocator to find out. The second value is the byte behind it, which is the zero
3407 /// flag read out by a `sete`, and it is a definition of the same instruction so that the
3408 /// allocator knows the two are live together and never gives the byte the register the answer
3409 /// is in.
3410 fn exchange(&mut self, inst: Inst) -> Result<(), Unsupported> {
3411 let args: Vec<Value> = self.source[self.source[inst].args].to_vec();
3412 let results: Vec<Value> = self.source[inst].results().collect();
3413 let [addr, expected, desired] = args[..] else { return Err(self.unsupported(inst)) };
3414 let [old, exchanged] = results[..] else { return Err(self.unsupported(inst)) };
3415
3416 // A value the machine can compare in one instruction, which is an integer or an address at
3417 // one of the four widths it has a compare and exchange for. Anything else is a type this
3418 // has no instruction for rather than a program that is wrong, and the front end refuses it
3419 // before ever getting here.
3420 let ty = self.source[old].ty;
3421 let bits = if ty.is_ptr() { ADDRESS_BITS } else { ty.bits() };
3422 if (!ty.is_int() && !ty.is_ptr()) || !matches!(bits, 8 | 16 | 32 | 64) {
3423 return Err(self.unsupported(inst));
3424 }
3425
3426 let base = self.reg_of(addr)?;
3427 let want = self.reg_of(expected)?;
3428 let put = self.reg_of(desired)?;
3429 let got = self.new_reg(old);
3430 let flag = self.new_reg(exchanged);
3431
3432 let name = format!("cmpxchg_{bits}");
3433 let descs = self.selector.operands(&name).ok_or_else(|| self.unsupported(inst))?;
3434 let block = self.at.expect("a block is being filled");
3435 let opcode = self.named(&name);
3436 let (span, flags) = (self.source.span(inst), self.carried(inst));
3437 let mut build = self.out.build(block, opcode).at(span).flags(flags);
3438 for (desc, reg) in descs.iter().zip([got, flag, want, put]) {
3439 let operand = mir::Operand {
3440 reg,
3441 class: desc.class,
3442 role: desc.role,
3443 constraint: desc.constraint,
3444 };
3445 build = build.operand(operand);
3446 }
3447 build.mem(mir::Mem::at(mir::Operand::read(base, self.gpr))).finish();
3448 Ok(())
3449 }
3450
3451 /// One read modify write, for the three operations this machine does in a single instruction.
3452 ///
3453 /// What the IR asks for is: read what is at an address, do something to it, put the answer back,
3454 /// say what was there before, and let nothing get between the three steps. The machine has
3455 /// `xchg` for putting a value there and `lock xadd` for adding one, and both leave what they
3456 /// found in the register the operand arrived in, which is why the value that comes back and the
3457 /// value that went in are one register here.
3458 ///
3459 /// A subtraction is the add over the negated operand, which is right at every width because the
3460 /// machine's arithmetic wraps and negating then adding is subtracting in two's complement
3461 /// whatever the operands were. The negate is a separate instruction in front, over a register of
3462 /// its own, so that the value the program handed over is not the one written on: an operand may
3463 /// be live after this and a program that read it again would read the negation.
3464 ///
3465 /// The ordering is not read, for the reason the compare and exchange beside this does not read
3466 /// it. `xchg` with memory locks the bus whether it is asked to or not and `lock xadd` is asked
3467 /// to, so both are full barriers on this machine and there is nothing weaker to fall to.
3468 ///
3469 /// Eight of the other ten never arrive, because `crate::retry` turned each of them into a loop
3470 /// around a compare and exchange before anything here saw it. The two that do arrive are the
3471 /// ones on floating values, and they are refused: a compare and exchange of a float wants the
3472 /// value carried through an integer of the same width, and an eighty bit float has no such
3473 /// width. Neither family of builtins can write one yet either, so a program that reaches this
3474 /// refusal is a program that reached an unimplemented builtin first.
3475 fn modify(&mut self, inst: Inst) -> Result<(), Unsupported> {
3476 let Extra::Rmw(op, _) = self.source[inst].extra else {
3477 return Err(self.unsupported(inst));
3478 };
3479 let args: Vec<Value> = self.source[self.source[inst].args].to_vec();
3480 let [addr, operand] = args[..] else { return Err(self.unsupported(inst)) };
3481 let old = self.source[inst].first_result.ok_or_else(|| self.unsupported(inst))?;
3482
3483 // A value the machine can exchange in one instruction, which is an integer at one of the
3484 // four widths it has these for. A pointer arrives as an address, so it is an integer by the
3485 // time it is here, and anything else is a type this has no instruction for.
3486 let ty = self.source[old].ty;
3487 if !ty.is_int() || !matches!(ty.bits(), 8 | 16 | 32 | 64) {
3488 return Err(self.unsupported(inst));
3489 }
3490 let name = match op {
3491 RmwOp::Xchg => format!("xchg_{}", ty.bits()),
3492 RmwOp::Add | RmwOp::Sub => format!("xadd_{}", ty.bits()),
3493 _ => return Err(self.unsupported(inst)),
3494 };
3495
3496 let base = self.reg_of(addr)?;
3497 let mut put = self.reg_of(operand)?;
3498 let block = self.at.expect("a block is being filled");
3499 let span = self.source.span(inst);
3500 if op == RmwOp::Sub {
3501 let negated = self.out.new_vreg(self.gpr);
3502 let negate = self.named(&format!("neg_r_{}", ty.bits()));
3503 let descs = self
3504 .selector
3505 .operands(&format!("neg_r_{}", ty.bits()))
3506 .ok_or_else(|| self.unsupported(inst))?;
3507 let mut build = self.out.build(block, negate).at(span);
3508 for (desc, reg) in descs.iter().zip([negated, put]) {
3509 build = build.operand(mir::Operand {
3510 reg,
3511 class: desc.class,
3512 role: desc.role,
3513 constraint: desc.constraint,
3514 });
3515 }
3516 build.finish();
3517 put = negated;
3518 }
3519
3520 let got = self.new_reg(old);
3521 let descs = self.selector.operands(&name).ok_or_else(|| self.unsupported(inst))?;
3522 let opcode = self.named(&name);
3523 let flags = self.carried(inst);
3524 let mut build = self.out.build(block, opcode).at(span).flags(flags);
3525 for (desc, reg) in descs.iter().zip([got, put]) {
3526 build = build.operand(mir::Operand {
3527 reg,
3528 class: desc.class,
3529 role: desc.role,
3530 constraint: desc.constraint,
3531 });
3532 }
3533 build.mem(mir::Mem::at(mir::Operand::read(base, self.gpr))).finish();
3534 Ok(())
3535 }
3536
3537 /// One `asm` statement.
3538 ///
3539 /// An empty template is most of the inline assembly in a test suite, and it is not a corner
3540 /// case somebody wrote by accident. A program that wants a value computed where it stands, or a
3541 /// loop the optimizer must not touch, writes `asm volatile ("" : : : "memory")`, and forty
3542 /// years of bug reports about optimizers are full of them. What such a statement asks for is
3543 /// the barrier and the operand places, and no instructions at all.
3544 ///
3545 /// So the operands are the half that is always real: a constraint says where a value has to be,
3546 /// and where it has to be is still true when the template between them is empty.
3547 ///
3548 /// What the constraints ask for, on an empty template, is only ever that two operands share a
3549 /// place. Nothing reads a register no text names, so `"r"` on its own asks for a register and
3550 /// no particular one, and any register at all answers it. A matching constraint is different,
3551 /// because it says the output the assembly leaves is the place the input arrived in, and with
3552 /// no instructions between them that is the input unchanged. So it is a rename and not a move:
3553 /// the value is already in a register and the result is that register.
3554 ///
3555 /// An output nothing is tied to and no instruction writes is whatever the assembly left there,
3556 /// which for a template that writes nothing is whatever was in the register. That is a value
3557 /// the program is not entitled to, and this writes a zero rather than reading one, because the
3558 /// allocator has to be given a definition before a use whatever the program is entitled to.
3559 ///
3560 /// # A template with instructions in it
3561 ///
3562 /// [`x86_64::read`] turns the text into the opcodes this backend already has, which is what
3563 /// `spec/11-asm-objects-debug.md` section 11.1 asks for: the machine is described once, and an
3564 /// instruction a program wrote is looked up in that description rather than copied through to
3565 /// an assembler that has one of its own. So nothing here assembles anything. What it does is
3566 /// put the statement's operands where the opcode holds them, and from there an `asm` statement
3567 /// is ordinary machine code: the allocator picks the registers, the listing and the object file
3568 /// are written from the same table as every other instruction, and a spill around one works
3569 /// because there is nothing left about it for a spill to get wrong.
3570 ///
3571 /// A register the template named in its own text is the one thing in there that is nobody's
3572 /// operand, and it is placed as itself. See [`Self::itself`] for why that is safer here than
3573 /// the thing gcc does, which is to copy the name out and leave the allocator none the wiser.
3574 ///
3575 /// Two things are refused, both for one reason, which is that placing them by a guess gives a
3576 /// program that assembles into something other than what it says.
3577 ///
3578 /// An output the template writes more than once, which is one place with two definitions in it,
3579 /// and the machine IR between here and the allocator has one definition per register by
3580 /// construction. An output tied to an input and written once is not that: it is two registers
3581 /// the description ties together, which is what [`Place`] is about.
3582 ///
3583 /// An operand read where the opcode writes, or written where it reads. An output that has not
3584 /// been written yet is not a value, and an input the assembly writes over is a value something
3585 /// else may still be using.
3586 ///
3587 /// # A register the instruction uses without being told
3588 ///
3589 /// An instruction may reach a register its text does not name, and `cpuid` is all of them at
3590 /// once: the leaf goes in `eax`, the subleaf in `ecx`, and the answer comes back in all four
3591 /// registers. The description holds every bit of that already, so what is left is to say which
3592 /// of the statement's operands is in each of those registers, and the constraint letter is the
3593 /// one thing in an assembly statement that says it. `"=a"` is an output in `rax` and `"c"` is
3594 /// an input in `rcx`, which is why a program writing `cpuid` writes its constraints that way
3595 /// and has no choice about it.
3596 ///
3597 /// A register no letter named is one the statement put nothing in, and that is the usual case
3598 /// rather than an unusual one, since an instruction that answers four questions is written by
3599 /// programs that asked one. A write of one is the register being destroyed and gets a register
3600 /// of its own, which is what tells the allocator to keep everything else out of it. A read of
3601 /// one is a register the instruction looks at and the program never filled, which gets a zero
3602 /// for the reason [`Self::undefined`] gives.
3603 ///
3604 /// # The clobber list
3605 ///
3606 /// Read now, as the registers it names being written by every instruction of the template. By
3607 /// every one rather than by one of them, because the list says the assembly as a whole leaves
3608 /// them ruined and nothing here knows which line did it. Every entry has to be a register this
3609 /// machine has a name for or the statement is refused, since a name nobody read is a register
3610 /// nobody is keeping out of.
3611 ///
3612 /// `memory` and `cc` are the two entries that are not registers and both are skipped. `memory`
3613 /// says the assembly touches storage, which is already true of every `asm` this writes and is
3614 /// nothing a register list could hold. `cc` says it ruins the condition flags, and the flag
3615 /// tracking already has that from the instructions the template was read into, since it takes
3616 /// every instruction it does not recognize as writing them and every instruction here is one
3617 /// this machine describes. `flags` is the name gcc's own register table gives the same thing on
3618 /// this machine, so a program writing it has written `cc` and is read that way: tcc's
3619 /// `tests/tcctest.c` lists both on one statement.
3620 ///
3621 /// A clobber the instruction already writes is left off it. `cpuid` writes all four registers
3622 /// by description, and a statement listing three of them as clobbers as well is saying the
3623 /// same thing twice, which the allocator would read as one register with two definitions.
3624 ///
3625 /// On a template with nothing in it the list is ignored, as it was before, since a template
3626 /// with no instructions ruins nothing whatever it said about what it ruins.
3627 fn assembly(&mut self, inst: Inst) -> Result<(), Unsupported> {
3628 let data = &self.source[inst];
3629 let Extra::Asm(asm) = data.extra else { return Err(self.unsupported(inst)) };
3630 let info = self.source[asm];
3631 if !self.source[info.targets].is_empty() {
3632 return Err(Unsupported::Assembly { inst, refused: Written::Goto });
3633 }
3634 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
3635
3636 let constraints = self.names.resolve(info.constraints).to_string();
3637 let results: Vec<Value> = data.results().collect();
3638 let operands = AsmOperands::read(&constraints, &results, &self.source[data.args])
3639 .ok_or_else(refused)?;
3640 let list: Vec<AsmOperand<'_>> = operands.iter().copied().collect();
3641
3642 // Read after the constraints and not before them, because a mnemonic whose suffix the
3643 // program left off is read at the width of the operands it names, and the operands are
3644 // what the constraints are a list of.
3645 let widths: Vec<Option<x86_64::Width>> = list
3646 .iter()
3647 .map(|operand| {
3648 let ty = self.source[operand.result.or(operand.value)?].ty;
3649 if !ty.is_scalar() {
3650 return None;
3651 }
3652 x86_64::Width::of_bits(held_bits(ty))
3653 })
3654 .collect();
3655 // An operand in memory is an address the statement holds and an object the template names,
3656 // so the reader is told which ones those are and spells `%0` for one as the object.
3657 let memory: Vec<bool> = list.iter().map(|operand| operand.memory).collect();
3658 let template = self.names.resolve(info.template).to_string();
3659 let steps = if template.trim().is_empty() {
3660 Vec::new()
3661 } else {
3662 match x86_64::read_in(&template, &widths, &memory) {
3663 Some(steps) => steps,
3664 None => return self.kept(inst, &template, &list, &widths, &memory),
3665 }
3666 };
3667
3668 // Which operands the template writes, counted before anything is placed, because the answer
3669 // decides where each of the three below comes from and one instruction may name an operand
3670 // that a later one writes. Which of them any instruction puts in a register at all is
3671 // counted in the same walk, since an operand no instruction reaches that way is one nothing
3672 // has to put anywhere: a constant a template names only as the distance into an address is
3673 // written into the instruction, and a register holding a copy of it would be one nobody
3674 // reads. An operand the address is counted from is reached that way and is counted here for
3675 // that reason, because the walk below it is over the opcode's operands and an address is
3676 // not one of those.
3677 //
3678 // Whether any instruction reads an operand an instruction above it wrote is counted in the
3679 // same walk too. Such a template is one whose instructions have to be written in order with
3680 // each read taken from wherever the last write left the operand, which is what
3681 // [`Self::woven`] does, and so is one that writes an operand twice.
3682 let mut writes = vec![0usize; list.len()];
3683 let mut reads = vec![false; list.len()];
3684 let mut held = vec![false; list.len()];
3685 let mut after = false;
3686 for step in &steps {
3687 // A call out of the template writes every register the convention lets the callee
3688 // leave anything in, and an output pinned to one of those is written by it.
3689 if let x86_64::Step::Call { .. } = step {
3690 for index in self.lost(&list).into_iter().filter_map(|(_, _, index)| index) {
3691 *writes.get_mut(index).ok_or_else(refused)? += 1;
3692 }
3693 continue;
3694 }
3695 let x86_64::Step::Line(line) = step else { continue };
3696 match line.at.and_then(|at| at.base) {
3697 Some(x86_64::Piece::Operand { index, .. }) => {
3698 *held.get_mut(index).ok_or_else(refused)? = true;
3699 after |= writes[index] > 0;
3700 }
3701 Some(x86_64::Piece::Reg { reg, .. }) => {
3702 if let Some(index) = bound(&list, reg, Role::Use) {
3703 *held.get_mut(index).ok_or_else(refused)? = true;
3704 after |= writes[index] > 0;
3705 }
3706 }
3707 _ => {}
3708 }
3709 let mut written = Vec::new();
3710 let form = x86_64::form(line.opcode).ok_or_else(refused)?;
3711 // Which registers the instruction reaches, asked the same way it is asked again when
3712 // the instruction is written. See [`Self::lettered`] for the one opcode whose answer
3713 // comes from the constraint letters rather than from the description.
3714 let lettered = (line.opcode == x86_64::LITERAL).then(|| self.lettered(&list));
3715 let (described, pieces) = match &lettered {
3716 Some((described, pieces)) => (described.as_slice(), pieces.as_slice()),
3717 None => (form.operands(), line.operands.as_slice()),
3718 };
3719 for (desc, piece) in described.iter().zip(pieces) {
3720 // An operand the instruction reaches without its text saying so is the statement's
3721 // only when a constraint letter put something there. One that is nobody's writes
3722 // nothing of the program's, so it is counted nowhere and is dealt with where it is
3723 // placed.
3724 let index = match *piece {
3725 x86_64::Piece::Operand { index, .. } => index,
3726 x86_64::Piece::Implicit { reg } => match bound(&list, reg, desc.role) {
3727 Some(index) => index,
3728 None => continue,
3729 },
3730 x86_64::Piece::Reg { reg, .. } => match bound(&list, reg, desc.role) {
3731 Some(index) => index,
3732 None => continue,
3733 },
3734 };
3735 *held.get_mut(index).ok_or_else(refused)? = true;
3736 if matches!(desc.role, Role::Def | Role::EarlyDef) {
3737 written.push(index);
3738 } else {
3739 *reads.get_mut(index).ok_or_else(refused)? = true;
3740 after |= writes[index] > 0;
3741 }
3742 }
3743 for index in written {
3744 *writes.get_mut(index).ok_or_else(refused)? += 1;
3745 }
3746 }
3747 let woven = after
3748 || writes.iter().any(|&count| count > 1)
3749 || steps.iter().any(|step| !matches!(step, x86_64::Step::Line(_)));
3750
3751 // Where every operand is. Worked out in full before the first instruction is written, since
3752 // reading a value may be what puts it in a register in the first place, and that has to
3753 // happen in front of the assembly rather than in the middle of it.
3754 let mut places: Vec<Place> = vec![Place::default(); list.len()];
3755 for (index, operand) in list.iter().copied().enumerate() {
3756 let Some(result) = operand.result else {
3757 // An input, or an output the assembly was handed the address of, and both are a
3758 // value that arrives in a register and is read out of it, unless no instruction of
3759 // the template reads it out of one.
3760 let value = operand.value.ok_or_else(refused)?;
3761 if held[index] {
3762 places[index].read = Some(self.reg_of(value)?);
3763 }
3764 continue;
3765 };
3766 let ty = self.source[result].ty;
3767 if on_x87(ty) {
3768 return Err(refused());
3769 }
3770 let tied = operands.tied_to(index);
3771 if let Some(from) = tied {
3772 if self.class_of(self.source[from].ty) != self.class_of(ty) {
3773 return Err(refused());
3774 }
3775 places[index].read = Some(self.reg_of(from)?);
3776 }
3777 if writes[index] > 0 {
3778 places[index].write = Some(self.new_reg(result));
3779 continue;
3780 }
3781 match tied {
3782 // The place the input arrived in, which the assembly wrote nothing over. One
3783 // register, so this is a rename rather than a move.
3784 Some(_) => {
3785 let reg = places[index].read.ok_or_else(refused)?;
3786 self.regs[result.index()] = Some(reg);
3787 places[index].write = Some(reg);
3788 }
3789 None => {
3790 self.undefined(inst, result)?;
3791 places[index].write = self.regs[result.index()];
3792 }
3793 }
3794 }
3795
3796 // An output an instruction of the template also reads, which the statement said nothing
3797 // about because an output is what a statement says the other thing about. What it holds
3798 // there is undefined, and a program writing one means it: `sbb %0, %0` in libgmp's
3799 // `add_mssaaaa` subtracts a register from itself and is asking for the borrow bit rather
3800 // than for the number, so whatever the register held, the answer is the same. Undefined is
3801 // not the same as absent though, since the allocator is owed a definition in front of every
3802 // use, so it gets the zero an output nothing wrote gets and for the same reason.
3803 //
3804 // Unless an input could have been in the same register, in which case gcc's allocator puts
3805 // it there whenever it can and a program may have been written against that. tcc's test of
3806 // a call from a template reads its output `"=a" (s)` to pass `"r" (str)` to `getenv`, which
3807 // is only the string because gcc gave the two of them `rax`. So an output nothing has
3808 // written yet reads the one input that could share its place, when there is exactly one.
3809 // One written `&` is written before the inputs are read and shares nothing.
3810 for index in 0..list.len() {
3811 if !reads[index] || places[index].read.is_some() || places[index].write.is_none() {
3812 continue;
3813 }
3814 let reg = match self.shared(&list, index) {
3815 Some(value) => self.reg_of(value)?,
3816 None => self.seeded(inst, list[index])?,
3817 };
3818 places[index].read = Some(reg);
3819 }
3820
3821 // Worked out once for the whole template, since the list is one list and every instruction
3822 // of the template gets it. Not worked out at all for a template with no instructions, which
3823 // is where there is nothing for it to go on.
3824 let clobbers = self.names.resolve(info.clobbers).to_string();
3825 let clobbered =
3826 if steps.is_empty() { Vec::new() } else { Self::clobbered(inst, &clobbers)? };
3827
3828 // A template with a label in it is not one run of instructions, and what it is instead is
3829 // in [`Self::woven`], which is also where a template goes whose instructions read what the
3830 // ones above them wrote. Every other template is what it has always been, which is every
3831 // instruction of it written into the block the statement stands in.
3832 if woven {
3833 return self.woven(inst, &steps, &mut places, &list, &clobbered, &writes);
3834 }
3835 for step in &steps {
3836 let x86_64::Step::Line(line) = step else { continue };
3837 self.instruction(inst, line, &places, &list, &clobbered)?;
3838 }
3839 Ok(())
3840 }
3841
3842 /// A template the reader could not take apart, kept as its text. See [`x86_64::Form::Template`].
3843 ///
3844 /// What the text names is spelled into it here, the way gcc prints it into its listing: a
3845 /// constant as `$5`, or as `5` under the `c` modifier, and the address of a name as the name.
3846 /// An object in memory is the one thing that cannot be spelled yet, since where it is depends on
3847 /// registers nothing has chosen, so it is left as a hole the writer fills and its address is the
3848 /// instruction's memory operand. One is all an instruction has room for, and every template this
3849 /// has met names one at most. A template that names an operand by name rather than by number is
3850 /// refused for now.
3851 ///
3852 /// # An operand in a register
3853 ///
3854 /// Which register is not known until the allocator has run, and the text is written down before
3855 /// then, so an operand in a register is a hole too. It names the instruction's own operand and
3856 /// the width the modifier asked for, or the width of the operand's type when there was none,
3857 /// and the writer spells whatever register the operand ended up in. What the text writes goes
3858 /// in first as definitions and what it reads goes in last as uses, with the registers below in
3859 /// between, so the allocator sees the statement as one instruction with every operand said. An
3860 /// output tied to an input, by `+` or by a number, reuses the input's register, and one written
3861 /// `&` is written early. Anything wider than a general purpose register is refused.
3862 ///
3863 /// A statement written with no colons is basic assembly, where `%` is a character like any
3864 /// other and a register is written `%eax`. The front end keeps no mark of which kind a statement
3865 /// was, so one with no operands and no clobbers is read as basic, which is what gcc would do for
3866 /// every such template but one written with empty colons around it.
3867 ///
3868 /// The registers a call may write are taken as written, see below for why.
3869 fn kept(
3870 &mut self,
3871 inst: Inst,
3872 template: &str,
3873 list: &[AsmOperand<'_>],
3874 widths: &[Option<x86_64::Width>],
3875 memory: &[bool],
3876 ) -> Result<(), Unsupported> {
3877 // Refused as the template it is, since keeping it is what was tried after reading it
3878 // failed, and what could not be kept is what it names rather than any one operand.
3879 let refused = || Unsupported::Assembly { inst, refused: Written::Template };
3880 let data = &self.source[inst];
3881 let Extra::Asm(asm) = data.extra else { return Err(self.unsupported(inst)) };
3882 let clobbers = self.names.resolve(self.source[asm].clobbers).to_string();
3883 let basic = list.is_empty() && clobbers.trim().is_empty();
3884
3885 // Every register a call may leave anything in, as well as the ones the list names. The
3886 // text can write any register it likes without saying so, and tcc's tests do: gcc gets
3887 // away with that at `-O0` because nothing lives in a register between two statements
3888 // there, and taking these away from the allocator across the template is what gives the
3889 // same answer here. Nothing is written to them by this, so a register one template leaves
3890 // a value in is still holding it when the next template reads it.
3891 let a64 = self.on_aarch64();
3892 let mut clobbered: Vec<(PhysReg, RegClass)> =
3893 self.lost(list).into_iter().map(|(reg, class, _)| (reg, class)).collect();
3894 let named = if a64 {
3895 Self::clobbered_a64(inst, &clobbers)?
3896 } else {
3897 Self::clobbered(inst, &clobbers)?.into_iter().map(|reg| (reg, self.gpr)).collect()
3898 };
3899 for (reg, class) in named {
3900 if !clobbered.iter().any(|&(had, of)| had == reg && of == class) {
3901 clobbered.push((reg, class));
3902 }
3903 }
3904
3905 // The file each operand is in. On AArch64 `w` is a floating point or vector register and an
3906 // input tied to an output is in that output's file. A value whose type puts it in the other
3907 // file would need a move into this one first, which gcc makes and this does not yet, so
3908 // that is refused below.
3909 let mut files = vec![self.gpr; list.len()];
3910 if a64 {
3911 let constraints = self.names.resolve(self.source[asm].constraints);
3912 for (file, entry) in files.iter_mut().zip(constraints.split(',')) {
3913 if vector_letter(entry) {
3914 *file = self.conv.sse_class;
3915 }
3916 }
3917 for index in 0..list.len() {
3918 if let Some(&file) = list[index].tied.and_then(|output| files.get(output)) {
3919 files[index] = file;
3920 }
3921 }
3922 }
3923 let pins: Vec<_> = list.iter().map(|operand| self.pinned_here(operand)).collect();
3924 let pin = |index: usize, file: RegClass| match pins[index] {
3925 Some((at, class)) if class == file => Ok(Some(Constraint::Fixed(at))),
3926 Some(_) => Err(refused()),
3927 None => Ok(None),
3928 };
3929
3930 // The operands in a register, as the instruction's own. An input the text is handed as a
3931 // constant or as the address of a name is spelled into the text instead, when its
3932 // constraint allows a constant at all and no output is tied to it. `"a" (0x1234)` is a
3933 // register holding the number, the way gcc loads it, since the text may ask for `%h0`.
3934 let mut defs: Vec<mir::Operand> = Vec::new();
3935 let mut uses: Vec<mir::Operand> = Vec::new();
3936 let mut def_of: Vec<Option<usize>> = vec![None; list.len()];
3937 let mut use_of: Vec<Option<usize>> = vec![None; list.len()];
3938 if !basic {
3939 for (index, operand) in list.iter().enumerate() {
3940 let Some(result) = operand.result else { continue };
3941 let (ty, file) = (self.source[result].ty, files[index]);
3942 if on_x87(ty) || self.class_of(ty) != file {
3943 return Err(refused());
3944 }
3945 let reg = self.new_reg(result);
3946 let written = if operand.early {
3947 mir::Operand::write_early(reg, file)
3948 } else {
3949 mir::Operand::write(reg, file)
3950 };
3951 def_of[index] = Some(defs.len());
3952 defs.push(match pin(index, file)? {
3953 Some(fixed) => written.with(fixed),
3954 None => written,
3955 });
3956 }
3957 for (index, operand) in list.iter().enumerate() {
3958 let Some(value) = operand.value else { continue };
3959 let spelled = operand.result.is_none()
3960 && operand.tied.is_none()
3961 && operand.immediate
3962 && (self.number(value).is_some() || self.named_address(value).is_some());
3963 // An operand in memory is spelled on AArch64 as the register its address is in,
3964 // which is `[x3]` and is an address every instruction that takes one reads.
3965 if (operand.memory && !a64) || spelled {
3966 continue;
3967 }
3968 let (ty, file) = (self.source[value].ty, files[index]);
3969 if on_x87(ty) || self.class_of(ty) != file {
3970 return Err(refused());
3971 }
3972 let read = mir::Operand::read(self.reg_of(value)?, file);
3973 use_of[index] = Some(uses.len());
3974 uses.push(match pin(index, file)? {
3975 Some(fixed) => read.with(fixed),
3976 None => read,
3977 });
3978 }
3979 }
3980 // A register an output is pinned to is that output's definition and not a clobber as well.
3981 // One an input is pinned to is written as the instruction finishes, the way a call writes
3982 // the register its argument came in, and every other one is written early, since the text
3983 // may write it before it has read its inputs and an input must not be in it.
3984 let mut written: Vec<mir::Operand> = Vec::new();
3985 for (reg, class) in clobbered {
3986 let fixed = |operand: &mir::Operand| {
3987 operand.class == class && operand.constraint == Constraint::Fixed(reg)
3988 };
3989 if defs.iter().any(fixed) {
3990 continue;
3991 }
3992 let reg = mir::Reg::physical(reg);
3993 written.push(if uses.iter().any(fixed) {
3994 mir::Operand::write(reg, class)
3995 } else {
3996 mir::Operand::write_early(reg, class)
3997 });
3998 }
3999 // An output tied to an input is one register, which the definition says by reusing the
4000 // use, or by both being fixed to the same one when the output was pinned.
4001 let first_use = defs.len() + written.len();
4002 for (output, operand) in list.iter().enumerate() {
4003 let Some(def) = def_of[output] else { continue };
4004 let input = if operand.value.is_some() {
4005 Some(output)
4006 } else {
4007 list.iter().position(|entry| entry.tied == Some(output))
4008 };
4009 let Some(read) = input.and_then(|input| use_of[input]) else { continue };
4010 match defs[def].constraint {
4011 Constraint::Fixed(_) => uses[read].constraint = defs[def].constraint,
4012 _ => {
4013 let at = u8::try_from(first_use + read).map_err(|_| refused())?;
4014 defs[def].constraint = Constraint::Reuse(at);
4015 }
4016 }
4017 }
4018
4019 // A line naming an operand in a register, with an instruction on it the reader knows, is
4020 // one the reader refused for a reason of its own, and keeping it as text would hand the
4021 // assembler what the reader already said no to. `addq %1, %k0` is that: a quadword add
4022 // into half a register. What is kept is a line with an instruction nothing here knows.
4023 let registered = |index: usize| def_of[index].is_some() || use_of[index].is_some();
4024 if !a64 && (0..list.len()).any(registered) {
4025 for line in template.split(['\n', ';']) {
4026 if names_one(line, registered)
4027 && x86_64::known(line, widths, memory)
4028 && x86_64::read_in(line, widths, memory).is_none()
4029 {
4030 return Err(refused());
4031 }
4032 }
4033 }
4034
4035 let mut text = String::with_capacity(template.len());
4036 let mut memory: Option<usize> = None;
4037 if basic {
4038 text.push_str(template);
4039 } else {
4040 let mut chars = template.chars().peekable();
4041 // Inside `{att|intel}`, and past the `|` in it, which is the half nobody reads. AArch64
4042 // has one dialect, and a brace there is a list of vector registers.
4043 let mut dialect = false;
4044 let mut skipped = false;
4045 while let Some(c) = chars.next() {
4046 match c {
4047 '{' if !a64 => {
4048 dialect = true;
4049 continue;
4050 }
4051 '|' if dialect => {
4052 skipped = true;
4053 continue;
4054 }
4055 '}' if dialect => {
4056 dialect = false;
4057 skipped = false;
4058 continue;
4059 }
4060 _ if skipped => continue,
4061 '%' => {}
4062 _ => {
4063 text.push(c);
4064 continue;
4065 }
4066 }
4067 match chars.peek().copied() {
4068 Some(c @ ('%' | '{' | '|' | '}')) => {
4069 chars.next();
4070 text.push(c);
4071 continue;
4072 }
4073 Some('=') => {
4074 chars.next();
4075 text.push_str(&inst.index().to_string());
4076 continue;
4077 }
4078 _ => {}
4079 }
4080 let modifier = match chars.peek().copied() {
4081 Some(c) if c.is_ascii_alphabetic() => {
4082 chars.next();
4083 Some(c)
4084 }
4085 _ => None,
4086 };
4087 let mut digits = String::new();
4088 while let Some(c) = chars.peek().copied().filter(char::is_ascii_digit) {
4089 digits.push(c);
4090 chars.next();
4091 }
4092 let index: usize = digits.parse().map_err(|_| refused())?;
4093 let operand = list.get(index).ok_or_else(refused)?;
4094 if operand.memory && a64 {
4095 let at = use_of[index].map(|at| first_use + at).ok_or_else(refused)?;
4096 if modifier.is_some() {
4097 return Err(refused());
4098 }
4099 text.push('[');
4100 text.push_str(&template_reg(at, 'x'));
4101 text.push(']');
4102 continue;
4103 }
4104 if operand.memory {
4105 if modifier.is_some() || memory.is_some_and(|had| had != index) {
4106 return Err(refused());
4107 }
4108 memory = Some(index);
4109 text.push_str(x86_64::TEMPLATE_MEM);
4110 continue;
4111 }
4112 let placed = def_of[index].or(use_of[index].map(|at| first_use + at));
4113 if let Some(at) = placed {
4114 let value = operand.result.or(operand.value).ok_or_else(refused)?;
4115 let bits = held_bits(self.source[value].ty);
4116 // `w` and `x` are the two names every general purpose register has, and one
4117 // with no modifier is named at the width of its type, as gcc names it. A
4118 // vector register with no modifier is `v`, which is what gcc writes for one
4119 // whatever is in it, and the modifiers name the scalar views of it.
4120 let width = if a64 && files[index] != self.gpr {
4121 match modifier {
4122 None => 'v',
4123 Some(view @ ('b' | 'h' | 's' | 'd' | 'q')) => view,
4124 Some(_) => return Err(refused()),
4125 }
4126 } else if a64 {
4127 match (modifier, bits) {
4128 (None, 8 | 16 | 32) | (Some('w'), _) => 'w',
4129 (None, 64) | (Some('x'), _) => 'x',
4130 _ => return Err(refused()),
4131 }
4132 } else {
4133 match modifier {
4134 None => match held_bits(self.source[value].ty) {
4135 8 => 'b',
4136 16 => 'w',
4137 32 => 'k',
4138 64 => 'q',
4139 _ => return Err(refused()),
4140 },
4141 Some(width @ ('b' | 'w' | 'k' | 'q')) => width,
4142 // The second byte is a name only four registers have, so it is taken for
4143 // an operand pinned to one of them and for nothing the allocator chose.
4144 Some('h') if pinned(operand).and_then(x86_64::gpr_high).is_some() => {
4145 'h'
4146 }
4147 Some(_) => return Err(refused()),
4148 }
4149 };
4150 text.push_str(&template_reg(at, width));
4151 continue;
4152 }
4153 let value = operand.value.ok_or_else(refused)?;
4154 let bare = match modifier {
4155 None => false,
4156 Some('c' | 'P' | 'p') => true,
4157 Some(_) => return Err(refused()),
4158 };
4159 // A constant is bare on AArch64 whatever the modifier, which is how gcc prints one
4160 // there and a form GNU as takes wherever `#` would go.
4161 if !bare && !a64 {
4162 text.push('$');
4163 }
4164 if let Some(number) = self.number(value) {
4165 text.push_str(&number.to_string());
4166 } else if let Some(symbol) = self.named_address(value) {
4167 text.push_str(&template_name(self.names.resolve(symbol)));
4168 } else {
4169 return Err(refused());
4170 }
4171 }
4172 }
4173
4174 // An object in this function's frame is named by where it is in the frame, the way gcc
4175 // names it, rather than by a register its address was put in first. The text may write
4176 // registers it does not declare, and tcc's tests do: one that writes `%ecx` behind the
4177 // compiler's back would otherwise take the address with it.
4178 let mut local = None;
4179 let at = match memory.filter(|_| !a64) {
4180 Some(index) => {
4181 let value = list[index].value.ok_or_else(refused)?;
4182 local = self.local_of(value);
4183 let base = match local {
4184 Some(_) => mir::Reg::physical(self.conv.stack_pointer),
4185 None => self.reg_of(value)?,
4186 };
4187 Some(mir::Mem::at(mir::Operand::read(base, self.gpr)))
4188 }
4189 None => None,
4190 };
4191 let symbol = self.names.intern(&text);
4192 let opcode = self.named(if a64 { aarch64::TEMPLATE } else { x86_64::TEMPLATE });
4193 let block = self.at.expect("a block is being filled");
4194 let span = self.source.span(inst);
4195 let mut build = self.out.build(block, opcode).at(span).symbol(symbol);
4196 for operand in defs.into_iter().chain(written).chain(uses) {
4197 build = build.operand(operand);
4198 }
4199 if let Some(mem) = at {
4200 build = build.mem(mem);
4201 }
4202 let made = build.finish();
4203 if let Some(local) = local {
4204 self.stack.addresses.push((made, local));
4205 }
4206 Ok(())
4207 }
4208
4209 /// The object in this function's frame a value is the address of, for one an `alloca` of a
4210 /// size known here made. See [`Self::reserve`], which is where the `lea` it is found by came
4211 /// from.
4212 fn local_of(&self, value: Value) -> Option<usize> {
4213 let Def::Result { inst, .. } = self.source[value].def else { return None };
4214 if self.source[inst].opcode != Opcode::Alloca
4215 || !self.source[self.source[inst].args].is_empty()
4216 {
4217 return None;
4218 }
4219 let reg = self.regs[value.index()]?;
4220 self.stack.addresses.iter().find_map(|&(made, local)| {
4221 let data = &self.out[made];
4222 let defined = self.out[data.operands].first()?;
4223 (defined.reg == reg).then_some(local)
4224 })
4225 }
4226
4227 /// The name a value is the address of, for one a `global_addr` defined.
4228 fn named_address(&self, value: Value) -> Option<Symbol> {
4229 let Def::Result { inst, .. } = self.source[value].def else { return None };
4230 if self.source[inst].opcode != Opcode::GlobalAddr {
4231 return None;
4232 }
4233 let Extra::Symbol(symbol) = self.source[inst].extra else { return None };
4234 Some(symbol)
4235 }
4236
4237 /// A register holding a zero, for an operand of a template that is read before anything filled
4238 /// it.
4239 ///
4240 /// Two things ask for this and they are the same thing twice. An output the template reads has
4241 /// nothing to be read out of until the instruction that writes it has run, and a loop carries
4242 /// an operand into a block before the instruction that fills it, so both are a use in front of
4243 /// every definition. What the program is owed there is nothing, since the value is undefined
4244 /// either way, and what the allocator is owed is a register something wrote.
4245 fn seeded(&mut self, inst: Inst, operand: AsmOperand<'_>) -> Result<mir::Reg, Unsupported> {
4246 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
4247 let value = operand.result.or(operand.value).ok_or_else(refused)?;
4248 let class = self.class_of(self.source[value].ty);
4249 if class != self.gpr {
4250 return Err(refused());
4251 }
4252 let block = self.at.expect("a block is being filled");
4253 let reg = self.out.new_vreg(class);
4254 let put = self.named("mov_ri_64");
4255 self.out.build(block, put).at(self.source.span(inst)).def(reg, class).imm(0).finish();
4256 Ok(reg)
4257 }
4258
4259 /// A template with labels in it, as the blocks its jumps leave and arrive at.
4260 ///
4261 /// A statement is an instruction of the IR and stands inside one block, so a template that
4262 /// jumps has to stop being one thing. Each label becomes a block, each jump ends the block it
4263 /// stands in and gives it two arms, and whatever follows the statement goes into whichever
4264 /// block the walk finished in, which is what [`Self::block`] already reads off `self.at` and
4265 /// what [`Self::saves_place`] already does for the same reason.
4266 ///
4267 /// # What is carried between them
4268 ///
4269 /// The machine IR here is in the form where a register is written once, so an operand written
4270 /// inside a loop and read again at the top of it cannot be one register. What arrives at the
4271 /// top is a parameter of that block, and every jump to it carries whichever register held the
4272 /// operand where the jump stands. That is the whole of the bookkeeping: every block a label
4273 /// made takes one parameter for each operand that is in a register at all, in one order, so an
4274 /// arm's arguments and a block's parameters are the same list read twice.
4275 ///
4276 /// Which register an operand is in at each point is kept in the read half of its place, since
4277 /// that is what the instructions below read it out of. An instruction that writes an operand
4278 /// leaves it in the register it wrote, and a jump below carries that one. The block an
4279 /// untaken jump falls into is arrived at one way only and so takes no parameters, and nothing
4280 /// about where the operands are changes there.
4281 ///
4282 /// An operand written by the template and filled by nothing is written as a zero first, for
4283 /// the reason [`Self::undefined`] gives and one more: a jump may carry it before the
4284 /// instruction that fills it has run, and an argument has to be a register something wrote.
4285 ///
4286 /// # The condition state
4287 ///
4288 /// Nothing carries it and nothing has to. The instruction that sets it and the jump that reads
4289 /// it are both written here, next to each other in one block, and what the allocator may put
4290 /// between them is a move, which on this machine leaves the condition state alone. The edge
4291 /// into a block a loop goes back to is a critical edge and `crate::split` gives it a block of
4292 /// its own, so the moves an arm turns into land behind the jump rather than in front of it.
4293 fn woven(
4294 &mut self,
4295 inst: Inst,
4296 steps: &[x86_64::Step],
4297 places: &mut [Place],
4298 list: &[AsmOperand<'_>],
4299 clobbered: &[PhysReg],
4300 writes: &[usize],
4301 ) -> Result<(), Unsupported> {
4302 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
4303 let span = self.source.span(inst);
4304
4305 // Which operands are carried, which is every one that is in a register at all. An operand
4306 // the template never puts in one, such as a constant it names only as the distance into an
4307 // address, is in the instruction and has nowhere to be carried from.
4308 let mut carried: Vec<(usize, RegClass)> = Vec::new();
4309 for (index, operand) in list.iter().enumerate() {
4310 if places[index].read.is_none() && places[index].write.is_none() {
4311 continue;
4312 }
4313 let value = operand.result.or(operand.value).ok_or_else(refused)?;
4314 let ty = self.source[value].ty;
4315 if on_x87(ty) {
4316 return Err(refused());
4317 }
4318 carried.push((index, self.class_of(ty)));
4319 }
4320
4321 // What each of them holds where the template starts.
4322 for &(index, _) in &carried {
4323 if places[index].read.is_some() {
4324 continue;
4325 }
4326 if writes[index] == 0 {
4327 places[index].read = places[index].write;
4328 continue;
4329 }
4330 places[index].read = Some(self.seeded(inst, list[index])?);
4331 }
4332
4333 // The blocks, made before the walk because a jump forwards names a label the walk has not
4334 // reached yet.
4335 let mut labels: Vec<(&str, mir::Block, Vec<mir::Reg>)> = Vec::new();
4336 for step in steps {
4337 let x86_64::Step::Label(name) = step else { continue };
4338 let block = self.out.create_block();
4339 let mut params = Vec::with_capacity(carried.len());
4340 for &(_, class) in &carried {
4341 params.push(self.out.append_param(block, class));
4342 }
4343 labels.push((name.as_str(), block, params));
4344 }
4345
4346 let mut wrote: Vec<usize> = Vec::new();
4347 for step in steps {
4348 match step {
4349 x86_64::Step::Label(name) => {
4350 let (block, params) = Self::went(&labels, name).ok_or_else(refused)?;
4351 let from = self.at.expect("a block is being filled");
4352 let args = Self::held(places, &carried).ok_or_else(refused)?;
4353 *self.out.succs_mut(from) = vec![mir::BlockCall::with(block, args)];
4354 self.at = Some(block);
4355 for (at, &(index, _)) in carried.iter().enumerate() {
4356 places[index].read = params.get(at).copied();
4357 }
4358 }
4359 x86_64::Step::Jump { opcode, to } => {
4360 let (block, _) = Self::went(&labels, to).ok_or_else(refused)?;
4361 let from = self.at.expect("a block is being filled");
4362 let args = Self::held(places, &carried).ok_or_else(refused)?;
4363 let opcode = self.named(opcode);
4364 self.out.build(from, opcode).at(span).finish();
4365 let next = self.out.create_block();
4366 *self.out.succs_mut(from) =
4367 vec![mir::BlockCall::with(block, args), mir::BlockCall::to(next)];
4368 self.at = Some(next);
4369 }
4370 x86_64::Step::Away { symbol } => {
4371 // Only in a function that is written without a prologue, which is the one
4372 // place the jump means what it says. Anywhere else there is an epilogue behind
4373 // the statement that puts the registers back and gives the frame up, and a
4374 // jump over it goes to the next function with this function's frame still
4375 // taken. The reader already made sure it is the last step of the template, so
4376 // what is left to ask is about the function around it.
4377 if !self.source.attrs.set.contains(AttrSet::NAKED) {
4378 return Err(Unsupported::Assembly { inst, refused: Written::Away });
4379 }
4380 let from = self.at.expect("a block is being filled");
4381 let opcode = self.named(AWAY);
4382 let symbol = self.names.intern(symbol);
4383 self.out.build(from, opcode).at(span).symbol(symbol).finish();
4384 // Nowhere, which is what a jump out of the function leaves behind it and is
4385 // the same list a `ret` leaves. The block after it is made for the walk above
4386 // rather than for the program: the statement may be in the middle of a body
4387 // that goes on being lowered, and what that lowering writes is reached by
4388 // nothing and thrown away with the block.
4389 *self.out.succs_mut(from) = Vec::new();
4390 self.at = Some(self.out.create_block());
4391 }
4392 x86_64::Step::Call { symbol } => {
4393 self.call_out(inst, symbol, places, list, clobbered, &carried, &mut wrote)?;
4394 }
4395 x86_64::Step::Line(line) => {
4396 let form = x86_64::form(line.opcode).ok_or_else(refused)?;
4397 let mut written = Vec::new();
4398 for (desc, piece) in form.operands().iter().zip(&line.operands) {
4399 if !desc.role.is_def() {
4400 continue;
4401 }
4402 let index = match *piece {
4403 x86_64::Piece::Operand { index, .. } => index,
4404 x86_64::Piece::Implicit { reg } => match bound(list, reg, desc.role) {
4405 Some(index) => index,
4406 None => continue,
4407 },
4408 x86_64::Piece::Reg { reg, .. } => match bound(list, reg, desc.role) {
4409 Some(index) => index,
4410 None => continue,
4411 },
4412 };
4413 written.push(index);
4414 }
4415 // A register is written once in this form of the machine IR, so an operand
4416 // an instruction above already wrote is written into a new one here, and what
4417 // reads it below reads that one.
4418 for &index in &written {
4419 if !wrote.contains(&index) {
4420 wrote.push(index);
4421 continue;
4422 }
4423 let &(_, class) =
4424 carried.iter().find(|&&(at, _)| at == index).ok_or_else(refused)?;
4425 let place = places.get_mut(index).ok_or_else(refused)?;
4426 place.write = Some(self.out.new_vreg(class));
4427 }
4428 self.instruction(inst, line, places, list, clobbered)?;
4429 for index in written {
4430 let place = places.get_mut(index).ok_or_else(refused)?;
4431 if place.write.is_some() {
4432 place.read = place.write;
4433 }
4434 }
4435 }
4436 }
4437 }
4438
4439 // Where the walk left each output, which is the parameter of the block a label made when
4440 // the template ends in one and the register an instruction wrote when it does not.
4441 for (index, operand) in list.iter().enumerate() {
4442 let Some(result) = operand.result else { continue };
4443 if let Some(reg) = places[index].read {
4444 self.regs[result.index()] = Some(reg);
4445 }
4446 }
4447 Ok(())
4448 }
4449
4450 /// A template's call to a function somewhere else, as the call the convention makes.
4451 ///
4452 /// The opcode is the one a call written in C becomes, so everything that asks whether a
4453 /// function calls anything gets the answer it would for one: the stack pointer is left aligned
4454 /// at the statement and nothing is kept in the red zone. What is not the same is the operands.
4455 /// Nothing is passed by the convention, since the template put the arguments where it wanted
4456 /// them, and what comes back is whatever an output is pinned to, since that is the only thing
4457 /// the template says about it. Every other register the callee may leave anything in is
4458 /// written here, which is what a program that calls from a template never says and always
4459 /// means.
4460 #[allow(clippy::too_many_arguments)]
4461 fn call_out(
4462 &mut self,
4463 inst: Inst,
4464 symbol: &str,
4465 places: &mut [Place],
4466 list: &[AsmOperand<'_>],
4467 clobbered: &[PhysReg],
4468 carried: &[(usize, RegClass)],
4469 wrote: &mut Vec<usize>,
4470 ) -> Result<(), Unsupported> {
4471 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
4472 let mut operands = Vec::new();
4473 let mut written = Vec::new();
4474 let lost = self.lost(list);
4475 for &(reg, class, index) in &lost {
4476 let Some(index) = index else {
4477 operands.push(mir::Operand::write(mir::Reg::physical(reg), class));
4478 continue;
4479 };
4480 // Written once in this form of the machine IR, so a second write is a new register,
4481 // the same as for an instruction in [`Self::woven`].
4482 if wrote.contains(&index) {
4483 let &(_, class) =
4484 carried.iter().find(|&&(at, _)| at == index).ok_or_else(refused)?;
4485 places.get_mut(index).ok_or_else(refused)?.write = Some(self.out.new_vreg(class));
4486 } else {
4487 wrote.push(index);
4488 }
4489 let place = places.get(index).ok_or_else(refused)?.write.ok_or_else(refused)?;
4490 operands.push(mir::Operand::write(place, class).with(Constraint::Fixed(reg)));
4491 written.push(index);
4492 }
4493 for ® in clobbered {
4494 if lost.iter().all(|&(gone, class, _)| gone != reg || class != self.gpr) {
4495 operands.push(mir::Operand::write(mir::Reg::physical(reg), self.gpr));
4496 }
4497 }
4498 let block = self.at.expect("a block is being filled");
4499 let span = self.source.span(inst);
4500 let opcode = mir::Opcode::new(self.names.intern(abi::CALL));
4501 let symbol = self.names.intern(symbol);
4502 let mut build = self.out.build(block, opcode).at(span).symbol(symbol);
4503 for operand in operands {
4504 build = build.operand(operand);
4505 }
4506 build.finish();
4507 let calls = &mut self.stack.calls;
4508 *calls = Some(calls.unwrap_or(0));
4509 for index in written {
4510 let place = places.get_mut(index).ok_or_else(refused)?;
4511 place.read = place.write;
4512 }
4513 Ok(())
4514 }
4515
4516 /// Every register a call may leave anything in, with its file and the output pinned to it if
4517 /// one is.
4518 ///
4519 /// A register is asked about with its file, since the two files are numbered from nought alike
4520 /// and a question about `v8` alone would find an output pinned to `x8`.
4521 fn lost(&self, list: &[AsmOperand<'_>]) -> Vec<(PhysReg, RegClass, Option<usize>)> {
4522 let conv = self.conv;
4523 let ints = conv.int_order.iter().filter(|&®| !conv.preserves_int(reg));
4524 let sses = conv.sse_order.iter().filter(|&®| !conv.preserves_sse(reg));
4525 let written = |reg, class| {
4526 list.iter().position(|operand| {
4527 operand.result.is_some() && self.pinned_here(operand) == Some((reg, class))
4528 })
4529 };
4530 ints.map(|®| (reg, conv.int_class, written(reg, conv.int_class)))
4531 .chain(sses.map(|®| (reg, conv.sse_class, written(reg, conv.sse_class))))
4532 .collect()
4533 }
4534
4535 /// The input an output read before anything wrote it shares its register with, which is the
4536 /// one input that could be in that register, or nothing when there is none or more than one.
4537 ///
4538 /// Could be means nothing ties it elsewhere: it is in a register rather than in memory, no
4539 /// constraint pins it anywhere the output is not, and it is not tied to another output. An
4540 /// output written `&` shares nothing, since the assembly writes it before it reads the inputs.
4541 fn shared(&self, list: &[AsmOperand<'_>], index: usize) -> Option<Value> {
4542 let output = list.get(index)?;
4543 if output.early || output.tied.is_some() {
4544 return None;
4545 }
4546 let class = self.class_of(self.source[output.result?].ty);
4547 let mut fits = list.iter().filter(|operand| {
4548 operand.result.is_none()
4549 && !operand.memory
4550 && operand.tied.is_none()
4551 && operand.value.is_some_and(|value| self.class_of(self.source[value].ty) == class)
4552 && pinned(operand).is_none_or(|reg| pinned(output) == Some(reg))
4553 });
4554 let value = fits.next()?.value;
4555 if fits.next().is_some() {
4556 return None;
4557 }
4558 value
4559 }
4560
4561 /// The block one of the template's labels made, and the parameters it takes.
4562 fn went<'b>(
4563 labels: &'b [(&str, mir::Block, Vec<mir::Reg>)],
4564 name: &str,
4565 ) -> Option<(mir::Block, &'b [mir::Reg])> {
4566 labels
4567 .iter()
4568 .find(|(had, ..)| *had == name)
4569 .map(|(_, block, params)| (*block, params.as_slice()))
4570 }
4571
4572 /// The register each carried operand is in, which is what an arm to a label carries.
4573 fn held(places: &[Place], carried: &[(usize, RegClass)]) -> Option<Vec<mir::Reg>> {
4574 carried.iter().map(|&(index, _)| places.get(index)?.read).collect()
4575 }
4576
4577 /// The registers a clobber list names, in the order it named them.
4578 ///
4579 /// Nothing is dropped. A name this has no register for is refused, because the list is the
4580 /// program telling the compiler which registers it may not leave anything in, and an entry
4581 /// nobody read is a register something may still be left in. See [`Self::assembly`] for the
4582 /// two entries that are not registers and for why they are skipped rather than refused.
4583 fn clobbered(inst: Inst, clobbers: &str) -> Result<Vec<PhysReg>, Unsupported> {
4584 let refused = || Unsupported::Assembly { inst, refused: Written::Clobber };
4585 let mut named = Vec::new();
4586 for entry in clobbers.split(',') {
4587 let entry = entry.trim().trim_matches('"');
4588 // The sigil is optional in a clobber list and means nothing when it is there, unlike
4589 // in a template, where it is what tells a register from an operand.
4590 let entry = entry.strip_prefix('%').unwrap_or(entry);
4591 if entry.is_empty() || matches!(entry, "memory" | "cc" | "flags") {
4592 continue;
4593 }
4594 let (reg, _) = x86_64::gpr_named(entry).ok_or_else(refused)?;
4595 if !named.contains(®) {
4596 named.push(reg);
4597 }
4598 }
4599 Ok(named)
4600 }
4601
4602 /// [`Self::clobbered`] on AArch64, where a clobber may name a vector register as well as a
4603 /// general purpose one, so each comes back with the file it is in. See [`aarch64::named`].
4604 fn clobbered_a64(inst: Inst, clobbers: &str) -> Result<Vec<(PhysReg, RegClass)>, Unsupported> {
4605 let refused = || Unsupported::Assembly { inst, refused: Written::Clobber };
4606 let mut named = Vec::new();
4607 for entry in clobbers.split(',') {
4608 let entry = entry.trim().trim_matches('"');
4609 if entry.is_empty() || matches!(entry, "memory" | "cc") {
4610 continue;
4611 }
4612 let reg = aarch64::named(entry).ok_or_else(refused)?;
4613 if !named.contains(®) {
4614 named.push(reg);
4615 }
4616 }
4617 Ok(named)
4618 }
4619
4620 /// Whether the machine being lowered for is AArch64.
4621 fn on_aarch64(&self) -> bool {
4622 std::ptr::eq(self.selector.shapes, &aarch64::MACHINE)
4623 }
4624
4625 /// The register an operand is pinned to on the machine being lowered for.
4626 ///
4627 /// [`pinned`] on x86, where it is always a general purpose register. AArch64 has no constraint
4628 /// letter for one register, so there only a local register variable pins anything, and its name
4629 /// is read against [`aarch64::named`], which may put it in either file. The file comes back with
4630 /// the register because the two are numbered from nought alike, and `x8` is not `v8`.
4631 fn pinned_here(&self, operand: &AsmOperand<'_>) -> Option<(PhysReg, RegClass)> {
4632 if !self.on_aarch64() {
4633 return pinned(operand).map(|reg| (reg, self.gpr));
4634 }
4635 let name = operand.named?;
4636 aarch64::named(name.strip_prefix('%').unwrap_or(name))
4637 }
4638
4639 /// An `asm` statement on AArch64, which is kept as text whatever is in it.
4640 ///
4641 /// Nothing reads AArch64 assembly back into instructions yet, so every template goes the way
4642 /// one the x86 reader could not take apart goes, which is [`Self::kept`]: the text is carried
4643 /// to the listing with a hole for each operand, and the operands are the instruction's own. A
4644 /// constraint with a letter whose meaning differs between the two machines is refused first.
4645 /// See [`shared_letters`].
4646 fn spelled(&mut self, inst: Inst) -> Result<(), Unsupported> {
4647 let data = &self.source[inst];
4648 let Extra::Asm(asm) = data.extra else { return Err(self.unsupported(inst)) };
4649 let info = self.source[asm];
4650 if !self.source[info.targets].is_empty() {
4651 return Err(Unsupported::Assembly { inst, refused: Written::Goto });
4652 }
4653 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
4654 let constraints = self.names.resolve(info.constraints).to_string();
4655 if !constraints.split(',').all(shared_letters) {
4656 return Err(refused());
4657 }
4658 let results: Vec<Value> = data.results().collect();
4659 let operands = AsmOperands::read(&constraints, &results, &self.source[data.args])
4660 .ok_or_else(refused)?;
4661 let list: Vec<AsmOperand<'_>> = operands.iter().copied().collect();
4662 let widths = vec![None; list.len()];
4663 let memory: Vec<bool> = list.iter().map(|operand| operand.memory).collect();
4664 let template = self.names.resolve(info.template).to_string();
4665 self.kept(inst, &template, &list, &widths, &memory)
4666 }
4667
4668 /// One instruction of a template, as the machine instruction it was read back into.
4669 fn instruction(
4670 &mut self,
4671 inst: Inst,
4672 line: &x86_64::Line,
4673 places: &[Place],
4674 list: &[AsmOperand<'_>],
4675 clobbered: &[PhysReg],
4676 ) -> Result<(), Unsupported> {
4677 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
4678 let form = x86_64::form(line.opcode).ok_or_else(refused)?;
4679 // What the instruction reaches and what is in each of them. The description answers the
4680 // first for every opcode but one, and the pieces the template was read into answer the
4681 // second. Bytes a program wrote out itself are the one, since nothing in a number is a
4682 // register anybody could read, so the constraint letters answer both. See
4683 // [`Self::lettered`].
4684 let lettered = (line.opcode == x86_64::LITERAL).then(|| self.lettered(list));
4685 let (described, pieces) = match &lettered {
4686 Some((described, pieces)) => (described.as_slice(), pieces.as_slice()),
4687 None => (form.operands(), line.operands.as_slice()),
4688 };
4689 let mut built = Vec::with_capacity(pieces.len() + clobbered.len());
4690 for (desc, piece) in described.iter().zip(pieces) {
4691 built.push(self.placed(inst, *desc, *piece, places, list)?);
4692 }
4693 // The clobbers go in among the definitions rather than behind the reads, because an operand
4694 // vector in the machine IR is every definition and then every use and what counts them
4695 // reads that order rather than each operand's role.
4696 let defs = built.iter().take_while(|operand| operand.role.is_def()).count();
4697 let mut added = 0usize;
4698 for ® in clobbered {
4699 if described.iter().any(|desc| desc.constraint == Constraint::Fixed(reg)) {
4700 continue;
4701 }
4702 built.insert(defs, mir::Operand::write(mir::Reg::physical(reg), self.gpr));
4703 added += 1;
4704 }
4705 // A constraint tying one operand to another names it by its place in this vector, and the
4706 // clobbers were put in the middle of the vector, so everything behind them moved. The
4707 // description is written against an instruction with no clobbers in it and cannot know
4708 // that, which makes this the one place the two numberings have to be reconciled.
4709 for operand in &mut built {
4710 if let Constraint::Reuse(at) = operand.constraint {
4711 if usize::from(at) >= defs {
4712 let moved = usize::from(at) + added;
4713 operand.constraint =
4714 Constraint::Reuse(u8::try_from(moved).map_err(|_| refused())?);
4715 }
4716 }
4717 }
4718 let at = match line.at {
4719 Some(at) => Some(self.addressed(inst, at, places, list)?),
4720 None => None,
4721 };
4722
4723 let block = self.at.expect("a block is being filled");
4724 let span = self.source.span(inst);
4725 let opcode = self.named(line.opcode);
4726 let mut build = self.out.build(block, opcode).at(span);
4727 for operand in built {
4728 build = build.operand(operand);
4729 }
4730 if let Some(value) = line.imm {
4731 build = build.imm(value);
4732 }
4733 if let Some(mem) = at {
4734 build = build.mem(mem);
4735 }
4736 build.finish();
4737 Ok(())
4738 }
4739
4740 /// The registers a run of bytes reaches, taken from the constraint letters rather than from the
4741 /// description of an opcode.
4742 ///
4743 /// Every other instruction of a template has a description saying which registers it reaches
4744 /// without naming them, and [`Self::assembly`] matches the letters against that. Bytes a program
4745 /// wrote out itself have no such description and could not have one: what the instruction is, is
4746 /// a number, and nothing in a number is a register anything could read. So the letters are the
4747 /// whole of what is known, and they are enough, because a program writing an instruction this
4748 /// way has to say where its operands go for exactly the reason a program writing `cpuid` does.
4749 ///
4750 /// Each register named by a letter gets one entry for the write and one for the read, the same
4751 /// two `cpuid` has, and only the half the statement asked for: a register no output names is not
4752 /// written here and one no input names is not read. The writes come first because that is the
4753 /// order an operand vector in the machine IR is counted in. A register named by nothing is left
4754 /// out rather than given a spare one, which is the difference from `cpuid` and is right for the
4755 /// same reason: `cpuid` writes four registers whatever the program said, and what these bytes
4756 /// touch is known only from what the program said.
4757 fn lettered(&self, list: &[AsmOperand<'_>]) -> (Vec<OperandDesc>, Vec<x86_64::Piece>) {
4758 let mut named: Vec<PhysReg> = Vec::new();
4759 for operand in list {
4760 if let Some(reg) = pinned(operand) {
4761 if !named.contains(®) {
4762 named.push(reg);
4763 }
4764 }
4765 }
4766 let mut described = Vec::with_capacity(named.len() * 2);
4767 let mut pieces = Vec::with_capacity(named.len() * 2);
4768 for role in [Role::Def, Role::Use] {
4769 for ® in &named {
4770 if bound(list, reg, role).is_none() {
4771 continue;
4772 }
4773 let desc = if role.is_def() {
4774 OperandDesc::write(self.gpr)
4775 } else {
4776 OperandDesc::read(self.gpr)
4777 };
4778 described.push(desc.with(Constraint::Fixed(reg)));
4779 pieces.push(x86_64::Piece::Implicit { reg });
4780 }
4781 }
4782 (described, pieces)
4783 }
4784
4785 /// One operand of one instruction of a template, in the register the statement put it in.
4786 fn placed(
4787 &mut self,
4788 inst: Inst,
4789 desc: OperandDesc,
4790 piece: x86_64::Piece,
4791 places: &[Place],
4792 list: &[AsmOperand<'_>],
4793 ) -> Result<mir::Operand, Unsupported> {
4794 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
4795 // A register the instruction reaches without its text naming it belongs to whichever of the
4796 // statement's operands a constraint letter put there, and to nobody when no letter did.
4797 // There is no width to check in that case: the operand is the register the letter named and
4798 // the instruction does what it does to it, which is what a program writing `"=a"` asked for.
4799 let (index, spelled) = match piece {
4800 x86_64::Piece::Operand { index, width, stated } => (index, Some((width, stated))),
4801 x86_64::Piece::Implicit { reg } => match bound(list, reg, desc.role) {
4802 Some(index) => (index, None),
4803 None => return self.spare(inst, desc),
4804 },
4805 // A register the template named, which belongs to one of the statement's operands when
4806 // a constraint letter put that operand there and to nobody otherwise. Asked in that
4807 // order rather than placed straight away, because `"D" (p)` with `%rdi` in the text is
4808 // the program saying one thing twice, and answering it twice would hand the allocator
4809 // one register holding two values.
4810 x86_64::Piece::Reg { reg, .. } => match bound(list, reg, desc.role) {
4811 Some(index) => (index, None),
4812 None => return self.itself(inst, desc, reg),
4813 },
4814 };
4815 let operand = list.get(index).copied().ok_or_else(refused)?;
4816 // The two halves of an operand written `+`, which arrives in one register and leaves in
4817 // another with the allocator told to make them the same one. Everything else has one of
4818 // the two and asking for the other is the refusal below.
4819 let place = places.get(index).copied().ok_or_else(refused)?;
4820 let reg = match desc.role {
4821 Role::Use => place.read,
4822 Role::Def | Role::EarlyDef => place.write,
4823 }
4824 .ok_or_else(refused)?;
4825
4826 // Read where the opcode reads and written where it writes, which is what the first half of
4827 // this asks. An output has a result and an input has a value, an output written `+` has
4828 // both because it is read before it is written, and an output a matching constraint names
4829 // is read as the input that named it. See [`read_as`].
4830 // An output with neither is read as well, and what it holds there is undefined, which
4831 // [`Self::assembly`] says why and puts a zero in a register for.
4832 let placeable = match desc.role {
4833 Role::Use => read_as(list, index).is_some() || operand.result.is_some(),
4834 Role::Def | Role::EarlyDef => operand.result.is_some(),
4835 };
4836 let ty = match (operand.result, operand.value) {
4837 (Some(result), _) => self.source[result].ty,
4838 (None, Some(value)) => self.source[value].ty,
4839 (None, None) => return Err(refused()),
4840 };
4841 let bits = held_bits(ty);
4842 if !placeable || self.class_of(ty) != desc.class {
4843 return Err(refused());
4844 }
4845 if let Some((width, stated)) = spelled {
4846 // An operand the template wrote a width on may be written by an instruction that fills
4847 // more of the register than the object in it does, and the object is then the low part
4848 // of what was written. That is what gmp asks for when it counts the low zero bits of a
4849 // limb into an `unsigned` and spells the count `%q0`: one quadword instruction writes
4850 // the whole register and the `unsigned` is the bottom of it, which is every bit of an
4851 // answer that cannot exceed sixty four anyway.
4852 //
4853 // An operand read at a width the template wrote is the other way round: the object is
4854 // in the register and the instruction looks at the bottom of it. tcc tests the low bits
4855 // of a `size_t` count with `testb $2,%b4`, and every bit that test reads is one the
4856 // object put there.
4857 //
4858 // A write of less of a register than the object fills is right in one case, which is
4859 // an instruction that reads the register it writes and an operand that arrives with
4860 // the object in it. The top of the register is then the top of the object, and the
4861 // instruction leaves it alone. tcc swaps the bytes of an `unsigned` with `xchgb
4862 // %b0,%h0` and a rotate between two of them, and the swap only ever touches the low
4863 // half.
4864 //
4865 // The two that stay refused are a read of more of a register than its type fills,
4866 // which hands an instruction bits nothing ever put there, and a write of less of one
4867 // that nothing carried the object into, which leaves the top of the object holding
4868 // whatever the register held before. An operand the template left plain is refused
4869 // either way, because what gets spelled for that one is the register at the width of
4870 // its type and no other instruction is the one written down.
4871 let carried = matches!(desc.constraint, Constraint::Reuse(_) | Constraint::Fixed(_))
4872 && read_as(list, index).is_some();
4873 // The other case is the one the machine settles by itself: a write of the low four
4874 // bytes of a register clears the four above them, so a sixty four bit object written
4875 // that way holds the thirty two bit answer and nothing else. tcc loads a word through
4876 // `movl 4(%0),%k0` into a `long` and means exactly that.
4877 let cleared = desc.class == self.gpr && width == x86_64::Width::Long && bits == 64;
4878 let widened = stated && desc.role.is_def() && width.bits() > bits;
4879 let narrowed =
4880 stated && width.bits() < bits && (!desc.role.is_def() || carried || cleared);
4881 if bits != width.bits() && !widened && !narrowed {
4882 return Err(refused());
4883 }
4884 }
4885 // An operand the program pinned is in that register and nowhere else, whatever the opcode
4886 // would have allowed it. That is the whole of what a local register variable asks for, and
4887 // it is the same shape a division already has: the allocator is told the register, puts a
4888 // move in front or behind where it has to, and leaves it out where it does not.
4889 let constraint = match pinned(&operand) {
4890 Some(reg) => Constraint::Fixed(reg),
4891 None => desc.constraint,
4892 };
4893 Ok(mir::Operand { reg, class: desc.class, role: desc.role, constraint })
4894 }
4895
4896 /// A register the template named in its own text.
4897 ///
4898 /// Not one of the statement's operands and not something the allocator handed out. The program
4899 /// wrote `%rbx` in the middle of a template and meant that register, which is what code doing
4900 /// something the constraint letters cannot say is made of: micropython saves the callee-saved
4901 /// registers into a buffer by name because the whole point of the buffer is that those exact
4902 /// registers are in it, and there is no constraint letter for `%rsp`.
4903 ///
4904 /// So it is placed as itself, fixed to the register the template named. What that buys is the
4905 /// thing gcc does not do: the register becomes part of the instruction the allocator sees, so a
4906 /// write of one is a definition it knows about and will not leave anything of the program's
4907 /// across, and a read of one is a use it will not have put something else in first. gcc copies
4908 /// the text out and a register two things believe they own is a wrong program nothing reports.
4909 /// Here the allocator is told, and a program that also named the register in its clobber list
4910 /// says the same thing twice rather than something new.
4911 fn itself(
4912 &mut self,
4913 inst: Inst,
4914 desc: OperandDesc,
4915 reg: PhysReg,
4916 ) -> Result<mir::Operand, Unsupported> {
4917 let refused = Unsupported::Assembly { inst, refused: Written::Operand };
4918 if desc.class != self.gpr {
4919 return Err(refused);
4920 }
4921 Ok(mir::Operand {
4922 reg: mir::Reg::physical(reg),
4923 class: self.gpr,
4924 role: desc.role,
4925 constraint: Constraint::Fixed(reg),
4926 })
4927 }
4928
4929 /// A register an instruction of a template uses and the statement put nothing in.
4930 ///
4931 /// A write of one is the register being destroyed, which is what a clobber list is usually
4932 /// written to say and what an instruction with more answers than the program asked for does
4933 /// anyway: `cpuid` writes all four registers whether or not the statement wanted all four. A
4934 /// register of its own is the whole of what that needs, since a value nothing reads is one the
4935 /// allocator may put anywhere and is told about so that nothing else is put there.
4936 ///
4937 /// A read of one is a register the instruction looks at and the program never filled, which
4938 /// gcc leaves as whatever happened to be there. A zero is written instead, for the reason
4939 /// [`Self::undefined`] gives: the allocator has to be given a definition before a use, and a
4940 /// zero is the one answer that reads the same on every run.
4941 fn spare(&mut self, inst: Inst, desc: OperandDesc) -> Result<mir::Operand, Unsupported> {
4942 let refused = Unsupported::Assembly { inst, refused: Written::Operand };
4943 if desc.class != self.gpr {
4944 return Err(refused);
4945 }
4946 let reg = self.out.new_vreg(desc.class);
4947 if !desc.role.is_def() {
4948 let block = self.at.expect("a block is being filled");
4949 let span = self.source.span(inst);
4950 let put = self.named("mov_ri_64");
4951 self.out.build(block, put).at(span).def(reg, desc.class).imm(0).finish();
4952 }
4953 Ok(mir::Operand { reg, class: desc.class, role: desc.role, constraint: desc.constraint })
4954 }
4955
4956 /// The address one instruction of a template reads or writes.
4957 fn addressed(
4958 &mut self,
4959 inst: Inst,
4960 at: x86_64::At,
4961 places: &[Place],
4962 list: &[AsmOperand<'_>],
4963 ) -> Result<mir::Mem, Unsupported> {
4964 let refused = || Unsupported::Assembly { inst, refused: Written::Operand };
4965 let base = match at.base {
4966 None => None,
4967 Some(x86_64::Piece::Operand { index, .. }) => {
4968 // The register an address is counted from is read and never written, whatever the
4969 // instruction does to what it finds there.
4970 let reg = places.get(index).and_then(|place| place.read).ok_or_else(refused)?;
4971 Some(mir::Operand::read(reg, self.gpr))
4972 }
4973 // A register the template named, counted from as itself. See [`Self::itself`], and note
4974 // that this is the half of it every one of these templates needs: `movq %rax, 16(%rdi)`
4975 // names one register as the thing being stored and another as where to store it. An
4976 // operand a constraint letter put in that register is that operand, for the reason
4977 // [`Self::placed`] gives.
4978 Some(x86_64::Piece::Reg { reg, .. }) => match bound(list, reg, Role::Use) {
4979 Some(index) => {
4980 let reg = places.get(index).and_then(|place| place.read).ok_or_else(refused)?;
4981 Some(mir::Operand::read(reg, self.gpr))
4982 }
4983 None => Some(
4984 mir::Operand::read(mir::Reg::physical(reg), self.gpr)
4985 .with(Constraint::Fixed(reg)),
4986 ),
4987 },
4988 // An address counted from a register the instruction reaches without being told is
4989 // not something this machine has: every addressing mode is written out in the text it
4990 // is part of, so a base that got here another way is a base nothing wrote down.
4991 Some(x86_64::Piece::Implicit { .. }) => return Err(refused()),
4992 };
4993 // A distance the template wrote, or the one in an operand the template pointed at, which is
4994 // the same distance said by something that knows how big a thing is. It has to be a number
4995 // the compiler can read at translation time, since it goes in the instruction rather than
4996 // in a register, and an operand holding anything else is refused rather than put somewhere.
4997 let disp = match at.disp {
4998 x86_64::Disp::Number(disp) => disp,
4999 x86_64::Disp::Operand(index) => {
5000 let value =
5001 list.get(index).and_then(|operand| operand.value).ok_or_else(refused)?;
5002 let number = self.number(value).ok_or_else(refused)?;
5003 i32::try_from(number).map_err(|_| refused())?
5004 }
5005 };
5006 Ok(mir::Mem { base, scale: 1, disp, segment: at.segment, ..mir::Mem::default() })
5007 }
5008
5009 /// The number in that value, for one an `iconst` defined, read at the width of its own type.
5010 ///
5011 /// Signed, because the two things a template asks this for are a distance into an address and
5012 /// the number on an instruction, and both of those are signed wherever they land. A constant
5013 /// whose type is unsigned and whose top bit is set therefore reads as a negative number here,
5014 /// which is the same number and is the reading that fits in the thirty two bits an addressing
5015 /// mode has room for.
5016 fn number(&self, value: Value) -> Option<i128> {
5017 let Def::Result { inst, .. } = self.source[value].def else { return None };
5018 if self.source[inst].opcode != Opcode::IConst {
5019 return None;
5020 }
5021 let Extra::Imm(imm) = self.source[inst].extra else { return None };
5022 let bits = self.source[imm].bits();
5023 let width = self.source[value].ty.bits();
5024 if width == 0 || width > 128 {
5025 return None;
5026 }
5027 let spare = 128 - width;
5028 Some(((bits << spare) as i128) >> spare)
5029 }
5030
5031 /// A register holding a value the program has no claim on, written as a zero.
5032 ///
5033 /// Every other way of saying it costs the same instruction or needs a word the machine IR does
5034 /// not have, and a zero is the one that reads the same on every run.
5035 fn undefined(&mut self, inst: Inst, result: Value) -> Result<(), Unsupported> {
5036 let ty = self.source[result].ty;
5037 let refused = Unsupported::Assembly { inst, refused: Written::Operand };
5038 let bits = held_bits(ty);
5039 if self.class_of(ty) != self.gpr || !matches!(bits, 8 | 16 | 32 | 64) {
5040 return Err(refused);
5041 }
5042 let block = self.at.expect("a block is being filled");
5043 let span = self.source.span(inst);
5044 let reg = self.new_reg(result);
5045 let put = self.named(&format!("mov_ri_{bits}"));
5046 self.out.build(block, put).at(span).def(reg, self.gpr).imm(0).finish();
5047 Ok(())
5048 }
5049
5050 /// Whether a type is the width an address is, which is what makes a cast to or from one free.
5051 fn is_address_width(&self, ty: Type) -> bool {
5052 ty.is_ptr() || (ty.is_int() && ty.bits() == ADDRESS_BITS)
5053 }
5054
5055 /// Where a block goes, which in machine IR is on the block rather than on its terminator.
5056 ///
5057 /// That is why no rule ever names a block: a branch is selected for what it reads and the
5058 /// edges are copied across here, arguments and all. The arguments are read last, after every
5059 /// instruction of the block is written, because an argument that is a constant is
5060 /// materialized where it is first wanted and the end of the block is where an edge wants it.
5061 ///
5062 /// Which is not quite the end. A block that leaves two ways has the branch as its last
5063 /// instruction, and a block that leaves through a register has the indirect jump as its last,
5064 /// and anything appended after either is something it has already jumped past, so a constant
5065 /// materialized here would be a register the block below reads and nothing ever writes. The
5066 /// one that was there is put back on the end when that happened, which is the only reordering
5067 /// anything in this crate does and is why it is remembered before a single argument is read.
5068 fn edges(&mut self, block: Block, out: mir::Block) -> Result<(), Unsupported> {
5069 let Some(term) = self.source.terminator(block) else { return Ok(()) };
5070 let leaves =
5071 matches!(self.source[term].opcode, Opcode::BrIf | Opcode::IndirectBr | Opcode::Switch);
5072 let branch = if leaves { self.out.terminator(out) } else { None };
5073
5074 let calls: Vec<rucc_ir::BlockCall> = self.source.successors(term).collect();
5075 let mut succs = Vec::with_capacity(calls.len());
5076 for call in calls {
5077 let args: Vec<Value> = self.source[call.args].to_vec();
5078 let mut regs = Vec::with_capacity(args.len());
5079 for value in args {
5080 // The address of where the value is rather than the value, for the one type a
5081 // register holds none of. The block on the other side copies the bytes out of it
5082 // into a slot of its own, which is what makes a second edge into the same block
5083 // safe.
5084 let reg = if on_x87(self.source[value].ty) {
5085 self.x87_slot(value)
5086 } else {
5087 self.reg_of(value)?
5088 };
5089 regs.push(reg);
5090 }
5091 succs.push(mir::BlockCall::with(self.out_block(call.block), regs));
5092 }
5093 if let Some(branch) = branch {
5094 if self.out.terminator(out) != Some(branch) {
5095 self.out.remove_inst(branch);
5096 self.out.append_inst(out, branch);
5097 }
5098 }
5099 *self.out.succs_mut(out) = succs;
5100 Ok(())
5101 }
5102
5103 /// The machine IR block an IR block became.
5104 fn out_block(&self, block: Block) -> mir::Block {
5105 self.blocks[block.index()].expect("every block was created before any was filled")
5106 }
5107
5108 /// The parameters of the entry block, which are the function's arguments.
5109 ///
5110 /// They are not block parameters in the machine IR and they cannot be. A block parameter is
5111 /// given its value by a move on the edge into the block, and there is no edge into an entry
5112 /// block, so what arrives in a function is the convention's to say. [`crate::abi`] is what
5113 /// says it.
5114 ///
5115 /// The ones past the last register arrived in the caller's memory and are read out of it, and
5116 /// the loads that read them come back here so that the frame can finish them the way it
5117 /// finishes an `alloca`.
5118 fn arrive(&mut self, block: Block, out: mir::Block) -> Result<(), Unsupported> {
5119 let params = self.source[block].params.clone();
5120 // The type of each is the block's answer and what the ABI asks of it is the signature's,
5121 // and the two lists are the same list: a parameter the classification turned into a
5122 // pointer is a pointer in the block too. A block with more parameters than the signature
5123 // names is not one the front end writes, and each of those is taken as a plain value.
5124 let asked: Vec<Abi> = self.source.signature().params.iter().map(|it| it.abi).collect();
5125 let types: Vec<Param> = params
5126 .iter()
5127 .enumerate()
5128 .map(|(index, &value)| {
5129 let abi = asked.get(index).copied().unwrap_or_default();
5130 Param { ty: self.source[value].ty, abi }
5131 })
5132 .collect();
5133 // A save area for a function that takes arguments its signature does not name, which is a
5134 // block of this function's frame on one convention and the shadow space the caller already
5135 // reserved on the other. Which of the two it is is [`varargs::Area::of`]'s answer and
5136 // [`Self::save_area`] is where the difference is spent.
5137 //
5138 // Apple's AArch64 is neither. Every argument a signature does not name is in the caller's
5139 // memory, so there is nothing to save and the list starts at the first word past the named
5140 // ones.
5141 let variadic = self.source.signature().variadic;
5142 let in_memory = self.conv.abi.variadic == Variadic::AlwaysMemory;
5143 let area = (variadic && !in_memory).then(|| varargs::Area::of(self.conv));
5144 let arrived =
5145 abi::entry(&mut self.out, out, &types, self.conv, self.selector.abi, self.names, area)
5146 .map_err(|(index, missing)| Unsupported::Argument { index, missing })?;
5147 for (¶m, reg) in params.iter().zip(&arrived.regs) {
5148 self.regs[param.index()] = Some(*reg);
5149 }
5150 if let Some(area) = area {
5151 self.save_area(out, &arrived, area);
5152 } else if variadic {
5153 let incoming = arrived.beyond.next_multiple_of(self.conv.word);
5154 self.varargs = Some(Varargs::Pointer { incoming });
5155 }
5156 self.stack.arguments.extend(arrived.stack);
5157 Ok(())
5158 }
5159
5160 /// The prologue of a variadic function, which is every argument register it was handed written
5161 /// into the frame.
5162 ///
5163 /// Every one the signature did not name, that is. Which of those hold anything is a thing only
5164 /// the caller knew and there is nothing here to ask, so all of them are written, and the ones a
5165 /// named parameter took are not, because `va_start` sets the two offsets past them and nothing
5166 /// ever reads their slots.
5167 ///
5168 /// What that costs is up to fourteen stores in the prologue of a function that may read none of
5169 /// them, and the convention's answer to that is the count of vector registers in `%al`, which
5170 /// lets a callee skip the eight vector stores when the call passed no floats. Skipping them is a
5171 /// branch in a prologue, and a prologue is written long after this by [`crate::finish`], which
5172 /// has no blocks to branch between. So they are all written every time, which is correct and is
5173 /// what `-O0` costs. Issue #323 is the branch.
5174 ///
5175 /// A vector register is written all sixteen bytes at a time, because a `_Float128` fills one and
5176 /// a `va_arg` of a quad reads the slot back whole. gcc writes the same sixteen with the same
5177 /// instruction, which is what [`crate::varargs`] says a list has to be built out of.
5178 ///
5179 /// The address is computed once into a register rather than written as a displacement off the
5180 /// stack pointer, because a displacement into a frame is not known until after allocation and
5181 /// one `lea` costs less than a fixup list for a dozen stores. It is the same `lea` an `alloca`
5182 /// gets and [`crate::finish`] fills it in the same way.
5183 ///
5184 /// A convention that homes its register arguments has none of that. Its area is the shadow
5185 /// space the caller reserved above the return address, so there is no object to make and no
5186 /// address to work out: each store reaches into the caller's argument area the way the load of
5187 /// a parameter the registers ran out before does, which is the same waiting list and the same
5188 /// fixup. There are at most four of them and none is a vector register, since a float the
5189 /// signature does not name arrived in a general purpose register too and that is the copy the
5190 /// walk reads.
5191 fn save_area(&mut self, out: mir::Block, arrived: &abi::Arrived, area: varargs::Area) {
5192 if self.conv.shared_positions {
5193 self.varargs = Some(Varargs::Pointer { incoming: arrived.beyond });
5194 let store = self.named("mov_mr_64");
5195 for &(reg, class, at) in &arrived.spare {
5196 let sp = mir::Operand::read(mir::Reg::physical(self.conv.stack_pointer), self.gpr);
5197 let made =
5198 self.out.build(out, store).uses(reg, class).mem(mir::Mem::at(sp)).finish();
5199 self.stack.arguments.push((made, at));
5200 }
5201 return;
5202 }
5203
5204 let save = self.stack.locals.len();
5205 self.stack.locals.push(Local { size: area.size, align: varargs::VECTOR_SLOT });
5206 let took = |count: usize, float: bool| {
5207 let count = u32::try_from(count).unwrap_or(0).min(area.holds(float));
5208 area.starts_at(float) + count * area.stride(float)
5209 };
5210 let integers = took(arrived.took.0, false);
5211 let floats = took(arrived.took.1, true);
5212 self.varargs = Some(if self.conv.list == VaList::Aapcs {
5213 // Minus what is left of each half, since the two offsets count up to its top.
5214 let left = |at: u32, float: bool| {
5215 i32::try_from(at).unwrap_or(0) - i32::try_from(area.ends_at(float)).unwrap_or(0)
5216 };
5217 Varargs::Aapcs {
5218 save,
5219 incoming: arrived.beyond,
5220 integers_end: area.ends_at(false),
5221 floats_end: area.ends_at(true),
5222 integers: left(integers, false),
5223 floats: left(floats, true),
5224 }
5225 } else {
5226 Varargs::Fields { save, incoming: arrived.beyond, integers, floats }
5227 });
5228
5229 // A vector register is saved all sixteen bytes wide, as a quad is, whatever it held.
5230 let base = self.frame_address(out, save);
5231 for &(reg, class, at) in &arrived.spare {
5232 let ty =
5233 if class == self.gpr { Type::int(64) } else { Type::float(rucc_ir::Float::F128) };
5234 let head = (self.selector.abi.store)(ty).expect("a store of a whole register");
5235 let store = mir::Opcode::new(self.names.intern(head));
5236 let up = i32::try_from(at).expect("a register save area under two gigabytes");
5237 let mem = mir::Mem::at(mir::Operand::read(base, self.gpr)).plus(up);
5238 self.out.build(out, store).uses(reg, class).mem(mem).finish();
5239 }
5240 }
5241
5242 /// The address of one of the function's stack objects, in a fresh register.
5243 ///
5244 /// Written with nothing in its displacement, because where an object is in a frame is not known
5245 /// until after allocation, and given to [`crate::finish`] to fill in the way an `alloca` is.
5246 fn frame_address(&mut self, out: mir::Block, local: usize) -> mir::Reg {
5247 self.frame_address_plus(out, local, 0)
5248 }
5249
5250 /// The address some way into a local, which the frame finishes the same way, adding where the
5251 /// local is to what is already there.
5252 fn frame_address_plus(&mut self, out: mir::Block, local: usize, plus: u32) -> mir::Reg {
5253 let reg = self.out.new_vreg(self.gpr);
5254 let lea = self.named(self.selector.frame.lea);
5255 let sp = mir::Operand::read(mir::Reg::physical(self.conv.stack_pointer), self.gpr);
5256 let plus = i32::try_from(plus).expect("an offset into a local under two gigabytes");
5257 let mem = mir::Mem::at(sp).plus(plus);
5258 let made = self.out.build(out, lea).def(reg, self.gpr).mem(mem).finish();
5259 self.stack.addresses.push((made, local));
5260 reg
5261 }
5262
5263 /// Whether an instruction is one no machine instruction is written for where it stands.
5264 ///
5265 /// Four of them, and none is a lowering decision, which is why none is a rule. A constant is
5266 /// written where a register for it is first wanted rather than where the IR put it, and every
5267 /// reader of one may have folded it into an immediate, in which case nowhere is the right
5268 /// place. A return of nothing has nothing to put anywhere: the epilogue gives the frame back
5269 /// and leaves, and it is appended to every block with no successors long after this has
5270 /// finished, so a return with a value is one instruction here and a return without one is
5271 /// none. Unless the value went back through memory, in which case there is something to put
5272 /// somewhere after all and the IR does not carry it: the address the caller handed over has
5273 /// to be in `rax` on the way out, and [`Lowering::returned`] is what writes that.
5274 ///
5275 /// An unconditional jump is the third, and there is even less of it: the edge is on the
5276 /// block, and whether the block it goes to is the next one and needs no jump at all is the
5277 /// block layout's answer rather than this one's.
5278 ///
5279 /// The fourth is a point control does not arrive at, in both of the forms the IR has for it:
5280 /// the `unreachable` terminator the front end puts at the end of a function whose body can run
5281 /// off the bottom, and the `unreachable_hint` a call to `__builtin_unreachable` becomes. What
5282 /// to write for a place nothing reaches is a question with no wrong answer, and nothing is the
5283 /// smallest one and the one gcc 16.2.0 gives at `-O0`. The terminator leaves the block with no
5284 /// successors, so the epilogue lands at the end of it the way it does on any other block that
5285 /// goes nowhere, and the function cannot fall out of its own last instruction into whatever
5286 /// the assembler puts next.
5287 fn writes_nothing(&self, inst: Inst) -> bool {
5288 let data = &self.source[inst];
5289 match data.opcode {
5290 Opcode::IConst | Opcode::Jump | Opcode::Unreachable | Opcode::UnreachableHint => true,
5291 Opcode::Return => self.source[data.args].is_empty() && self.sret().is_none(),
5292 _ => false,
5293 }
5294 }
5295
5296 /// What every instruction in one block matched, with a set of values nobody may take.
5297 ///
5298 /// Backwards, because an instruction that has been folded into a later one does not get to
5299 /// fold anything into itself: the rule that took it only reached one level down, so what is
5300 /// under it is not in the term the matcher saw and cannot be replaced.
5301 fn decide(&self, insts: &[Inst], refused: &HashSet<Value>) -> Decided {
5302 let mut found: Vec<Option<Match<Term>>> = (0..insts.len()).map(|_| None).collect();
5303 let mut plans: Vec<Option<Plan>> = vec![None; insts.len()];
5304 let mut folded: Vec<Inst> = Vec::new();
5305 for (index, &inst) in insts.iter().enumerate().rev() {
5306 if folded.contains(&inst) {
5307 continue;
5308 }
5309 if let Some((plan, matched)) = self.select(inst, refused) {
5310 folded.extend(self.folds(inst, plan));
5311 found[index] = Some(matched);
5312 plans[index] = Some(plan);
5313 }
5314 }
5315 Decided { found, plans, folded }
5316 }
5317
5318 /// A value some of its readers took and some of them did not, which is the one case folding
5319 /// buys nothing.
5320 ///
5321 /// Folding does not delete the instruction that computed a value for anybody else, so a
5322 /// reader that did not take it still needs it in a register and the instruction stays. The
5323 /// reader that did take it now does that work again. Either all of them take it, in which
5324 /// case nothing is left to read it and the instruction goes, or none of them do.
5325 ///
5326 /// The count is over the whole function rather than over the block, since a value read from
5327 /// another block is read from a register there whatever this block decides. An instruction
5328 /// built by name rather than matched, a call being the one that matters, has no plan and so
5329 /// takes nothing, which is the right answer for it as well.
5330 fn left_alive(&self, insts: &[Inst], plans: &[Option<Plan>]) -> Option<Value> {
5331 let mut taken = vec![0u32; self.uses.len()];
5332 for (&inst, plan) in insts.iter().zip(plans) {
5333 let Some(plan) = plan else { continue };
5334 let args = &self.source[self.source[inst].args];
5335 for (index, &arg) in args.iter().take(MAX_ARGS).enumerate() {
5336 if plan[index] == Shown::Expand {
5337 taken[arg.index()] += 1;
5338 }
5339 }
5340 }
5341 for (&inst, plan) in insts.iter().zip(plans) {
5342 let Some(plan) = plan else { continue };
5343 let args = &self.source[self.source[inst].args];
5344 for (index, &arg) in args.iter().take(MAX_ARGS).enumerate() {
5345 if plan[index] == Shown::Expand && taken[arg.index()] < self.uses[arg.index()] {
5346 return Some(arg);
5347 }
5348 }
5349 }
5350 None
5351 }
5352
5353 /// The rule that fires on an instruction, and what it bound.
5354 ///
5355 /// The plans are tried in order and the first that matches wins, which is the maximal munch
5356 /// `spec/10-backend.md` asks for: a plan that offers more to the matcher is tried before one
5357 /// that offers less.
5358 fn select(&self, inst: Inst, refused: &HashSet<Value>) -> Option<(Plan, Match<Term>)> {
5359 for plan in self.plans(inst, refused) {
5360 let terms = Terms::new(self.source, inst, plan);
5361 if let Some(matched) = self.selector.table.find(&terms, Term::Root) {
5362 return Some((plan, matched));
5363 }
5364 }
5365 None
5366 }
5367
5368 /// Every way this instruction can be shown to the matcher, most offered first.
5369 fn plans(&self, inst: Inst, refused: &HashSet<Value>) -> Vec<Plan> {
5370 let args = &self.source[self.source[inst].args];
5371 let mut plans = vec![PLAIN];
5372 for (index, &arg) in args.iter().enumerate().take(MAX_ARGS) {
5373 let mut ways = Vec::new();
5374 if self.foldable(inst, arg, refused) {
5375 ways.push(Shown::Expand);
5376 }
5377 if Terms::new(self.source, inst, PLAIN).constant(arg).is_some() {
5378 ways.push(Shown::Const);
5379 }
5380 ways.push(Shown::Reg);
5381 plans = plans
5382 .into_iter()
5383 .flat_map(|plan| {
5384 ways.iter().map(move |&way| {
5385 let mut next = plan;
5386 next[index] = way;
5387 next
5388 })
5389 })
5390 .collect();
5391 }
5392 plans
5393 }
5394
5395 /// Whether an operand may be shown as the instruction that computed it.
5396 ///
5397 /// It has to be in the same block, because a rule that folds one instruction into another
5398 /// moves the work to where the second one is. It has to be something rather than a block
5399 /// parameter, and not a constant, which is shown as a constant instead. And it has to be a
5400 /// value [`Lowering::left_alive`] has not put back, which is how the one reader at a time
5401 /// question is asked here: this says yes to a value with any number of readers, and a value
5402 /// only some of them could take is refused after the fact and asked again.
5403 ///
5404 /// A value with several readers used to be refused outright, on the reasoning that folding
5405 /// does not delete the instruction for anybody else. That reasoning is about the set of
5406 /// readers and was being applied to one reader at a time, which is stricter than it needs to
5407 /// be: when every reader takes it there is nobody left to read it and the instruction goes.
5408 /// An address a store and a load share is the shape that matters, since a memory operand has
5409 /// room for the whole of it and both readers have a memory operand.
5410 fn foldable(&self, into: Inst, value: Value, refused: &HashSet<Value>) -> bool {
5411 let Def::Result { inst, .. } = self.source[value].def else { return false };
5412 if self.source[inst].opcode == Opcode::IConst || refused.contains(&value) {
5413 return false;
5414 }
5415 self.source.block_of(inst).is_some()
5416 && self.source.block_of(inst) == self.source.block_of(into)
5417 }
5418
5419 /// The instructions a match folded into the one it matched.
5420 ///
5421 /// The plan is what says this, not the bindings: a binding is a register or a number either
5422 /// way, and an operand shown as the instruction that computed it is one no rule could have
5423 /// matched without taking that instruction, because the plan offered the matcher nothing
5424 /// else to call it.
5425 fn folds(&self, inst: Inst, plan: Plan) -> Vec<Inst> {
5426 let args = &self.source[self.source[inst].args];
5427 args.iter()
5428 .take(MAX_ARGS)
5429 .enumerate()
5430 .filter(|&(index, _)| plan[index] == Shown::Expand)
5431 .filter_map(|(_, &arg)| match self.source[arg].def {
5432 Def::Result { inst, .. } => Some(inst),
5433 Def::Param { .. } => None,
5434 })
5435 .collect()
5436 }
5437
5438 /// What the IR instruction said about itself that the machine instruction has to keep saying.
5439 ///
5440 /// One flag today. `volatile` says the access happens exactly once and is never moved or
5441 /// merged, and nothing below here can work that out again: a `volatile` load and an ordinary
5442 /// one are the same instruction over the same address, so a pass that puts two accesses
5443 /// together would put these together too. Carried rather than checked here, because the pass
5444 /// that has to refuse is a long way down and this is the last place the answer is known.
5445 ///
5446 /// The instructions this compiler writes for itself get nothing, which is the right answer
5447 /// for all of them: a prologue, a spill and the moves around a call were asked for by the
5448 /// machine rather than by the program.
5449 ///
5450 /// Every access the flag is legal on carries it: the loads and the stores a rule matched,
5451 /// the two ends of a `long double` copy that are the program's own memory, and the compare
5452 /// and exchange and the read modify write. An `asm` statement does not, and it is the one
5453 /// exception on purpose. What the flag says there is that the statement stays even when
5454 /// nothing reads what it wrote, which is a different sentence about a different thing, and
5455 /// every `asm` is already fixed where it stands whether the word was written or not.
5456 fn carried(&self, inst: Inst) -> mir::Flags {
5457 if self.source[inst].flags.contains(Flags::VOLATILE) {
5458 mir::Flags::VOLATILE
5459 } else {
5460 mir::Flags::NONE
5461 }
5462 }
5463
5464 /// Build the machine instructions a match calls for.
5465 fn emit(&mut self, inst: Inst, matched: &Match<Term>) -> Result<(), Unsupported> {
5466 let rule: &Rule = self.selector.table.rule(matched);
5467 self.build(inst, rule.replacement, 0, &matched.bindings, true).map(|_| ())
5468 }
5469
5470 /// Build the machine term that starts at `at`, and give back the position after it and the
5471 /// register it wrote, if it wrote one.
5472 ///
5473 /// The outermost term computes what the IR instruction does, so what it writes is the
5474 /// register of the instruction's result. A term inside another is a step on the way and
5475 /// writes a register of its own, which the term around it then reads. Its operands are read
5476 /// before it is built and it is built before the term around it, so the instructions come
5477 /// out in the order the values are needed.
5478 fn build(
5479 &mut self,
5480 inst: Inst,
5481 pieces: &'static [Piece],
5482 at: usize,
5483 bindings: &[Term],
5484 outermost: bool,
5485 ) -> Result<(usize, Option<mir::Reg>), Unsupported> {
5486 let Some(Piece::App { head, arity }) = pieces.get(at) else {
5487 return Err(self.unsupported(inst));
5488 };
5489 let opcode =
5490 head.strip_prefix(self.selector.prefix()).ok_or_else(|| self.unsupported(inst))?;
5491 let descs = self.selector.operands(opcode).ok_or_else(|| self.unsupported(inst))?;
5492
5493 let mut read = Read::default();
5494 let mut at = at + 1;
5495 for _ in 0..*arity {
5496 at = self.read(inst, pieces, at, bindings, &mut read)?;
5497 }
5498
5499 let writes = descs.iter().take_while(|desc| desc.role.is_def()).count();
5500 if descs.len() - writes != read.regs.len() {
5501 return Err(self.unsupported(inst));
5502 }
5503
5504 // The first thing the instruction writes is what it computes, and any others are
5505 // registers the machine destroys on the way, which are fresh because nothing else is in
5506 // them and nothing reads them. An instruction that writes nothing at all is one whose
5507 // whole purpose is its effect, which is what a store is, and there is no result to put
5508 // anywhere.
5509 let mut regs = Vec::new();
5510 if writes > 0 {
5511 // A term inside another computes a step rather than the result, into a register only
5512 // the term around it reads.
5513 let first = match outermost {
5514 true => {
5515 let result =
5516 self.source[inst].first_result.ok_or_else(|| self.unsupported(inst))?;
5517 self.new_reg(result)
5518 }
5519 false => self.out.new_vreg(descs[0].class),
5520 };
5521 regs.push(first);
5522 // The rest are the registers the machine destroys on the way, and the class each is in
5523 // is the one the instruction's description gives it rather than a guess, so that an
5524 // instruction that wrecks a register in the other file says so.
5525 regs.extend(descs[1..writes].iter().map(|desc| self.out.new_vreg(desc.class)));
5526 } else if !outermost || self.source[inst].first_result.is_some() {
5527 // A rule that throws away a value the IR gave a name to would leave every reader of
5528 // that name with nothing to read, so it is a rule this and the target disagree about.
5529 // So is a term inside another that writes nothing for the one around it to read.
5530 return Err(self.unsupported(inst));
5531 }
5532 let written = regs.first().copied();
5533 regs.extend(read.regs.iter().copied());
5534
5535 let block = self.at.expect("a block is being filled");
5536 let opcode = mir::Opcode::new(self.names.intern(head));
5537 let (span, flags) = (self.source.span(inst), self.carried(inst));
5538 let mut build = self.out.build(block, opcode).at(span).flags(flags);
5539 for (desc, reg) in descs.iter().zip(regs) {
5540 let operand = mir::Operand {
5541 reg,
5542 class: desc.class,
5543 role: desc.role,
5544 constraint: desc.constraint,
5545 };
5546 build = build.operand(operand);
5547 }
5548 if let Some(mem) = read.mem {
5549 build = build.mem(mem);
5550 }
5551 if let Some(imm) = read.imm {
5552 build = build.imm(imm);
5553 }
5554 build.finish();
5555 Ok((at, written))
5556 }
5557
5558 /// Read one argument of a replacement, which is a register, a number, an address or another
5559 /// machine term.
5560 ///
5561 /// Gives back the position after it, because a replacement is flat and an address or a term
5562 /// takes arguments of its own. A machine term is built on the spot, and what is read is the
5563 /// register it wrote.
5564 fn read(
5565 &mut self,
5566 inst: Inst,
5567 pieces: &'static [Piece],
5568 at: usize,
5569 bindings: &[Term],
5570 out: &mut Read,
5571 ) -> Result<usize, Unsupported> {
5572 match pieces.get(at) {
5573 Some(Piece::Int(value)) => {
5574 out.imm = i64::try_from(*value).ok();
5575 Ok(at + 1)
5576 }
5577 // A number the rule worked out of the ones it matched rather than one it wrote down,
5578 // which is an immediate once it has been worked out and is read here as one. It gives
5579 // nothing back when a binding it reads is a register, and a replacement that cannot be
5580 // built is a rule this file and the matcher disagree about, which is what `unsupported`
5581 // is for.
5582 Some(Piece::Computed { work, .. }) => {
5583 let matched: Vec<Option<i128>> = bindings
5584 .iter()
5585 .map(|term| match *term {
5586 Term::Num(value) => Some(value),
5587 _ => None,
5588 })
5589 .collect();
5590 let number = work(&matched).ok_or_else(|| self.unsupported(inst))?;
5591 out.imm = i64::try_from(number).ok();
5592 Ok(at + 1)
5593 }
5594 Some(Piece::Var { index, .. }) => {
5595 match bindings.get(*index) {
5596 Some(&Term::Reg(value)) => {
5597 let reg = self.reg_of(value)?;
5598 out.regs.push(reg);
5599 }
5600 Some(&Term::Num(value)) => out.imm = i64::try_from(value).ok(),
5601 // A pattern binds a register or a number and nothing else, so this is a
5602 // rule the matcher and this file disagree about.
5603 _ => return Err(self.unsupported(inst)),
5604 }
5605 Ok(at + 1)
5606 }
5607 Some(Piece::App { head, .. }) if (self.selector.address)(head).is_none() => {
5608 let (next, reg) = self.build(inst, pieces, at, bindings, false)?;
5609 out.regs.push(reg.ok_or_else(|| self.unsupported(inst))?);
5610 Ok(next)
5611 }
5612 Some(Piece::App { head, arity }) => {
5613 let kind = (self.selector.address)(head).ok_or_else(|| self.unsupported(inst))?;
5614 let mut inner = Read::default();
5615 let mut next = at + 1;
5616 for _ in 0..*arity {
5617 next = self.read(inst, pieces, next, bindings, &mut inner)?;
5618 }
5619 let mem = address(kind, &inner, self.gpr).ok_or_else(|| self.unsupported(inst))?;
5620 out.mem = Some(mem);
5621 Ok(next)
5622 }
5623 None => Err(self.unsupported(inst)),
5624 }
5625 }
5626
5627 /// The register a value is in, materializing it if it is a constant that has not been put in
5628 /// one yet.
5629 ///
5630 /// A constant is written where it is wanted rather than where the IR defined it, and where it
5631 /// is wanted is a block that need not be the one the IR defined it in. So the register holding
5632 /// one is only good inside the block it was written into, and a second block that wants the
5633 /// same constant gets its own. Anything else is a register read where nothing wrote it: the
5634 /// IR guarantees a definition dominates its uses, and this moved the definition.
5635 ///
5636 /// Writing the number again is also the right answer and not merely the safe one. It is one
5637 /// instruction that reads nothing, which is cheaper than holding a register live across a
5638 /// branch for it, and it is what a rematerializing allocator would do with the value anyway.
5639 fn reg_of(&mut self, value: Value) -> Result<mir::Reg, Unsupported> {
5640 let constant = match self.source[value].def {
5641 Def::Result { inst, .. } => {
5642 (self.source[inst].opcode == Opcode::IConst).then_some(inst)
5643 }
5644 Def::Param { .. } => None,
5645 };
5646 let here = self.at.expect("a block is being filled");
5647 if let Some(reg) = self.regs[value.index()] {
5648 if constant.is_none() || self.written[value.index()] == Some(here) {
5649 return Ok(reg);
5650 }
5651 }
5652 if let Some(inst) = constant {
5653 // Cleared so that the register the constant is written into is a new one rather than
5654 // the one the block above wrote, which is still being read up there.
5655 self.regs[value.index()] = None;
5656 // Nothing is refused here. A constant is written on its own, out of the loop over the
5657 // block, and the operands of the rule that writes one are the number and nothing else.
5658 let matched = self
5659 .select(inst, &HashSet::new())
5660 .map(|(_, matched)| matched)
5661 .ok_or_else(|| self.unsupported(inst))?;
5662 self.emit(inst, &matched)?;
5663 // The same mark the loop over the instructions makes, and it has to be made here as
5664 // well because this is the only place a constant is ever selected: the loop skips one
5665 // where the IR wrote it, so a rule that lowers a constant fires from nowhere else and
5666 // would be reported as a rule nothing reaches.
5667 self.fired.mark(matched.rule);
5668 self.written[value.index()] = Some(here);
5669 return Ok(self.regs[value.index()].expect("a constant is written into a register"));
5670 }
5671 Ok(self.new_reg(value))
5672 }
5673
5674 /// Which register file a value of that type lives in.
5675 ///
5676 /// The vector one for the two float widths the machine has scalar instructions for and for the
5677 /// one it only moves, and the general purpose one for everything else. An eighty bit `long
5678 /// double` is in neither, and it is here rather than in the vector class on purpose: it would
5679 /// be put in a register that cannot hold it, and there is no rule that names one, so the
5680 /// instruction computing it is reported. The wrong class would make that a wrong program
5681 /// instead of a refused one.
5682 ///
5683 /// A hundred and twenty eight bit float is in the vector class and fits it exactly, which is
5684 /// the difference. Nothing computes in it, so every arithmetic on one is still reported, and
5685 /// what the class buys is the moves: a register that holds the whole value is a register a
5686 /// spill, a reload and a copy are each one instruction for.
5687 fn class_of(&self, ty: Type) -> RegClass {
5688 if crate::term::in_vector_file(ty) { self.conv.sse_class } else { self.gpr }
5689 }
5690
5691 /// A fresh register for a value, which is what the instruction computing it writes.
5692 ///
5693 /// Any declaration the value is a value of comes with it. Here rather than once at the end over
5694 /// the whole map, because a constant is written again in every block that wants one and the map
5695 /// only remembers the last of those registers, and a local held in a constant is a local that
5696 /// would otherwise be findable in one block of the function and nowhere else.
5697 fn new_reg(&mut self, value: Value) -> mir::Reg {
5698 if let Some(reg) = self.regs[value.index()] {
5699 return reg;
5700 }
5701 let reg = self.out.new_vreg(self.class_of(self.source[value].ty));
5702 self.regs[value.index()] = Some(reg);
5703 let source = self.source;
5704 for decl in source.value_decls(value) {
5705 self.out.named.push((decl, reg));
5706 }
5707 reg
5708 }
5709
5710 fn unsupported(&self, inst: Inst) -> Unsupported {
5711 let data = &self.source[inst];
5712 Unsupported::Inst {
5713 inst,
5714 term: Terms::new(self.source, inst, PLAIN).name(inst),
5715 opcode: data.opcode,
5716 ty: data.first_result.map(|result| self.source[result].ty),
5717 }
5718 }
5719}
5720
5721/// What the arguments of one replacement came to.
5722#[derive(Debug, Default)]
5723struct Read {
5724 regs: Vec<mir::Reg>,
5725 imm: Option<i64>,
5726 mem: Option<mir::Mem>,
5727}
5728
5729/// The addressing mode an address constructor's arguments make.
5730///
5731/// One arm per constructor rather than a question asked of the kind, because what the arguments
5732/// mean is the whole of what tells the four apart: the same register is a base in one and an
5733/// index in another, and the same constant is a scale in one and a displacement in another.
5734fn address(kind: Address, read: &Read, gpr: RegClass) -> Option<mir::Mem> {
5735 let mut regs = read.regs.iter().copied().map(|reg| mir::Operand::read(reg, gpr));
5736 match kind {
5737 Address::BaseIndexScale => {
5738 let base = regs.next()?;
5739 let index = regs.next()?;
5740 Some(mir::Mem::at(base).indexed(index, u8::try_from(read.imm?).ok()?))
5741 }
5742 Address::IndexScale => Some(mir::Mem {
5743 base: None,
5744 index: Some(regs.next()?),
5745 scale: u8::try_from(read.imm?).ok()?,
5746 disp: 0,
5747 symbol: None,
5748 block: None,
5749 table: None,
5750 reach: mir::Reach::Itself,
5751 segment: None,
5752 }),
5753 Address::Base => Some(mir::Mem::at(regs.next()?)),
5754 // The rule that writes this has a guard saying the constant fits, so a displacement that
5755 // does not is a rule and a target that disagree rather than a program this cannot compile.
5756 Address::BaseOffset => {
5757 Some(mir::Mem { disp: i32::try_from(read.imm?).ok()?, ..mir::Mem::at(regs.next()?) })
5758 }
5759 }
5760}
5761
5762#[cfg(test)]
5763mod tests {
5764 use rucc_ir::{
5765 AsmInfo, Builder, CallInfo, Flags, InstData, MemInfo, MemOrder, Restrict, Signature, Type,
5766 };
5767 use rucc_regalloc::assign::Env;
5768 use rucc_target::x86_64::{FRAME, REGS, SYSV};
5769
5770 use super::*;
5771 use crate::finish::{Convention, finish};
5772 use crate::frame::{Frame, Incoming, Layout};
5773 use crate::select::x86_64::SELECTOR;
5774
5775 /// A function of as many 64 bit parameters as the test wants, and the block they are in.
5776 fn blank(params: &[Type]) -> (Interner, Func, Block, Vec<Value>) {
5777 let mut names = Interner::new();
5778 let mut func = Func::new(names.intern("f"), Signature::new());
5779 let block = func.create_block();
5780 let values = params.iter().map(|&ty| func.append_param(block, ty)).collect();
5781 (names, func, block, values)
5782 }
5783
5784 /// An ordinary access: not atomic, and aligned enough that nothing here has an opinion.
5785 /// Neither field reaches selection, which is the point of saying it once here.
5786 fn plain() -> MemInfo {
5787 MemInfo {
5788 size: 0,
5789 align: 1,
5790 order: MemOrder::NotAtomic,
5791 tbaa: None,
5792 owns: 0,
5793 restrict: Restrict::NONE,
5794 }
5795 }
5796
5797 /// What the allocator is given: every integer register the convention offers except two, held
5798 /// back so that a move on an edge has somewhere to break a cycle and a spilled value has
5799 /// somewhere to be read into. Which two does not matter, and holding back the last two the
5800 /// convention would reach for leaves every expectation below unchanged.
5801 fn env() -> Env {
5802 const SCRATCH: [PhysReg; 2] = [x86_64::R10, x86_64::R11];
5803 let order: Vec<PhysReg> =
5804 SYSV.int_order.iter().copied().filter(|reg| !SCRATCH.contains(reg)).collect();
5805 Env::new().with(x86_64::GPR, &order, &SCRATCH)
5806 }
5807
5808 /// The machine IR text a function lowers to.
5809 fn lower(names: &mut Interner, source: &Func) -> String {
5810 let out = func(source, names, &SELECTOR, &SYSV, &Elsewhere::default())
5811 .expect("every instruction has a rule");
5812 mir::print_func(&out.func, names, ®S)
5813 }
5814
5815 /// The same function lowered for AArch64, which is the first thing this file writes for a
5816 /// machine other than x86-64. Nothing past selection runs here, so what is checked is that the
5817 /// arguments, the rule and the return all come out named for the machine that was asked for.
5818 #[test]
5819 fn an_addition_lowers_for_aarch64_with_its_own_names() {
5820 let i32 = Type::int(32);
5821 let (mut names, mut func, block, args) = blank(&[i32, i32]);
5822 let mut build = Builder::new(&mut func, block);
5823 let sum = build.binary(Opcode::Add, args[0], args[1], Flags::default());
5824 build.ret(&[sum]);
5825
5826 let conv = &aarch64::AAPCS64;
5827 let selector = &crate::select::aarch64::SELECTOR;
5828 let out = super::func(&func, &mut names, selector, conv, &Elsewhere::default())
5829 .expect("an addition and a return have AArch64 rules");
5830 let text = mir::print_func(&out.func, &names, &aarch64::REGS);
5831 assert!(!text.contains("x64."), "{text}");
5832 assert!(text.contains("= a64.arg_val_32"), "{text}");
5833 assert!(text.contains("= a64.add_rr_32 %0, %1"), "{text}");
5834 assert!(text.contains("a64.ret_val_32 %2"), "{text}");
5835 }
5836
5837 /// Lowers one function for AArch64 and prints it, or says why it could not.
5838 fn lower_a64(names: &mut Interner, func: &Func) -> Result<String, String> {
5839 let conv = &aarch64::AAPCS64;
5840 let selector = &crate::select::aarch64::SELECTOR;
5841 let out = super::func(func, names, selector, conv, &Elsewhere::default())
5842 .map_err(|why| why.to_string())?;
5843 Ok(mir::print_func(&out.func, names, &aarch64::REGS))
5844 }
5845
5846 /// Nothing reads AArch64 assembly back into instructions, so every template there is kept as
5847 /// its text. The operands are the instruction's own, with the output first and the inputs
5848 /// last, a hole in the text asks for the `w` or the `x` name of one, and a vector register the
5849 /// clobber list names is written by it as well as every register a call may leave anything in.
5850 #[test]
5851 fn a_template_on_aarch64_is_kept_as_text_with_its_operands_in_registers() {
5852 let (i32, i64) = (Type::int(32), Type::int(64));
5853 let (mut names, mut source, block, args) = blank(&[i32, i64]);
5854 let out = clobbering(
5855 &mut source,
5856 block,
5857 &mut names,
5858 "add %w0, %w1, #1\n\tstr %2, [sp]",
5859 "=r,r,r",
5860 "d8",
5861 &[args[0], args[1]],
5862 &[i32],
5863 );
5864 let produced = source[out].results().next().expect("one result");
5865 Builder::new(&mut source, block).ret(&[produced]);
5866
5867 // Forty one registers between the output and the inputs: `x0` to `x15`, the sixteen vector
5868 // registers a call does not keep, and `v8`, which is the one the program named.
5869 let text = lower_a64(&mut names, &source).expect("kept as text");
5870 assert!(text.contains("%2:gpr, early $x0, early $x1,"), "{text}");
5871 assert!(text.contains(
5872 "early $v31, early $v8 = a64.template %0, %1, \
5873 @add \u{1}r0w\u{2}, \u{1}r42w\u{2}, #1\n\tstr \u{1}r43x\u{2}, [sp]\n"
5874 ));
5875 }
5876
5877 /// A letter that means one thing on x86 and another on AArch64 is refused there rather than
5878 /// read as x86. `Q` is an address in one register on AArch64, and the reader of the constraint
5879 /// list does not know it as that.
5880 #[test]
5881 fn a_constraint_letter_the_two_machines_disagree_about_is_refused_on_aarch64() {
5882 let i64 = Type::int(64);
5883 for constraints in ["=r,Q", "=a,r", "=r,S"] {
5884 let (mut names, mut source, block, args) = blank(&[i64]);
5885 let out = clobbering(
5886 &mut source,
5887 block,
5888 &mut names,
5889 "mov %0, %1",
5890 constraints,
5891 "",
5892 &[args[0]],
5893 &[i64],
5894 );
5895 let produced = source[out].results().next().expect("one result");
5896 Builder::new(&mut source, block).ret(&[produced]);
5897 let refused = lower_a64(&mut names, &source).expect_err(constraints);
5898 assert!(refused.contains("has an operand this cannot place"), "{refused}");
5899 }
5900 }
5901
5902 /// `w` on AArch64 is a vector register, named `v` with no modifier the way gcc names it and by
5903 /// its scalar view with one. An integer asked for in one is refused, since it would need a move
5904 /// into that file first.
5905 #[test]
5906 fn a_vector_operand_on_aarch64_is_in_the_vector_file() {
5907 let f64 = Type::float(rucc_ir::Float::F64);
5908 let (mut names, mut source, block, args) = blank(&[f64, f64]);
5909 let out = clobbering(
5910 &mut source,
5911 block,
5912 &mut names,
5913 "fadd %d0, %d1, %d2\n\tmov %0.16b, %0.16b",
5914 "=w,w,w",
5915 "",
5916 &[args[0], args[1]],
5917 &[f64],
5918 );
5919 let produced = source[out].results().next().expect("one result");
5920 Builder::new(&mut source, block).ret(&[produced]);
5921 let text = lower_a64(&mut names, &source).expect("kept as text");
5922 assert!(text.contains("%2:fpr, early $x0,"), "{text}");
5923 assert!(text.contains("@fadd \u{1}r0d\u{2}, \u{1}r"), "{text}");
5924 assert!(text.contains("\n\tmov \u{1}r0v\u{2}.16b, \u{1}r0v\u{2}.16b\n"), "{text}");
5925
5926 let i64 = Type::int(64);
5927 let (mut names, mut source, block, args) = blank(&[i64]);
5928 let out =
5929 clobbering(&mut source, block, &mut names, "fmov %d0, %d1", "=w,w", "", &args, &[i64]);
5930 let produced = source[out].results().next().expect("one result");
5931 Builder::new(&mut source, block).ret(&[produced]);
5932 assert!(lower_a64(&mut names, &source).is_err());
5933 }
5934
5935 #[test]
5936 fn an_addition_of_two_registers_is_one_instruction() {
5937 let i32 = Type::int(32);
5938 let (mut names, mut func, block, args) = blank(&[i32, i32]);
5939 let mut build = Builder::new(&mut func, block);
5940 build.binary(Opcode::Add, args[0], args[1], Flags::default());
5941
5942 assert_eq!(
5943 lower(&mut names, &func),
5944 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
5945 %1:gpr($rsi) = x64.arg_val_32\n %2:gpr(reuse 1) = x64.add_rr_32 %0, %1\n}\n"
5946 );
5947 }
5948
5949 #[test]
5950 fn a_constant_operand_becomes_an_immediate() {
5951 let i32 = Type::int(32);
5952 let (mut names, mut func, block, args) = blank(&[i32]);
5953 let mut build = Builder::new(&mut func, block);
5954 let seven = build.iconst(i32, 7);
5955 build.binary(Opcode::Add, args[0], seven, Flags::default());
5956
5957 // The constant is in the instruction and nothing was written to hold it, which is what
5958 // materializing one where a register for it is wanted buys.
5959 assert_eq!(
5960 lower(&mut names, &func),
5961 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
5962 %1:gpr(reuse 1) = x64.add_ri_32 %0, 7\n}\n"
5963 );
5964 }
5965
5966 #[test]
5967 fn a_constant_too_wide_for_an_immediate_goes_into_a_register() {
5968 let i64 = Type::int(64);
5969 let (mut names, mut func, block, args) = blank(&[i64]);
5970 let mut build = Builder::new(&mut func, block);
5971 let big = build.iconst(i64, i128::from(i32::MAX) + 1);
5972 build.binary(Opcode::Add, args[0], big, Flags::default());
5973
5974 // Nobody wrote this fallback down. The rule that takes an immediate has a guard that
5975 // turns a number this wide down, so it does not fire, and the next way of showing the
5976 // operand puts it in a register.
5977 assert_eq!(
5978 lower(&mut names, &func),
5979 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
5980 %1:gpr = x64.mov_ri_64 2147483648\n %2:gpr(reuse 1) = x64.add_rr_64 %0, %1\n}\n"
5981 );
5982 }
5983
5984 #[test]
5985 fn an_index_calculation_folds_into_an_address() {
5986 let i64 = Type::int(64);
5987 let (mut names, mut func, block, args) = blank(&[i64, i64]);
5988 let mut build = Builder::new(&mut func, block);
5989 let four = build.iconst(i64, 4);
5990 let scaled = build.binary(Opcode::Mul, args[1], four, Flags::default());
5991 build.binary(Opcode::Add, args[0], scaled, Flags::default());
5992
5993 // Three IR instructions and one machine instruction. The multiply is gone because the
5994 // rule that matched reached down and took it.
5995 assert_eq!(
5996 lower(&mut names, &func),
5997 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
5998 %1:gpr($rsi) = x64.arg_val_64\n %2:gpr = x64.lea_64 [%0 + %1*4]\n}\n"
5999 );
6000 }
6001
6002 #[test]
6003 fn an_instruction_every_reader_can_take_is_folded_into_all_of_them() {
6004 let i64 = Type::int(64);
6005 let (mut names, mut func, block, args) = blank(&[i64, i64]);
6006 let mut build = Builder::new(&mut func, block);
6007 let four = build.iconst(i64, 4);
6008 let scaled = build.binary(Opcode::Mul, args[1], four, Flags::default());
6009 let first = build.binary(Opcode::Add, args[0], scaled, Flags::default());
6010 build.binary(Opcode::Add, first, scaled, Flags::default());
6011
6012 // Both readers have room for a scaled index, so both of them take it and nothing is left
6013 // to read the multiply. Three IR instructions become two machine ones, where refusing to
6014 // fold into either reader would have left three.
6015 assert_eq!(
6016 lower(&mut names, &func),
6017 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
6018 %1:gpr($rsi) = x64.arg_val_64\n %2:gpr = x64.lea_64 [%0 + %1*4]\n \
6019 %3:gpr = x64.lea_64 [%2 + %1*4]\n}\n"
6020 );
6021 }
6022
6023 #[test]
6024 fn an_instruction_one_of_its_readers_cannot_take_is_folded_into_none_of_them() {
6025 let i64 = Type::int(64);
6026 let (mut names, mut func, block, args) = blank(&[i64, i64]);
6027 let mut build = Builder::new(&mut func, block);
6028 let four = build.iconst(i64, 4);
6029 let scaled = build.binary(Opcode::Mul, args[1], four, Flags::default());
6030 build.binary(Opcode::Add, args[0], scaled, Flags::default());
6031 build.store(scaled, args[0], plain(), Flags::default());
6032
6033 // The addition has room for the multiply and the store does not: what a store writes is
6034 // a register, and no rule reaches through it. Folding into the addition alone would
6035 // leave the multiply where it is for the store to read and do the work twice, so the
6036 // multiply is put back and both readers read the register it wrote.
6037 let text = lower(&mut names, &func);
6038 assert!(text.contains("x64.lea_64 [%1*4]"), "{text}");
6039 assert!(text.contains("x64.add_rr_64"), "{text}");
6040 }
6041
6042 #[test]
6043 fn a_shift_by_a_register_asks_for_it_in_cl() {
6044 let i32 = Type::int(32);
6045 let (mut names, mut func, block, args) = blank(&[i32, i32]);
6046 let mut build = Builder::new(&mut func, block);
6047 build.binary(Opcode::Shl, args[0], args[1], Flags::default());
6048
6049 // The fixed register is not in the rule. It is what the target says the instruction does
6050 // with its operands, and the allocator is what will act on it.
6051 let text = lower(&mut names, &func);
6052 assert!(text.contains("x64.shl_rcl_32 %0, %1($rcx)"), "{text}");
6053 }
6054
6055 #[test]
6056 fn a_division_names_the_registers_and_the_register_it_destroys() {
6057 let i32 = Type::int(32);
6058 let (mut names, mut func, block, args) = blank(&[i32, i32]);
6059 let mut build = Builder::new(&mut func, block);
6060 build.binary(Opcode::SDiv, args[0], args[1], Flags::default());
6061
6062 // Two definitions, because a division writes the remainder whether anybody wanted it or
6063 // not, and the second one is early because it is destroyed before the operands are read.
6064 let text = lower(&mut names, &func);
6065 assert!(
6066 text.contains("%2:gpr($rax), early %3:gpr($rdx) = x64.idiv_quo_32 %0($rax), %1"),
6067 "{text}"
6068 );
6069 }
6070
6071 #[test]
6072 fn a_load_reads_through_the_register_the_address_is_in() {
6073 let i64 = Type::int(64);
6074 let (mut names, mut func, block, args) = blank(&[i64]);
6075 let mut build = Builder::new(&mut func, block);
6076 build.load(Type::int(32), args[0], plain(), Flags::default());
6077
6078 assert_eq!(
6079 lower(&mut names, &func),
6080 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
6081 %1:gpr = x64.mov_rm_32 [%0]\n}\n"
6082 );
6083 }
6084
6085 #[test]
6086 fn a_store_writes_no_register_and_the_value_it_writes_is_the_one_the_ir_gave_it() {
6087 let (mut names, mut func, block, args) = blank(&[Type::int(32), Type::int(64)]);
6088 let mut build = Builder::new(&mut func, block);
6089 build.store(args[0], args[1], plain(), Flags::default());
6090
6091 // The value is the first parameter and the address is the second, and the instruction
6092 // takes them the other way round. Getting that backwards would compile to a store of the
6093 // address into the value, which is a program that runs and does the wrong thing.
6094 assert_eq!(
6095 lower(&mut names, &func),
6096 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
6097 %1:gpr($rsi) = x64.arg_val_64\n x64.mov_mr_32 %0, [%1]\n}\n"
6098 );
6099 }
6100
6101 #[test]
6102 fn an_address_with_a_constant_added_folds_into_the_access() {
6103 let i64 = Type::int(64);
6104 let (mut names, mut func, block, args) = blank(&[i64]);
6105 let mut build = Builder::new(&mut func, block);
6106 let twelve = build.iconst(i64, 12);
6107 let field = build.binary(Opcode::Add, args[0], twelve, Flags::default());
6108 build.load(Type::int(64), field, plain(), Flags::default());
6109
6110 // Two IR instructions and one machine instruction, which is what every read of a field
6111 // of a structure comes to.
6112 assert_eq!(
6113 lower(&mut names, &func),
6114 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
6115 %1:gpr = x64.mov_rm_64 [%0 + 12]\n}\n"
6116 );
6117 }
6118
6119 #[test]
6120 fn a_displacement_too_wide_to_encode_leaves_the_addition_where_it_is() {
6121 let i64 = Type::int(64);
6122 let (mut names, mut func, block, args) = blank(&[i64]);
6123 let mut build = Builder::new(&mut func, block);
6124 let big = build.iconst(i64, i128::from(i32::MAX) + 1);
6125 let far = build.binary(Opcode::Add, args[0], big, Flags::default());
6126 build.load(Type::int(32), far, plain(), Flags::default());
6127
6128 // A displacement is signed and 32 bits. The rule that folds one has a guard that turns
6129 // this down, so the addition stays and the load reads through what it produced. Nobody
6130 // wrote that fallback: it is the next way of showing the operand.
6131 let text = lower(&mut names, &func);
6132 assert!(text.contains("x64.mov_rm_32 [%2]"), "{text}");
6133 assert!(text.contains("x64.add_rr_64"), "{text}");
6134 }
6135
6136 #[test]
6137 fn a_store_of_a_value_that_was_loaded_is_two_instructions_and_no_arithmetic() {
6138 let i64 = Type::int(64);
6139 let (mut names, mut func, block, args) = blank(&[i64, i64]);
6140 let mut build = Builder::new(&mut func, block);
6141 let got = build.load(Type::int(8), args[0], plain(), Flags::default());
6142 build.store(got, args[1], plain(), Flags::default());
6143
6144 // A load feeding a store is the one place folding would be wrong: an x86-64 `mov` has at
6145 // most one memory operand, and there is no rule that takes two, so the load is left where
6146 // it is and the store reads the register it wrote.
6147 assert_eq!(
6148 lower(&mut names, &func),
6149 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
6150 %1:gpr($rsi) = x64.arg_val_64\n %2:gpr = x64.mov_rm_8 [%0]\n \
6151 x64.mov_mr_8 %2, [%1]\n}\n"
6152 );
6153 }
6154
6155 #[test]
6156 fn an_access_at_a_width_no_rule_is_written_at_is_reported() {
6157 let i64 = Type::int(64);
6158 let (mut names, mut source, block, args) = blank(&[i64]);
6159 let mut build = Builder::new(&mut source, block);
6160 build.load(Type::int(128), args[0], plain(), Flags::default());
6161
6162 // The width is the whole of what is wrong here, so the width is in the message: `load`
6163 // on its own is written about at every other width and would send a reader looking in
6164 // the wrong place.
6165 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6166 .expect_err("nothing loads 128 bits");
6167 assert_eq!(failed.to_string(), "no rule lowers a `load` producing a `i128`");
6168 }
6169
6170 #[test]
6171 fn a_return_asks_for_the_value_in_the_register_the_caller_reads() {
6172 let (mut names, mut func, block, args) = blank(&[Type::int(32)]);
6173 let mut build = Builder::new(&mut func, block);
6174 build.ret(&[args[0]]);
6175
6176 // The register is not in the rule, the same way `cl` is not in the rule for a shift. It
6177 // is what the target says the instruction does with its operand, and the allocator is
6178 // what will act on it. There is no `ret` here, because giving the frame back has to
6179 // happen between this and leaving and the frame is not worked out yet.
6180 assert_eq!(
6181 lower(&mut names, &func),
6182 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
6183 x64.ret_val_32 %0($rax)\n}\n"
6184 );
6185 }
6186
6187 #[test]
6188 fn a_return_of_two_values_asks_for_the_second_register_as_well() {
6189 let i64 = Type::int(64);
6190 let (mut names, mut func, block, args) = blank(&[i64, i64]);
6191 let mut build = Builder::new(&mut func, block);
6192 build.ret(&[args[0], args[1]]);
6193
6194 // `struct { long a, b; } f(long a, long b)`, after the front end has classified it. Both
6195 // halves are integers, so the second is in the second integer return register, and both
6196 // pseudos say so the same way the one for a single value does.
6197 assert_eq!(
6198 lower(&mut names, &func),
6199 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
6200 %1:gpr($rsi) = x64.arg_val_64\n x64.ret_val_64 %0($rax)\n \
6201 x64.ret_val2_64 %1($rdx)\n}\n"
6202 );
6203 }
6204
6205 #[test]
6206 fn two_values_back_in_different_files_are_both_the_first_of_their_own() {
6207 let f64 = Type::float(rucc_ir::Float::F64);
6208 let (mut names, mut func, block, args) = blank(&[f64, Type::int(64)]);
6209 let mut build = Builder::new(&mut func, block);
6210 build.ret(&[args[0], args[1]]);
6211
6212 // `struct { double a; long b; } f(double a, long b)`. The two files are counted apart, so
6213 // neither half is the second of anything and the `double` is in `xmm0` rather than in the
6214 // register a second `double` would have been in. Getting this wrong is not a crash: the
6215 // caller reads a register nobody wrote, and this is where that is ruled out.
6216 assert_eq!(
6217 lower(&mut names, &func),
6218 "mfunc @f {\nblock0:\n %0:xmm($xmm0) = x64.arg_val_f64\n \
6219 %1:gpr($rdi) = x64.arg_val_64\n x64.ret_val_f64 %0($xmm0)\n \
6220 x64.ret_val_64 %1($rax)\n}\n"
6221 );
6222 }
6223
6224 #[test]
6225 fn two_of_the_same_file_back_take_the_first_two_of_it() {
6226 let f64 = Type::float(rucc_ir::Float::F64);
6227 let (mut names, mut func, block, args) = blank(&[f64, f64]);
6228 let mut build = Builder::new(&mut func, block);
6229 build.ret(&[args[0], args[1]]);
6230
6231 // `struct { double x, y; } f(double x, double y)`, which is the vector half of the pair
6232 // above and counts in its own file the same way.
6233 assert_eq!(
6234 lower(&mut names, &func),
6235 "mfunc @f {\nblock0:\n %0:xmm($xmm0) = x64.arg_val_f64\n \
6236 %1:xmm($xmm1) = x64.arg_val_f64\n x64.ret_val_f64 %0($xmm0)\n \
6237 x64.ret_val2_f64 %1($xmm1)\n}\n"
6238 );
6239 }
6240
6241 /// A function whose answer goes back through memory, with the pointer to the space for it in
6242 /// front of whatever else it takes. Only the signature says it is one.
6243 fn returning_through_memory(params: &[Type]) -> (Interner, Func, Block, Vec<Value>) {
6244 let mut names = Interner::new();
6245 let sret = Abi::Sret { size: 32, align: 8 };
6246 let mut signature = Signature::new().and_param(Param::with_abi(Type::PTR, sret));
6247 signature.params.extend(params.iter().copied().map(Param::new));
6248 let mut func = Func::new(names.intern("f"), signature);
6249 let block = func.create_block();
6250 let space = func.append_param(block, Type::PTR);
6251 let values = std::iter::once(space)
6252 .chain(params.iter().map(|&ty| func.append_param(block, ty)))
6253 .collect();
6254 (names, func, block, values)
6255 }
6256
6257 #[test]
6258 fn the_space_a_return_through_memory_was_given_goes_back_in_the_first_return_register() {
6259 let (mut names, mut func, block, _) = returning_through_memory(&[]);
6260 Builder::new(&mut func, block).ret(&[]);
6261
6262 // `struct big f(void)`, where `big` is too large to come back in registers. The `return`
6263 // carries nothing, because the value went into the space the caller handed over, and the
6264 // document still says that address comes back in `rax`. Nothing in the IR says it, so the
6265 // convention says it, and the pseudo is the one any other pointer return would use.
6266 assert_eq!(
6267 lower(&mut names, &func),
6268 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
6269 x64.ret_val_64 %0($rax)\n}\n"
6270 );
6271 }
6272
6273 #[test]
6274 fn what_the_function_did_in_between_does_not_take_the_register_off_it() {
6275 let (mut names, mut func, block, args) = returning_through_memory(&[Type::int(32)]);
6276 let mut build = Builder::new(&mut func, block);
6277 build.store(args[1], args[0], plain(), Flags::default());
6278 build.ret(&[]);
6279
6280 // The register is a read at the end and not a move at the start, so it is live across
6281 // everything between the two and the allocator has to keep it somewhere. In a function
6282 // with a call in it that somewhere is a callee saved register, and the address comes back
6283 // into `rax` here rather than whatever the last instruction happened to leave there. That
6284 // is issue #333, and a store is enough to show the value outlives the entry block.
6285 let text = lower(&mut names, &func);
6286 assert!(text.contains("x64.mov_mr_32 %1, [%0]"), "{text}");
6287 assert!(text.ends_with(" x64.ret_val_64 %0($rax)\n}\n"), "{text}");
6288 }
6289
6290 #[test]
6291 fn a_pointer_that_is_only_a_pointer_is_not_given_back() {
6292 let (mut names, mut func, block, args) = blank(&[Type::PTR]);
6293 let mut build = Builder::new(&mut func, block);
6294 build.store(args[0], args[0], plain(), Flags::default());
6295 build.ret(&[]);
6296
6297 // `void f(void **p)`. It takes a pointer first and returns nothing, which is the shape of
6298 // the one above and none of its meaning, and what tells them apart is the signature. A
6299 // `void` function leaves `rax` alone.
6300 assert!(!lower(&mut names, &func).contains("ret_val"));
6301 }
6302
6303 #[test]
6304 fn a_return_of_a_constant_puts_it_in_a_register_first() {
6305 let (mut names, mut func, block, _) = blank(&[]);
6306 let mut build = Builder::new(&mut func, block);
6307 let zero = build.iconst(Type::int(32), 0);
6308 build.ret(&[zero]);
6309
6310 // No rule returns an immediate, so the plan that offers one is turned down and the next
6311 // one materializes it. That is `int main(void) { return 0; }` in full, once the epilogue
6312 // is appended to it.
6313 assert_eq!(
6314 lower(&mut names, &func),
6315 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_ri_32 0\n x64.ret_val_32 %0($rax)\n}\n"
6316 );
6317 }
6318
6319 #[test]
6320 fn the_rule_that_writes_a_constant_down_is_recorded_as_a_rule_that_fired() {
6321 let (mut names, mut func, block, _) = blank(&[]);
6322 let mut build = Builder::new(&mut func, block);
6323 let zero = build.iconst(Type::int(32), 0);
6324 build.ret(&[zero]);
6325
6326 // The loop over the instructions passes a constant by, because a constant is written where
6327 // a register for it is first wanted rather than where the IR put it. So the only place a
6328 // rule about one is ever selected is the materialization, and a mark made in the loop
6329 // alone would report every rule about a constant as a rule nothing reaches.
6330 let out = super::func(&func, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6331 .expect("every instruction has a rule");
6332 let rules = &crate::select::x86_64::TABLE.rules;
6333 let fired: Vec<&str> = rules
6334 .iter()
6335 .enumerate()
6336 .filter(|(index, _)| out.fired.has(*index))
6337 .map(|(_, rule)| rule.pattern)
6338 .collect();
6339 assert!(fired.contains(&"(iconst.i32 k)"), "{fired:?}");
6340 }
6341
6342 #[test]
6343 fn a_return_of_nothing_is_no_instruction_at_all() {
6344 let (mut names, mut func, block, _) = blank(&[]);
6345 let mut build = Builder::new(&mut func, block);
6346 build.ret(&[]);
6347
6348 // Every part of leaving a function that returns nothing is the epilogue's, and the
6349 // epilogue goes in after allocation. A block with nothing in it is the right answer here
6350 // rather than a function that could not be lowered.
6351 assert_eq!(lower(&mut names, &func), "mfunc @f {\nblock0:\n}\n");
6352 }
6353
6354 #[test]
6355 fn the_allocator_is_what_moves_the_answer_into_the_return_register() {
6356 let (mut names, mut source, block, _) = blank(&[]);
6357 let mut build = Builder::new(&mut source, block);
6358 let zero = build.iconst(Type::int(32), 0);
6359 build.ret(&[zero]);
6360
6361 let mut out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6362 .expect("every instruction has a rule")
6363 .func;
6364 let env = env();
6365 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
6366 let frame = Frame::of(&out, &allocation, &Layout::new(&SYSV, REGS));
6367 finish(
6368 &mut out,
6369 &allocation,
6370 &frame,
6371 &Stack::default(),
6372 Convention::new(&SYSV, &FRAME),
6373 &mut names,
6374 );
6375
6376 // `int main(void) { return 0; }` end to end. Nothing here asked for `rax`: the rule said
6377 // the value goes back, the target said where, and the allocator is what made it true. The
6378 // epilogue is what leaves, and this function needs no frame, so it is the return alone.
6379 //
6380 // Two instructions and no copy, which is what a hint buys. The return insists on `rax`,
6381 // so `rax` is the register the allocator tries first for the value the return reads, and
6382 // the constant is written straight into it.
6383 assert_eq!(
6384 mir::print_func(&out, &names, ®S),
6385 "mfunc @f {\nblock0:\n $rax = x64.mov_ri_32 0\n \
6386 x64.ret_val_32 $rax($rax)\n x64.ret\n}\n"
6387 );
6388 }
6389
6390 #[test]
6391 fn a_function_of_two_arguments_is_a_whole_function_now() {
6392 let i32 = Type::int(32);
6393 let (mut names, mut source, block, args) = blank(&[i32, i32]);
6394 let mut build = Builder::new(&mut source, block);
6395 let sum = build.binary(Opcode::Add, args[0], args[1], Flags::default());
6396 build.ret(&[sum]);
6397
6398 let mut out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6399 .expect("every instruction has a rule")
6400 .func;
6401 let env = env();
6402 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
6403 let frame = Frame::of(&out, &allocation, &Layout::new(&SYSV, REGS));
6404 finish(
6405 &mut out,
6406 &allocation,
6407 &frame,
6408 &Stack::default(),
6409 Convention::new(&SYSV, &FRAME),
6410 &mut names,
6411 );
6412
6413 // `int f(int a, int b) { return a + b; }` end to end, and this is the test the argument
6414 // side exists for. Before it there was no way to write one: the allocator refuses a
6415 // function whose entry block takes parameters, because there is no edge into an entry
6416 // block for the moves that give a block parameter its value to go on.
6417 //
6418 // One move, and it is the one the machine's addition needs rather than one the allocator
6419 // owes anybody. Each argument stays in the register it arrived in, because the pseudo
6420 // that defines it insists on that register and the allocator now tries it first, and the
6421 // sum stays in the register the addition wrote it to until the return reads it out. The
6422 // copy in front of a two address instruction is what makes its destination one of the
6423 // registers it reads, and the source operand keeps its own name because the destination
6424 // is what the encoder writes.
6425 assert_eq!(
6426 mir::print_func(&out, &names, ®S),
6427 "mfunc @f {\nblock0:\n $rdi($rdi) = x64.arg_val_32\n \
6428 $rsi($rsi) = x64.arg_val_32\n \
6429 $rdi(reuse 1) = x64.add_rr_32 $rdi, $rsi\n $rax = x64.mov_rr_64 $rdi\n \
6430 x64.ret_val_32 $rax($rax)\n x64.ret\n}\n"
6431 );
6432 }
6433
6434 #[test]
6435 fn an_argument_with_no_register_left_for_it_is_read_out_of_the_caller_s_stack() {
6436 let i64 = Type::int(64);
6437 let (mut names, mut source, block, args) = blank(&[i64; 7]);
6438 let mut build = Builder::new(&mut source, block);
6439 build.ret(&[args[6]]);
6440
6441 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6442 .expect("the seventh is read from memory");
6443
6444 // SysV passes six integers in registers and the seventh in the caller's memory, so six of
6445 // these are pseudos that encode to nothing and the seventh is a load that encodes to real
6446 // bytes. Its displacement is nothing here for the reason a local's is: there is no frame
6447 // yet. What the walk hands on is which instruction is waiting, and for how far up the
6448 // caller's argument area, which is the bottom of it because it is the first one there.
6449 assert_eq!(lowered.stack.arguments.len(), 1);
6450 assert_eq!(lowered.stack.arguments[0].1, 0);
6451 let text = mir::print_func(&lowered.func, &names, ®S);
6452 assert!(text.contains("%6:gpr = x64.mov_rm_64 [$rsp]"), "{text}");
6453 assert_eq!(text.matches("x64.arg_val_64").count(), 6, "{text}");
6454 }
6455
6456 #[test]
6457 fn the_frame_is_what_says_how_far_up_the_caller_s_stack_an_argument_is() {
6458 let i64 = Type::int(64);
6459 let (mut names, mut source, block, args) = blank(&[i64; 8]);
6460 let mut build = Builder::new(&mut source, block);
6461 let sum = build.binary(Opcode::Add, args[6], args[7], Flags::default());
6462 build.ret(&[sum]);
6463
6464 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6465 .expect("both are read from memory");
6466 let stack = lowered.stack;
6467 let mut out = lowered.func;
6468 let env = env();
6469 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
6470 let layout = stack.layout(Layout::new(&SYSV, REGS));
6471 let frame = Frame::of(&out, &allocation, &layout);
6472 finish(&mut out, &allocation, &frame, &stack, Convention::new(&SYSV, &FRAME), &mut names);
6473
6474 // A leaf that takes no frame, so the stack pointer never moves and the only thing between
6475 // it and the caller's arguments is the return address the call pushed. The seventh
6476 // parameter is at the bottom of the caller's argument area and the eighth is one word
6477 // further up, which is the eight bytes between the two offsets.
6478 let text = mir::print_func(&out, &names, ®S);
6479 assert_eq!(frame.size(), 0);
6480 assert_eq!(frame.incoming(), Incoming::from_stack(8));
6481 assert!(text.contains("x64.mov_rm_64 [$rsp + 8]"), "{text}");
6482 assert!(text.contains("x64.mov_rm_64 [$rsp + 16]"), "{text}");
6483 }
6484
6485 #[test]
6486 fn a_realigned_frame_reaches_the_caller_s_arguments_through_the_frame_pointer() {
6487 let i64 = Type::int(64);
6488 let (mut names, mut source, block, args) = blank(&[i64; 7]);
6489 let wide = slot(&mut source, block, 64, 32);
6490 let mut build = Builder::new(&mut source, block);
6491 build.store(args[6], wide, plain(), Flags::default());
6492 build.ret(&[args[6]]);
6493
6494 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6495 .expect("every instruction has a rule");
6496 let stack = lowered.stack;
6497 let mut out = lowered.func;
6498 let env = env();
6499 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
6500 let layout = stack.layout(Layout::new(&SYSV, REGS));
6501 let frame = Frame::of(&out, &allocation, &layout);
6502 finish(&mut out, &allocation, &frame, &stack, Convention::new(&SYSV, &FRAME), &mut names);
6503
6504 // A local wanting thirty two byte alignment makes the prologue force the stack pointer,
6505 // which throws away how far the caller's stack was. So the load the lowering wrote off the
6506 // stack pointer is rewritten to read through the frame pointer, at the one distance that
6507 // survives: the word the prologue pushed the frame pointer into, and the return address
6508 // above it.
6509 let text = mir::print_func(&out, &names, ®S);
6510 assert_eq!(frame.realign(), Some(32));
6511 assert_eq!(frame.incoming(), Incoming::from_frame(16));
6512 assert!(text.contains("x64.mov_rm_64 [$rbp + 16]"), "{text}");
6513 assert!(!text.contains("x64.mov_rm_64 [$rsp"), "{text}");
6514 }
6515
6516 #[test]
6517 fn a_jump_is_the_edge_and_nothing_else() {
6518 let i32 = Type::int(32);
6519 let (mut names, mut source, entry, args) = blank(&[i32]);
6520 let next = source.create_block();
6521 let got = source.append_param(next, i32);
6522 Builder::new(&mut source, entry).jump(next, &[args[0]]);
6523 Builder::new(&mut source, next).ret(&[got]);
6524
6525 // Two blocks and two instructions, and the jump is neither of them. What it was is the
6526 // arm on the first block, and what the arm carries is the argument it was called with.
6527 assert_eq!(
6528 lower(&mut names, &source),
6529 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32 block1(%0)\n\n\
6530 block1(%1:gpr):\n x64.ret_val_32 %1($rax)\n}\n"
6531 );
6532 }
6533
6534 /// A block that reads what a block below it writes is filled after it, not before it.
6535 ///
6536 /// The blocks are written entry, `early`, `late`, `exit`, and the entry jumps straight past
6537 /// `early` to `late`, so `late` dominates `early` while sitting below it in the function.
6538 /// Filling them in the order they are written reaches the read in `early` first, and reading
6539 /// a value with no register yet mints one. The cast in `late` is no instruction at all, so
6540 /// what it does is give its answer the register its operand is already in, and that is not
6541 /// the register the read minted. Nothing writes the register the read minted. The printer
6542 /// says `%?` for a register nothing defines, which is what this looks for, and what came out
6543 /// of the real bug was SQLite loading a stack slot no store ever reached.
6544 #[test]
6545 fn a_block_that_reads_what_a_block_below_it_writes_is_filled_after_it() {
6546 let i64 = Type::int(64);
6547 let (mut names, mut source, entry, args) = blank(&[i64, i64]);
6548 let early = source.create_block();
6549 let late = source.create_block();
6550 let exit = source.create_block();
6551
6552 Builder::new(&mut source, entry).jump(late, &[]);
6553 let ptr = cast(&mut source, late, Opcode::IntToPtr, args[0], Type::PTR);
6554 Builder::new(&mut source, early).ret(&[ptr]);
6555 let mut build = Builder::new(&mut source, late);
6556 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
6557 build.br_if(cond, early, &[], exit, &[]);
6558 Builder::new(&mut source, exit).ret(&[args[1]]);
6559
6560 let text = lower(&mut names, &source);
6561 assert!(!text.contains("%?"), "every register has something that writes it: {text}");
6562 }
6563
6564 /// A constant is written where it is wanted rather than where the IR defined it, and two
6565 /// blocks wanting the same one is two places. Writing it once and reading it in both is a
6566 /// register read where nothing wrote it, unless the block it was written in happens to
6567 /// dominate the other, which nothing here checks and which the second arm of a branch never
6568 /// does. Each block gets its own copy of the number instead.
6569 #[test]
6570 fn a_constant_two_blocks_want_is_written_in_both_of_them() {
6571 let i32 = Type::int(32);
6572 let (mut names, mut source, entry, args) = blank(&[i32, i32]);
6573 let then = source.create_block();
6574 let other = source.create_block();
6575 let join = source.create_block();
6576 let got = source.append_param(join, i32);
6577
6578 let mut build = Builder::new(&mut source, entry);
6579 let seven = build.iconst(i32, 7);
6580 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
6581 build.br_if(cond, then, &[], other, &[]);
6582 // Both arms want the seven in a register, because a block argument is never an immediate,
6583 // and neither arm dominates the other.
6584 Builder::new(&mut source, then).jump(join, &[seven]);
6585 Builder::new(&mut source, other).jump(join, &[seven]);
6586 Builder::new(&mut source, join).ret(&[got]);
6587
6588 let text = lower(&mut names, &source);
6589 assert_eq!(text.matches("x64.mov_ri_32 7").count(), 2, "one seven per block: {text}");
6590 }
6591
6592 /// An argument on an edge out of a block that leaves two ways is read after every instruction
6593 /// of the block is written, and reading one can write an instruction, which would land after
6594 /// the branch that has already jumped past it. The branch goes back on the end.
6595 #[test]
6596 fn a_constant_an_edge_wants_is_written_before_the_branch_and_not_after_it() {
6597 let i32 = Type::int(32);
6598 let (mut names, mut source, entry, args) = blank(&[i32, i32]);
6599 let then = source.create_block();
6600 let join = source.create_block();
6601 let got = source.append_param(join, i32);
6602
6603 let mut build = Builder::new(&mut source, entry);
6604 let nine = build.iconst(i32, 9);
6605 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
6606 build.br_if(cond, then, &[], join, &[nine]);
6607 Builder::new(&mut source, then).jump(join, &[args[0]]);
6608 Builder::new(&mut source, join).ret(&[got]);
6609
6610 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6611 .expect("every instruction has a rule")
6612 .func;
6613 let entry = out.entry().expect("an entry block");
6614 let last = out.terminator(entry).expect("a block that leaves two ways has a branch");
6615 let branch = names.intern("x64.br_cond_8");
6616 assert_eq!(
6617 out[last].opcode,
6618 mir::Opcode::new(branch),
6619 "the branch is last: {}",
6620 mir::print_func(&out, &names, ®S)
6621 );
6622 }
6623
6624 #[test]
6625 fn a_conditional_branch_is_lowered_to_the_condition_and_nothing_about_where_it_goes() {
6626 let i32 = Type::int(32);
6627 let (mut names, mut source, entry, args) = blank(&[i32, i32]);
6628 let then = source.create_block();
6629 let other = source.create_block();
6630 let mut build = Builder::new(&mut source, entry);
6631 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
6632 build.br_if(cond, then, &[], other, &[]);
6633 Builder::new(&mut source, then).ret(&[args[0]]);
6634 Builder::new(&mut source, other).ret(&[args[1]]);
6635
6636 // The comparison writes a byte and the branch reads it, and neither says a block. Both
6637 // arms are on the entry block, in the order the branch took them, so the arm that runs
6638 // when the condition holds is the first.
6639 assert_eq!(
6640 lower(&mut names, &source),
6641 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
6642 %1:gpr($rsi) = x64.arg_val_32\n %2:gpr = x64.cmp_set_l_32 %0, %1\n \
6643 x64.br_cond_8 %2, block1, block2\n\n\
6644 block1:\n x64.ret_val_32 %0($rax)\n\n\
6645 block2:\n x64.ret_val_32 %1($rax)\n}\n"
6646 );
6647 }
6648
6649 /// A choice between two values, which is one instruction and no blocks at all.
6650 ///
6651 /// The arms come out the other way round from the IR, because a conditional move overwrites its
6652 /// destination and the destination is the arm taken when the condition does not hold. The
6653 /// condition arrives last for the same reason: it is read by the test in front of the move
6654 /// rather than by the move.
6655 #[test]
6656 fn a_select_is_lowered_to_a_test_and_a_conditional_move() {
6657 let i32 = Type::int(32);
6658 let (mut names, mut source, entry, args) = blank(&[i32, i32]);
6659 let mut build = Builder::new(&mut source, entry);
6660 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
6661 let picked = build.select(cond, args[0], args[1]);
6662 build.ret(&[picked]);
6663
6664 assert_eq!(
6665 lower(&mut names, &source),
6666 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
6667 %1:gpr($rsi) = x64.arg_val_32\n %2:gpr = x64.cmp_set_l_32 %0, %1\n \
6668 %3:gpr(reuse 1) = x64.test_cmov_ne_32 %1, %0, %2\n \
6669 x64.ret_val_32 %3($rax)\n}\n"
6670 );
6671 }
6672
6673 #[test]
6674 fn a_branch_over_a_block_is_a_whole_function_now() {
6675 let i32 = Type::int(32);
6676 let (mut names, mut source, entry, args) = blank(&[i32, i32]);
6677 let then = source.create_block();
6678 let other = source.create_block();
6679 let join = source.create_block();
6680 let got = source.append_param(join, i32);
6681 let mut build = Builder::new(&mut source, entry);
6682 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
6683 build.br_if(cond, then, &[], other, &[]);
6684 let mut build = Builder::new(&mut source, then);
6685 let sum = build.binary(Opcode::Add, args[0], args[1], Flags::default());
6686 build.jump(join, &[sum]);
6687 Builder::new(&mut source, other).jump(join, &[args[1]]);
6688 Builder::new(&mut source, join).ret(&[got]);
6689
6690 // `int f(int a, int b) { if (a < b) return a + b; else return b; }` end to end, written
6691 // the way a front end writes it: both arms of the branch are blocks of their own and the
6692 // return is the block they meet at. No edge here is critical, because the two arms out of
6693 // the entry carry nothing and the two arms into the join each leave a block that goes
6694 // nowhere else, so each has its own end to put its move at.
6695 let mut out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6696 .expect("every instruction has a rule")
6697 .func;
6698 assert_eq!(crate::split::critical(&mut out), 0, "no edge here is critical");
6699 let env = env();
6700 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
6701 let frame = Frame::of(&out, &allocation, &Layout::new(&SYSV, REGS));
6702 finish(
6703 &mut out,
6704 &allocation,
6705 &frame,
6706 &Stack::default(),
6707 Convention::new(&SYSV, &FRAME),
6708 &mut names,
6709 );
6710
6711 // One epilogue, on the join, which is the one block the function leaves from, and the
6712 // moves that give the join its parameter are at the end of each arm. Every register is
6713 // physical and the branch is still a branch on a register, because turning it into a
6714 // `test` and a `jcc` is the block layout's and there is no block layout yet.
6715 let text = mir::print_func(&out, &names, ®S);
6716 assert_eq!(text.matches("x64.ret\n").count(), 1, "{text}");
6717 assert!(text.contains("x64.br_cond_8"), "{text}");
6718 assert!(text.contains("x64.add_rr_32"), "{text}");
6719 assert!(!text.contains('%'), "{text}");
6720 }
6721
6722 #[test]
6723 fn a_critical_edge_is_split_before_the_allocator_ever_sees_it() {
6724 let i32 = Type::int(32);
6725 let (mut names, mut source, entry, args) = blank(&[i32, i32]);
6726 let then = source.create_block();
6727 let join = source.create_block();
6728 let got = source.append_param(join, i32);
6729 let mut build = Builder::new(&mut source, entry);
6730 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
6731 build.br_if(cond, then, &[], join, &[args[1]]);
6732 Builder::new(&mut source, then).jump(join, &[args[0]]);
6733 let mut build = Builder::new(&mut source, join);
6734 let twice = build.binary(Opcode::Add, got, got, Flags::default());
6735 build.ret(&[twice]);
6736
6737 // The else arm is critical: the entry block leaves two ways and the join is arrived at
6738 // two ways, and the arm carries a value. Without splitting it the allocator asserts,
6739 // because the move that gives the join its parameter would have to run at the end of a
6740 // block that also goes to the other arm.
6741 let mut out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6742 .expect("every instruction has a rule")
6743 .func;
6744 assert_eq!(crate::split::critical(&mut out), 1);
6745 let env = env();
6746 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
6747 let frame = Frame::of(&out, &allocation, &Layout::new(&SYSV, REGS));
6748 finish(
6749 &mut out,
6750 &allocation,
6751 &frame,
6752 &Stack::default(),
6753 Convention::new(&SYSV, &FRAME),
6754 &mut names,
6755 );
6756
6757 // The block the split added is where the move went, and it is the whole of that block.
6758 let text = mir::print_func(&out, &names, ®S);
6759 assert_eq!(out.block_count(), 4, "{text}");
6760 assert_eq!(text.matches("x64.ret\n").count(), 1, "{text}");
6761 }
6762
6763 #[test]
6764 fn a_call_passes_what_the_convention_says_and_takes_back_what_it_says() {
6765 let i32 = Type::int(32);
6766 let (mut names, mut source, block, args) = blank(&[i32, i32]);
6767 let sig =
6768 source.add_signature(Signature::new().with_params(&[i32, i32]).with_returns(&[i32]));
6769 let callee = names.intern("g");
6770 let call = Builder::new(&mut source, block).call(callee, sig, &[args[0], args[1]]);
6771 let got = source[call].first_result.expect("an integer comes back");
6772 Builder::new(&mut source, block).ret(&[got]);
6773
6774 // `int f(int a, int b) { return g(a, b); }`. The arguments arrived where the call wants
6775 // them, so what the call reads is what arrived, and the whole of the convention is in the
6776 // constraints rather than in a move.
6777 let text = lower(&mut names, &source);
6778 assert!(text.contains("= x64.call %0($rdi), %1($rsi), @g"), "{text}");
6779 assert!(text.contains("x64.ret_val_32 %2($rax)"), "{text}");
6780 // What the call writes is the value that comes back and then every register the callee is
6781 // free to destroy, in both classes, which is the whole of what stops the allocator from
6782 // leaving something in one of them.
6783 assert!(text.contains("%2:gpr($rax), $rcx, $rdx, $r8, $r9, $r10, $r11, $xmm0,"), "{text}");
6784 assert!(text.contains("$xmm15 = x64.call"), "{text}");
6785 }
6786
6787 #[test]
6788 fn what_the_frame_owes_a_call_comes_back_with_the_function() {
6789 let i32 = Type::int(32);
6790 let sig = |source: &mut Func| source.add_signature(Signature::new().with_params(&[i32]));
6791
6792 let (mut names, mut source, block, args) = blank(&[i32]);
6793 let sig = sig(&mut source);
6794 let callee = names.intern("g");
6795 Builder::new(&mut source, block).call(callee, sig, &[args[0]]);
6796 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6797 .expect("every instruction has a rule");
6798
6799 // Nothing on the stack, so nothing owed, but not a leaf either: a function that calls
6800 // owes the callee an aligned stack pointer and may not use the red zone.
6801 assert_eq!(out.stack.calls, Some(0));
6802 let layout = out.stack.layout(Layout::new(&SYSV, REGS));
6803 assert!(!layout.leaf);
6804 assert_eq!(layout.outgoing, 0);
6805
6806 // The same call under the other convention owes thirty two bytes for the callee to spill
6807 // its register arguments into, which is a fact about the convention and not about the call.
6808 let out = func(&source, &mut names, &SELECTOR, &x86_64::WIN64, &Elsewhere::default())
6809 .expect("every instruction has a rule");
6810 assert_eq!(out.stack.calls, Some(32));
6811
6812 // And a function that calls nothing is a leaf, which is what says it may use the red zone.
6813 let (mut names, mut source, block, args) = blank(&[i32]);
6814 Builder::new(&mut source, block).ret(&[args[0]]);
6815 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6816 .expect("every instruction has a rule");
6817 assert_eq!(out.stack.calls, None);
6818 assert!(out.stack.layout(Layout::new(&SYSV, REGS)).leaf);
6819 }
6820
6821 /// A Windows variadic prologue writes the argument registers the signature did not name into
6822 /// the shadow space the caller already reserved, which makes every argument one run of words up
6823 /// there and a `va_start` the address of the first of them. One `lea` and one store, and no
6824 /// counts, because a list that is a pointer has nowhere to put one and nothing that reads one.
6825 #[test]
6826 fn a_windows_variadic_function_homes_its_spare_registers_in_the_callers_area() {
6827 let mut names = Interner::new();
6828 let params = [Type::int(32), Type::PTR];
6829 let signature = Signature::new().with_params(¶ms).variadic();
6830 let mut source = Func::new(names.intern("f"), signature);
6831 let block = source.create_block();
6832 let values: Vec<Value> = params.iter().map(|&ty| source.append_param(block, ty)).collect();
6833 let mut build = Builder::new(&mut source, block);
6834 let args = build.func().push_values(&values[1..]);
6835 build.inst(InstData { args, ..InstData::new(Opcode::VaStart) }, &[]);
6836 build.ret(&[]);
6837
6838 let out = func(&source, &mut names, &SELECTOR, &x86_64::WIN64, &Elsewhere::default())
6839 .expect("every instruction has a rule");
6840 let text = mir::print_func(&out.func, &names, ®S);
6841
6842 // Two named parameters, so the registers at the next two positions hold arguments nobody
6843 // named and both are written up into the caller's area. The displacement is empty here and
6844 // `finish` fills it in, the same way it does for a parameter the registers ran out before.
6845 assert!(text.contains("($r8) = x64.arg_val_64"), "{text}");
6846 assert!(text.contains("($r9) = x64.arg_val_64"), "{text}");
6847 assert_eq!(text.matches("x64.mov_mr_64").count(), 3, "two homed and one stored: {text}");
6848 assert!(!text.contains("x64.mov_ri_32"), "and no field holds a count: {text}");
6849
6850 // All three waiting on the same fixup, and the last of them is the `lea` the list is given,
6851 // sixteen bytes up, which is where the two arguments the signature does name stopped.
6852 assert_eq!(out.stack.arguments.len(), 3);
6853 assert_eq!(out.stack.arguments[2].1, 16);
6854 }
6855
6856 #[test]
6857 fn a_value_that_outlives_a_call_is_not_left_where_the_call_destroys_it() {
6858 let i32 = Type::int(32);
6859 let (mut names, mut source, block, args) = blank(&[i32]);
6860 let sig = source.add_signature(Signature::new().with_params(&[i32]).with_returns(&[i32]));
6861 let callee = names.intern("g");
6862 let call = Builder::new(&mut source, block).call(callee, sig, &[args[0]]);
6863 let got = source[call].first_result.expect("an integer comes back");
6864 let mut build = Builder::new(&mut source, block);
6865 let sum = build.binary(Opcode::Add, got, args[0], Flags::default());
6866 build.ret(&[sum]);
6867
6868 // `int f(int a) { return g(a) + a; }`, which is the smallest program that asks the
6869 // question: `a` is read after the call and `rdi` is a register the call destroys.
6870 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6871 .expect("every instruction has a rule");
6872 let layout = lowered.stack.layout(Layout::new(&SYSV, REGS));
6873 let mut out = lowered.func;
6874 let env = env();
6875 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
6876 let frame = Frame::of(&out, &allocation, &layout);
6877 finish(
6878 &mut out,
6879 &allocation,
6880 &frame,
6881 &Stack::default(),
6882 Convention::new(&SYSV, &FRAME),
6883 &mut names,
6884 );
6885
6886 // It went to a register the callee has to put back, and the prologue and epilogue are what
6887 // put it back, which is the whole bargain the two halves of a convention make.
6888 let text = mir::print_func(&out, &names, ®S);
6889 assert!(text.contains("$rbx"), "{text}");
6890 assert!(!text.contains('%'), "{text}");
6891 assert_eq!(text.matches("x64.call").count(), 1, "{text}");
6892 }
6893
6894 #[test]
6895 fn a_call_with_more_arguments_than_registers_writes_the_rest_into_the_outgoing_area() {
6896 let i64 = Type::int(64);
6897 let (mut names, mut source, block, args) = blank(&[i64]);
6898 let seven = vec![i64; 7];
6899 let sig = source.add_signature(Signature::new().with_params(&seven));
6900 let callee = names.intern("g");
6901 let passed = vec![args[0]; 7];
6902 Builder::new(&mut source, block).call(callee, sig, &passed);
6903
6904 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6905 .expect("the seventh goes to memory");
6906 // The bytes the call needs are on the layout the frame is worked out from, so that the
6907 // frame reserves as many as the widest call in the function asked for.
6908 assert_eq!(lowered.stack.calls, Some(8));
6909 let text = mir::print_func(&lowered.func, &names, ®S);
6910 assert!(text.contains("x64.mov_mr_64 %0, [$rsp]\n"), "{text}");
6911 }
6912
6913 #[test]
6914 fn a_call_this_cannot_make_is_reported_rather_than_made() {
6915 let (mut names, mut source, block, _) = blank(&[]);
6916 let returns = [Type::float(rucc_ir::Float::F80), Type::int(64)];
6917 let sig = source.add_signature(Signature::new().with_returns(&returns));
6918 let callee = names.intern("g");
6919 Builder::new(&mut source, block).call(callee, sig, &[]);
6920 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6921 .expect_err("a long double is on the x87");
6922 assert_eq!(failed.to_string(), "what this call gives back is on the x87 stack");
6923 }
6924
6925 /// A `long double` on its own is a different answer, because on its own it comes back on the
6926 /// x87 stack rather than in a register, which is somewhere the call cannot be said to write.
6927 ///
6928 /// So the call gives back nothing at all and the value is taken off the stack by the `fstp`
6929 /// straight after it. That instruction has to be straight after it: the stack is one place and
6930 /// anything else that touched it before this ran would be looking at the value still on it.
6931 #[test]
6932 fn a_call_that_gives_back_a_long_double_takes_it_off_the_stack_at_once() {
6933 let (mut names, mut source, block, _) = blank(&[]);
6934 let long_double = Type::float(rucc_ir::Float::F80);
6935 let sig = source.add_signature(Signature::new().with_returns(&[long_double]));
6936 let callee = names.intern("g");
6937 Builder::new(&mut source, block).call(callee, sig, &[]);
6938
6939 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6940 .expect("the value comes back in st0");
6941 let text = mir::print_func(&lowered.func, &names, ®S);
6942 let after: Vec<&str> =
6943 text.lines().skip_while(|line| !line.contains("x64.call")).skip(1).collect();
6944 assert_eq!(after[0].trim(), "%0:gpr = x64.lea_64 [$rsp]", "{text}");
6945 assert_eq!(after[1].trim(), "x64.fstp_t [%0]", "{text}");
6946 // And the slot it went into is the sixteen bytes the type takes, like every other one.
6947 assert_eq!(lowered.stack.locals.len(), 1, "{text}");
6948 assert_eq!(lowered.stack.locals[0].size, X87_BYTES);
6949 }
6950
6951 #[test]
6952 fn a_call_through_an_address_goes_through_the_register_the_address_is_in() {
6953 let i32 = Type::int(32);
6954 let (mut names, mut source, block, args) = blank(&[Type::PTR, i32]);
6955 let sig = source.add_signature(Signature::new().with_params(&[i32]).with_returns(&[i32]));
6956 let varargs = source.push_abis(&[]);
6957 let info = source.add_call(CallInfo { callee: None, signature: sig, varargs });
6958 let mut build = Builder::new(&mut source, block);
6959 let inst = InstData {
6960 args: build.func().push_values(&[args[0], args[1]]),
6961 extra: Extra::Call(info),
6962 ..InstData::new(Opcode::CallIndirect)
6963 };
6964 let called = build.inst(inst, &[i32]);
6965 let got = source[called].first_result.expect("an integer comes back");
6966 Builder::new(&mut source, block).ret(&[got]);
6967
6968 // `int f(int (*g)(int), int a) { return g(a); }`. The first operand is the address and
6969 // the arguments are the ones behind it, and everything else about the call is what a call
6970 // to a name would have been.
6971 let text = lower(&mut names, &source);
6972 assert!(text.contains("= x64.call_reg %0, %1($rdi)"), "{text}");
6973 assert!(text.contains("x64.ret_val_32 %2($rax)"), "{text}");
6974 assert!(!text.contains("@g"), "a call through an address names nobody: {text}");
6975 }
6976
6977 #[test]
6978 fn an_instruction_no_rule_covers_is_reported() {
6979 let (mut names, mut source, block, args) = blank(&[Type::PTR]);
6980 let mut build = Builder::new(&mut source, block);
6981 let operands = build.func().push_values(&[args[0]]);
6982 build.inst(InstData { args: operands, ..InstData::new(Opcode::MetaBegin) }, &[]);
6983
6984 // The mark that an object has come into being, which nothing writes an instruction for
6985 // yet: what it needs is a write over a range of the lifetime plane, and that is
6986 // `tamnd/rucc#856`. Nothing about it is a width or a register, so there is nothing for the
6987 // message to add beyond the name.
6988 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
6989 .expect_err("no rule writes the beginning of a lifetime");
6990 assert_eq!(failed.to_string(), "no rule lowers a `meta_begin`");
6991
6992 // It produces nothing, so there is no type in the message and nothing invents one, and the
6993 // instruction comes back so a caller can ask the function where it was.
6994 let inst = failed.inst().expect("the instruction it is about");
6995 assert_eq!(source[inst].opcode, Opcode::MetaBegin);
6996 }
6997
6998 /// A barrier is written by name here, and what it is depends on the ordering and on nothing
6999 /// else. `crate::expand` is where the reasoning about this machine's memory model lives.
7000 #[test]
7001 fn a_barrier_is_one_instruction_at_the_strongest_ordering_and_none_below_it() {
7002 for order in MemOrder::all().filter(|&order| order != MemOrder::NotAtomic) {
7003 let (mut names, mut source, block, _) = blank(&[]);
7004 let mut build = Builder::new(&mut source, block);
7005 build
7006 .inst(InstData { extra: Extra::Order(order), ..InstData::new(Opcode::Fence) }, &[]);
7007
7008 let text = lower(&mut names, &source);
7009 assert_eq!(text.contains("x64.mfence"), order == MemOrder::SeqCst, "{order:?}: {text}");
7010 }
7011 }
7012
7013 /// A compare and exchange is written by name too, and at the width of the value rather than at
7014 /// the width of the address, which is the mistake worth pinning: everything here is a pointer
7015 /// and only the value says how many bytes the instruction touches.
7016 #[test]
7017 fn a_compare_and_exchange_is_one_instruction_at_the_width_of_the_value() {
7018 for bits in [8, 16, 32, 64] {
7019 let ty = Type::int(bits);
7020 let (mut names, mut source, block, args) = blank(&[Type::PTR, ty, ty]);
7021 let mut build = Builder::new(&mut source, block);
7022 let mem = build.func().add_mem(MemInfo {
7023 size: u64::from(bits / 8),
7024 align: bits / 8,
7025 order: MemOrder::SeqCst,
7026 ..plain()
7027 });
7028 let operands = build.func().push_values(&[args[0], args[1], args[2]]);
7029 build.inst(
7030 InstData {
7031 args: operands,
7032 extra: Extra::Mem(mem),
7033 ..InstData::new(Opcode::Cmpxchg)
7034 },
7035 &[ty, Type::I1],
7036 );
7037
7038 // Two values out of one instruction, the first of them in the register the machine
7039 // reads the expected value out of, the second free for the allocator to place. The
7040 // address is the memory operand and neither of the two values is.
7041 let text = lower(&mut names, &source);
7042 let written = format!("%3:gpr($rax), %4:gpr = x64.cmpxchg_{bits} %1($rax), %2, [%0]");
7043 assert!(text.contains(&written), "{bits}: {text}");
7044 }
7045 }
7046
7047 #[test]
7048 fn more_values_back_than_the_convention_has_registers_for_is_reported() {
7049 let i64 = Type::int(64);
7050 let (mut names, mut source, block, args) = blank(&[i64, i64, i64]);
7051 let mut build = Builder::new(&mut source, block);
7052 build.ret(&[args[0], args[1], args[2]]);
7053
7054 // Two integers come back in `rax` and `rdx` and a third has nowhere to go, which is not a
7055 // gap in the rules but the convention saying no. The front end classifies before it gets
7056 // here, so this is the shape that would mean the classification went wrong.
7057 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7058 .expect_err("only two come back");
7059 assert_eq!(
7060 failed.to_string(),
7061 "what this function gives back takes more registers than this convention has for it"
7062 );
7063
7064 let inst = failed.inst().expect("the instruction it is about");
7065 assert_eq!(source[inst].opcode, Opcode::Return);
7066 }
7067
7068 /// A refusal about a signature has no instruction, which is what makes it the one arm apart.
7069 ///
7070 /// Everything else is about something written somewhere in the body and hands it back so a
7071 /// caller can ask the function where it came from. A parameter arrives before the first
7072 /// instruction runs, so there is nothing in the body to point at and the message is about
7073 /// the function.
7074 #[test]
7075 fn a_refusal_about_a_parameter_has_no_instruction_to_point_at() {
7076 let missing = Unsupported::Argument { index: 0, missing: Missing::OnX87 };
7077 assert_eq!(missing.inst(), None);
7078 }
7079
7080 /// An `alloca` of a fixed size, which is what every local whose address is taken becomes.
7081 fn slot(source: &mut Func, block: Block, size: u64, align: u32) -> Value {
7082 let info = MemInfo { size, align, ..plain() };
7083 let mut build = Builder::new(source, block);
7084 let mem = build.func().add_mem(info);
7085 build.value(InstData { extra: Extra::Mem(mem), ..InstData::new(Opcode::Alloca) }, Type::PTR)
7086 }
7087
7088 #[test]
7089 fn a_local_is_memory_in_the_frame_and_one_instruction_that_says_where() {
7090 let (mut names, mut source, block, _) = blank(&[]);
7091 let slot = slot(&mut source, block, 4, 4);
7092 let mut build = Builder::new(&mut source, block);
7093 let nine = build.iconst(Type::int(32), 9);
7094 build.store(nine, slot, plain(), Flags::default());
7095 let loaded = build.load(Type::int(32), slot, plain(), Flags::default());
7096 build.ret(&[loaded]);
7097
7098 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7099 .expect("every instruction has a rule");
7100
7101 // Four bytes on the list the frame is laid out from, and the one instruction that reads
7102 // where they went. Its displacement is nothing here because there is no frame yet, and
7103 // which instruction is waiting for which local is what `finish` is handed.
7104 assert_eq!(lowered.stack.locals, vec![Local { size: 4, align: 4 }]);
7105 assert_eq!(lowered.stack.addresses.len(), 1);
7106 assert_eq!(lowered.stack.addresses[0].1, 0);
7107 assert_eq!(
7108 mir::print_func(&lowered.func, &names, ®S),
7109 "mfunc @f {\nblock0:\n %0:gpr = x64.lea_64 [$rsp]\n \
7110 %1:gpr = x64.mov_ri_32 9\n x64.mov_mr_32 %1, [%0]\n \
7111 %2:gpr = x64.mov_rm_32 [%0]\n x64.ret_val_32 %2($rax)\n}\n"
7112 );
7113 }
7114
7115 #[test]
7116 fn a_local_the_program_declared_says_which_declaration_it_is_and_the_rest_say_nothing() {
7117 let (mut names, mut source, block, _) = blank(&[]);
7118 let scratch = slot(&mut source, block, 4, 4);
7119 let mut build = Builder::new(&mut source, block);
7120 let mem = build.func().add_mem(MemInfo { size: 8, align: 8, ..plain() });
7121 let declared = build
7122 .value(InstData { extra: Extra::Mem(mem), ..InstData::new(Opcode::Alloca) }, Type::PTR);
7123 build.func().declare_mem(mem, 41);
7124 build.store(scratch, declared, MemInfo { size: 8, align: 8, ..plain() }, Flags::default());
7125 build.ret(&[]);
7126
7127 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7128 .expect("every instruction has a rule");
7129
7130 // Two locals and one declaration, held against the order the allocas were lowered in,
7131 // which is the only name a local has by the time the frame places it. The scratch one was
7132 // reached first and is local zero, so the declared one is local one.
7133 assert_eq!(lowered.stack.locals.len(), 2);
7134 assert_eq!(lowered.stack.declared, vec![(1, 41)]);
7135 }
7136
7137 /// A local the program kept in a value comes out saying which register holds it.
7138 ///
7139 /// The other half of the local above, which had a slot. This one has none, so what carries the
7140 /// declaration is the register the instruction computing it writes into.
7141 #[test]
7142 fn a_local_the_program_kept_in_a_value_says_which_register_holds_it() {
7143 let (mut names, mut source, block, _) = blank(&[]);
7144 let mut build = Builder::new(&mut source, block);
7145 let nine = build.iconst(Type::int(32), 9);
7146 let ten = build.iconst(Type::int(32), 10);
7147 let sum = build.binary(Opcode::Add, nine, ten, Flags::default());
7148 build.func().declare_value(sum, 41);
7149 build.ret(&[sum]);
7150
7151 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7152 .expect("every instruction has a rule");
7153
7154 // One pair and not three. The constants are values the program never declared, and a
7155 // register holding one of those is nobody's. The register is the one the addition writes,
7156 // which the listing under it is what pins down.
7157 assert_eq!(lowered.func.named, vec![(41, mir::Reg::virtual_reg(1))]);
7158 assert_eq!(
7159 mir::print_func(&lowered.func, &names, ®S),
7160 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_ri_32 9\n \
7161 %1:gpr(reuse 1) = x64.add_ri_32 %0, 10\n x64.ret_val_32 %1($rax)\n}\n"
7162 );
7163 }
7164
7165 /// A local held in a constant two blocks want is two registers and both of them are it.
7166 ///
7167 /// Why the declaration is written down as each register is handed out rather than once at the
7168 /// end over the map from values to registers. That map remembers the last register a value was
7169 /// written into, and a constant is written again in every block that wants one, so a local held
7170 /// in one would come out findable in the last block of the function and nowhere else.
7171 #[test]
7172 fn a_local_held_in_a_constant_two_blocks_want_is_named_in_both_of_them() {
7173 let i32 = Type::int(32);
7174 let (mut names, mut source, entry, args) = blank(&[i32, i32]);
7175 let then = source.create_block();
7176 let other = source.create_block();
7177 let join = source.create_block();
7178 let got = source.append_param(join, i32);
7179
7180 let mut build = Builder::new(&mut source, entry);
7181 let seven = build.iconst(i32, 7);
7182 let cond = build.icmp(rucc_ir::IntPred::Slt, args[0], args[1]);
7183 build.func().declare_value(seven, 41);
7184 build.br_if(cond, then, &[], other, &[]);
7185 Builder::new(&mut source, then).jump(join, &[seven]);
7186 Builder::new(&mut source, other).jump(join, &[seven]);
7187 Builder::new(&mut source, join).ret(&[got]);
7188
7189 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7190 .expect("every instruction has a rule");
7191
7192 let held = &lowered.func.named;
7193 assert_eq!(held.len(), 2, "one register per block that wanted the seven: {held:?}");
7194 assert!(held.iter().all(|&(decl, _)| decl == 41), "{held:?}");
7195 assert_ne!(held[0].1, held[1].1, "the same register in two blocks: {held:?}");
7196 }
7197
7198 /// A parameter the program declared comes out named too, in the register it arrived in.
7199 ///
7200 /// The case the walk over the map at the end is for. A parameter is put in a register the
7201 /// convention chose rather than in a fresh one, so nothing asks the mint for it and the pair
7202 /// would otherwise never be written down.
7203 #[test]
7204 fn a_parameter_the_program_declared_says_which_register_it_arrived_in() {
7205 let i32 = Type::int(32);
7206 let (mut names, mut source, block, args) = blank(&[i32]);
7207 let mut build = Builder::new(&mut source, block);
7208 build.func().declare_value(args[0], 41);
7209 build.ret(&[args[0]]);
7210
7211 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7212 .expect("every instruction has a rule");
7213
7214 let held = &lowered.func.named;
7215 assert_eq!(held.len(), 1, "one pair for the one parameter: {held:?}");
7216 assert_eq!(held[0].0, 41);
7217 }
7218
7219 /// A function with nothing declared in it says nothing, which is every function compiled
7220 /// without debugging information asked for.
7221 #[test]
7222 fn a_function_the_front_end_named_nothing_in_names_no_registers() {
7223 let (mut names, mut source, block, _) = blank(&[]);
7224 let mut build = Builder::new(&mut source, block);
7225 let nine = build.iconst(Type::int(32), 9);
7226 build.ret(&[nine]);
7227
7228 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7229 .expect("every instruction has a rule");
7230 assert!(lowered.func.named.is_empty(), "{:?}", lowered.func.named);
7231 }
7232
7233 #[test]
7234 fn the_frame_is_what_fills_the_address_of_a_local_in() {
7235 let (mut names, mut source, block, _) = blank(&[]);
7236 let slot = slot(&mut source, block, 4, 4);
7237 let mut build = Builder::new(&mut source, block);
7238 let nine = build.iconst(Type::int(32), 9);
7239 build.store(nine, slot, plain(), Flags::default());
7240 let loaded = build.load(Type::int(32), slot, plain(), Flags::default());
7241 build.ret(&[loaded]);
7242
7243 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7244 .expect("every instruction has a rule");
7245 let stack = lowered.stack;
7246 let mut out = lowered.func;
7247 let env = env();
7248 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
7249 let layout = stack.layout(Layout::new(&SYSV, REGS));
7250 let frame = Frame::of(&out, &allocation, &layout);
7251 finish(&mut out, &allocation, &frame, &stack, Convention::new(&SYSV, &FRAME), &mut names);
7252
7253 // `int f(void) { int x; x = 9; return x; }` with the address of `x` taken, end to end.
7254 // A leaf small enough to live in the red zone takes no frame at all, so the stack pointer
7255 // never moves and the four bytes are below it, which is what the negative offset is. The
7256 // instruction the lowering left with nothing in its displacement now has the answer in it.
7257 let text = mir::print_func(&out, &names, ®S);
7258 assert!(text.contains("$rax = x64.lea_64 [$rsp - 8]"), "{text}");
7259 assert!(!text.contains("x64.sub_ri_64"), "{text}");
7260 assert_eq!(frame.size(), 0);
7261 assert_eq!(frame.local(0), Some(-8));
7262 }
7263
7264 /// An `alloca` whose size is an operand, which is a variable length array.
7265 fn growing(source: &mut Func, block: Block, size: Value, align: u32) -> Value {
7266 let info = MemInfo { size: 0, align, ..plain() };
7267 let mut build = Builder::new(source, block);
7268 let mem = build.func().add_mem(info);
7269 let args = build.func().push_values(&[size]);
7270 build.value(
7271 InstData { args, extra: Extra::Mem(mem), ..InstData::new(Opcode::Alloca) },
7272 Type::PTR,
7273 )
7274 }
7275
7276 #[test]
7277 fn a_stack_slot_whose_size_is_not_known_until_it_runs_takes_the_bytes_off_the_stack_pointer() {
7278 let (mut names, mut source, block, args) = blank(&[Type::int(64)]);
7279 let slot = growing(&mut source, block, args[0], 16);
7280 Builder::new(&mut source, block).ret(&[slot]);
7281
7282 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7283 .expect("every instruction has a rule");
7284
7285 // The bytes come off the stack pointer where the declaration stands and the address is
7286 // where the stack pointer then is, which is one subtraction and one `lea` rather than a
7287 // slot the frame laid out. Nothing is on the list of locals, because there is nothing
7288 // about this the frame could place.
7289 let text = mir::print_func(&lowered.func, &names, ®S);
7290 assert!(text.contains("$rsp = x64.sub_rr_64 $rsp, %0"), "{text}");
7291 assert!(text.contains("x64.lea_64 [$rsp]"), "{text}");
7292 assert!(lowered.stack.locals.is_empty(), "{text}");
7293 assert_eq!(lowered.stack.dynamic.len(), 1);
7294 assert!(lowered.stack.grown_at.is_some());
7295 }
7296
7297 #[test]
7298 fn a_growing_slot_wanting_more_alignment_than_the_stack_pointer_has_is_reported() {
7299 let (mut names, mut source, block, args) = blank(&[Type::int(64)]);
7300 let slot = growing(&mut source, block, args[0], 32);
7301 Builder::new(&mut source, block).ret(&[slot]);
7302
7303 // Thirty two is more than a call leaves the stack pointer on, so giving it what it asked
7304 // for means masking the stack pointer after moving it, and after that no constant reaches
7305 // the rest of the frame from the frame pointer either. A second pointer held for the
7306 // purpose is what fixes it and there is not one yet.
7307 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7308 .expect_err("nothing realigns a frame that grows");
7309 assert_eq!(
7310 failed.to_string(),
7311 "this local wants more alignment than the stack pointer is left on, which needs a \
7312 base register nothing here keeps"
7313 );
7314 }
7315
7316 #[test]
7317 fn a_frame_that_grows_reaches_its_own_locals_through_the_frame_pointer() {
7318 let (mut names, mut source, block, args) = blank(&[Type::int(64)]);
7319 let fixed = slot(&mut source, block, 4, 4);
7320 let mut build = Builder::new(&mut source, block);
7321 let nine = build.iconst(Type::int(32), 9);
7322 build.store(nine, fixed, plain(), Flags::default());
7323 let grown = growing(&mut source, block, args[0], 16);
7324 Builder::new(&mut source, block).ret(&[grown]);
7325
7326 let lowered = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7327 .expect("every instruction has a rule");
7328 let stack = lowered.stack;
7329 let mut out = lowered.func;
7330 let env = env();
7331 let allocation = rucc_regalloc::run(&mut out, &env, "test", true);
7332 let layout = stack.layout(Layout::new(&SYSV, REGS));
7333 let frame = Frame::of(&out, &allocation, &layout);
7334 finish(&mut out, &allocation, &frame, &stack, Convention::new(&SYSV, &FRAME), &mut names);
7335
7336 // The stack pointer moves in the middle of the function, so the four bytes of the fixed
7337 // local are not a constant away from it any more and the frame pointer is what reaches
7338 // them. The frame keeps one whatever the flags asked for, takes its bytes rather than
7339 // living in the red zone, and the address of the growing slot is off the stack pointer as
7340 // it stands after the subtraction rather than off anything the prologue left.
7341 let text = mir::print_func(&out, &names, ®S);
7342 assert!(frame.grows());
7343 assert!(frame.frame_pointer());
7344 assert!(frame.size() > 0, "{text}");
7345 assert!(text.contains("x64.lea_64 [$rbp"), "{text}");
7346 assert!(text.contains("$rsp = x64.sub_rr_64 $rsp"), "{text}");
7347 assert!(text.contains("x64.lea_64 [$rsp]"), "{text}");
7348 }
7349
7350 #[test]
7351 fn an_address_is_read_written_and_added_to_like_the_integer_it_is() {
7352 let (mut names, mut source, block, args) = blank(&[Type::PTR, Type::int(64)]);
7353 let mut build = Builder::new(&mut source, block);
7354 let stepped = build.func().push_values(&[args[0], args[1]]);
7355 let next =
7356 build.value(InstData { args: stepped, ..InstData::new(Opcode::PtrAdd) }, Type::PTR);
7357 let loaded = build.load(Type::int(32), next, plain(), Flags::default());
7358 build.ret(&[loaded]);
7359
7360 // `int f(int *p, long i) { return *(int *)((char *)p + i); }`. Nothing about this is new
7361 // in the rule set, which is the point: the two addresses arrive in registers because an
7362 // address is an integer as wide as one, and the arithmetic on them is the add it always
7363 // was, so every rule written about an add reaches it.
7364 //
7365 // The add stays its own instruction here rather than folding into the address the load
7366 // reads from. Two registers with no scale on either is the one addressing mode the rules
7367 // have no load through, because the folds that exist are the displacement one and the
7368 // scaled ones, and this is neither. `crate::fold` is what puts the two together, after
7369 // selection, and this is the pair it is handed.
7370 assert_eq!(
7371 lower(&mut names, &source),
7372 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
7373 %1:gpr($rsi) = x64.arg_val_64\n %2:gpr(reuse 1) = x64.add_rr_64 %0, %1\n \
7374 %3:gpr = x64.mov_rm_32 [%2]\n x64.ret_val_32 %3($rax)\n}\n"
7375 );
7376 }
7377
7378 /// The address of a file scope name, which is what every use of a global and every string
7379 /// literal starts from.
7380 fn address_of(source: &mut Func, block: Block, names: &mut Interner, name: &str) -> Value {
7381 let symbol = names.intern(name);
7382 let mut build = Builder::new(source, block);
7383 build.value(
7384 InstData { extra: Extra::Symbol(symbol), ..InstData::new(Opcode::GlobalAddr) },
7385 Type::PTR,
7386 )
7387 }
7388
7389 #[test]
7390 fn the_address_of_a_name_is_one_instruction_carrying_the_name() {
7391 let (mut names, mut source, block, _) = blank(&[]);
7392 let counter = address_of(&mut source, block, &mut names, "counter");
7393 let mut build = Builder::new(&mut source, block);
7394 let loaded = build.load(Type::int(32), counter, plain(), Flags::default());
7395 build.ret(&[loaded]);
7396
7397 // `extern int counter; int f(void) { return counter; }`. The address is an addressing mode
7398 // that names no register and carries the symbol, which is what the assembler writes
7399 // relative to `%rip` and what the object writer leaves a relocation for.
7400 assert_eq!(
7401 lower(&mut names, &source),
7402 "mfunc @f {\nblock0:\n %0:gpr = x64.lea_64 [@counter]\n \
7403 %1:gpr = x64.mov_rm_32 [%0]\n x64.ret_val_32 %1($rax)\n}\n"
7404 );
7405 }
7406
7407 #[test]
7408 fn the_address_of_a_name_outside_the_file_is_read_out_of_the_offset_table() {
7409 let (mut names, mut source, block, _) = blank(&[]);
7410 let away = address_of(&mut source, block, &mut names, "away");
7411 Builder::new(&mut source, block).ret(&[away]);
7412 let elsewhere: Elsewhere = [names.intern("away")].into_iter().collect();
7413
7414 // `extern void away(void); void *f(void) { return away; }`. A load and not an address
7415 // computation, because the distance from here to a name a shared library may be the one
7416 // that defines is not a number any link can work out, and the slot the linker fills in is
7417 // in this program and so is a distance it has.
7418 let out = func(&source, &mut names, &SELECTOR, &SYSV, &elsewhere)
7419 .expect("every instruction has a rule");
7420 assert_eq!(
7421 mir::print_func(&out.func, &names, ®S),
7422 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_rm_64 [got @away]\n \
7423 x64.ret_val_64 %0($rax)\n}\n"
7424 );
7425 }
7426
7427 #[test]
7428 fn the_address_of_a_thread_local_is_an_offset_out_of_the_table_plus_where_this_thread_starts() {
7429 let (mut names, mut source, block, _) = blank(&[]);
7430 let own = address_of(&mut source, block, &mut names, "own");
7431 Builder::new(&mut source, block).ret(&[own]);
7432 let elsewhere = Elsewhere::default().with_threads([names.intern("own")]);
7433
7434 // `extern _Thread_local int own; void *f(void) { return &own; }`. Three instructions where
7435 // the two cases above are one, because there is no address to load or to work out: the
7436 // slot holds how far into a thread's block the variable sits, `%fs:0` is where this
7437 // thread's block starts, and the sum of the two is this thread's copy.
7438 let out = func(&source, &mut names, &SELECTOR, &SYSV, &elsewhere)
7439 .expect("every instruction has a rule");
7440 assert_eq!(
7441 mir::print_func(&out.func, &names, ®S),
7442 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_rm_64 [thread @own]\n \
7443 %1:gpr = x64.mov_rm_64 [fs:0]\n %2:gpr(reuse 1) = x64.add_rr_64 %0, %1\n \
7444 x64.ret_val_64 %2($rax)\n}\n"
7445 );
7446 }
7447
7448 /// The same load with nothing added to it, which is the whole of `__builtin_thread_pointer`.
7449 #[test]
7450 fn the_start_of_this_thread_s_own_storage_is_the_one_load_and_no_arithmetic() {
7451 let (mut names, mut source, block, _) = blank(&[]);
7452 let here =
7453 Builder::new(&mut source, block).value(InstData::new(Opcode::ThreadPointer), Type::PTR);
7454 Builder::new(&mut source, block).ret(&[here]);
7455
7456 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7457 .expect("every instruction has a rule");
7458 assert_eq!(
7459 mir::print_func(&out.func, &names, ®S),
7460 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_rm_64 [fs:0]\n \
7461 x64.ret_val_64 %0($rax)\n}\n"
7462 );
7463 }
7464
7465 /// One `asm` statement, with its template and its constraint list written as a program does.
7466 fn assembly(
7467 source: &mut Func,
7468 block: Block,
7469 names: &mut Interner,
7470 template: &str,
7471 constraints: &str,
7472 args: &[Value],
7473 results: &[Type],
7474 ) -> Inst {
7475 clobbering(source, block, names, template, constraints, "memory", args, results)
7476 }
7477
7478 /// The same with a clobber list of its own, for the statements that are about one.
7479 #[allow(clippy::too_many_arguments)]
7480 fn clobbering(
7481 source: &mut Func,
7482 block: Block,
7483 names: &mut Interner,
7484 template: &str,
7485 constraints: &str,
7486 clobbers: &str,
7487 args: &[Value],
7488 results: &[Type],
7489 ) -> Inst {
7490 let info = AsmInfo {
7491 template: names.intern(template),
7492 constraints: names.intern(constraints),
7493 clobbers: names.intern(clobbers),
7494 targets: rucc_ir::BlockCallList::EMPTY,
7495 };
7496 Builder::new(source, block).inline_asm(info, args, results, Flags::VOLATILE)
7497 }
7498
7499 /// What a program asking the processor what it can do writes, which is the instruction whose
7500 /// every operand is a register its text does not name.
7501 #[test]
7502 fn a_template_whose_registers_are_named_by_the_constraints_places_them_from_the_letters() {
7503 let u32 = Type::int(32);
7504 let (mut names, mut source, block, _) = blank(&[]);
7505 let zero = Builder::new(&mut source, block).iconst(u32, 0);
7506 let out = clobbering(
7507 &mut source,
7508 block,
7509 &mut names,
7510 "cpuid",
7511 "=a,a",
7512 "ebx,ecx,edx",
7513 &[zero],
7514 &[u32],
7515 );
7516 let produced = source[out].results().next().expect("one result");
7517 Builder::new(&mut source, block).ret(&[produced]);
7518
7519 // `asm ("cpuid" : "=a" (n) : "a" (0) : "ebx", "ecx", "edx")`, which is the first thing
7520 // every program that has a faster path on some machines writes. Four registers written and
7521 // two read, none of them in the template, all of them out of the description, and the two
7522 // that the letters named are the statement's own. The subleaf is a zero because the
7523 // instruction reads `ecx` and the program said nothing about what is in it. The three
7524 // clobbers are gone because `cpuid` writes those three anyway, and saying it twice is one
7525 // register with two definitions.
7526 assert_eq!(
7527 lower(&mut names, &source),
7528 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_ri_32 0\n \
7529 %1:gpr = x64.mov_ri_64 0\n \
7530 %2:gpr($rax), %3:gpr($rbx), %4:gpr($rcx), %5:gpr($rdx) = x64.cpuid %0($rax), \
7531 %1($rcx)\n x64.ret_val_32 %2($rax)\n}\n"
7532 );
7533 }
7534
7535 /// An operand the program pinned, by declaring the object it comes from `register long x asm
7536 /// ("r12")`. The letter on its own leaves the allocator to pick, and a template that reads the
7537 /// register by name needs the two to be the same register, so the brace is what ties them
7538 /// together. That is the one use of a local register variable the GNU manual calls reliable,
7539 /// and it is what tcc's `tests/tcctest.c` counts on.
7540 #[test]
7541 fn an_operand_the_program_pinned_is_placed_in_the_register_it_named() {
7542 let u64 = Type::int(64);
7543 let (mut names, mut source, block, _) = blank(&[]);
7544 let out =
7545 assembly(&mut source, block, &mut names, "mov $0x4542, %r12", "=r{r12}", &[], &[u64]);
7546 let produced = source[out].results().next().expect("one result");
7547 Builder::new(&mut source, block).ret(&[produced]);
7548
7549 // The template is one instruction the table already has, so it lowers to that instruction
7550 // rather than to text nobody read, and the register it names is the statement's own output
7551 // because the brace put the output there. Without the brace the letter would have let the
7552 // allocator pick, the two `%r12` would have been different registers, and the program would
7553 // have come back with whatever was in the one it picked.
7554 assert_eq!(
7555 lower(&mut names, &source),
7556 "mfunc @f {\nblock0:\n %0:gpr($r12) = x64.mov_ri_64 17730\n \
7557 x64.ret_val_64 %0($rax)\n}\n"
7558 );
7559 }
7560
7561 /// A clobber the instruction does not write itself, which is the case the list is there for.
7562 /// It goes on as a definition of the register, in among the other definitions, because that is
7563 /// the whole of how a machine function says a register is not worth anything after this.
7564 #[test]
7565 fn a_clobber_the_instruction_does_not_write_itself_is_a_definition_of_that_register() {
7566 let (mut names, mut source, block, _) = blank(&[]);
7567 clobbering(&mut source, block, &mut names, "pause", "", "rsi,cc,memory", &[], &[]);
7568 Builder::new(&mut source, block).ret(&[]);
7569
7570 assert_eq!(lower(&mut names, &source), "mfunc @f {\nblock0:\n $rsi = x64.pause\n}\n");
7571 }
7572
7573 /// A clobber naming something this has no register for. Refused rather than dropped, since the
7574 /// list is the program saying which registers it may not leave anything in, and an entry
7575 /// nobody read is a register something may still be left in.
7576 #[test]
7577 fn a_clobber_this_has_no_register_for_is_refused() {
7578 let (mut names, mut source, block, _) = blank(&[]);
7579 clobbering(&mut source, block, &mut names, "pause", "", "zmm0", &[], &[]);
7580 Builder::new(&mut source, block).ret(&[]);
7581
7582 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7583 .expect_err("there is no such register here");
7584 assert_eq!(
7585 failed.to_string(),
7586 "this `asm` says it destroys a register this has no name for"
7587 );
7588 }
7589
7590 #[test]
7591 fn an_asm_with_an_empty_template_and_no_operands_is_no_instructions() {
7592 let (mut names, mut source, block, _) = blank(&[]);
7593 assembly(&mut source, block, &mut names, "", "", &[], &[]);
7594 Builder::new(&mut source, block).ret(&[]);
7595
7596 // `asm volatile ("" : : : "memory")`, which is a barrier and nothing else. The barrier was
7597 // spent on the optimizer, which has finished by now, so what is left is nothing.
7598 assert_eq!(lower(&mut names, &source), "mfunc @f {\nblock0:\n}\n");
7599 }
7600
7601 #[test]
7602 fn an_output_an_input_is_tied_to_is_the_register_that_input_arrived_in() {
7603 let i32 = Type::int(32);
7604 let (mut names, mut source, block, args) = blank(&[i32]);
7605 let out = assembly(&mut source, block, &mut names, "", "=r,0", &args, &[i32]);
7606 let produced = source[out].results().next().expect("one result");
7607 Builder::new(&mut source, block).ret(&[produced]);
7608
7609 // `asm ("" : "=r" (x) : "0" (x))`, which is how a program stops the optimizer following a
7610 // value without changing it. The two share a place and the template writes nothing over
7611 // it, so the value comes back out of the register it went in.
7612 assert_eq!(
7613 lower(&mut names, &source),
7614 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
7615 x64.ret_val_32 %0($rax)\n}\n"
7616 );
7617 }
7618
7619 #[test]
7620 fn an_output_written_plus_is_the_same_rename() {
7621 let i32 = Type::int(32);
7622 let (mut names, mut source, block, args) = blank(&[i32]);
7623 let out = assembly(&mut source, block, &mut names, "", "+r", &args, &[i32]);
7624 let produced = source[out].results().next().expect("one result");
7625 Builder::new(&mut source, block).ret(&[produced]);
7626
7627 // `asm ("" : "+r" (x))`, which says the same thing in one operand instead of two.
7628 assert_eq!(
7629 lower(&mut names, &source),
7630 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_32\n \
7631 x64.ret_val_32 %0($rax)\n}\n"
7632 );
7633 }
7634
7635 #[test]
7636 fn an_output_nothing_is_tied_to_is_a_zero() {
7637 let i32 = Type::int(32);
7638 let (mut names, mut source, block, _) = blank(&[]);
7639 let out = assembly(&mut source, block, &mut names, "", "=r", &[], &[i32]);
7640 let produced = source[out].results().next().expect("one result");
7641 Builder::new(&mut source, block).ret(&[produced]);
7642
7643 // `asm ("" : "=r" (y))`, whose answer is whatever the assembly left in the register, and
7644 // an empty template leaves nothing. A definite value rather than a register nothing wrote,
7645 // because the allocator is owed a definition before the use however little the program is.
7646 assert_eq!(
7647 lower(&mut names, &source),
7648 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_ri_32 0\n x64.ret_val_32 %0($rax)\n}\n"
7649 );
7650 }
7651
7652 #[test]
7653 fn a_template_that_is_one_instruction_becomes_that_instruction() {
7654 let (mut names, mut source, block, _) = blank(&[]);
7655 assembly(&mut source, block, &mut names, "pause", "", &[], &[]);
7656 Builder::new(&mut source, block).ret(&[]);
7657
7658 // `asm volatile ("pause")`, which is what every spin lock in every allocator writes. One
7659 // instruction, no operands, and nothing between the template and the machine but the table
7660 // that already says what a `pause` is.
7661 assert_eq!(lower(&mut names, &source), "mfunc @f {\nblock0:\n x64.pause\n}\n");
7662 }
7663
7664 #[test]
7665 fn a_template_that_reads_a_segment_becomes_the_load_it_already_was() {
7666 let i64 = Type::int(64);
7667 let (mut names, mut source, block, _) = blank(&[]);
7668 let out = assembly(&mut source, block, &mut names, "movq %%fs:0, %0", "=r", &[], &[i64]);
7669 let produced = source[out].results().next().expect("one result");
7670 Builder::new(&mut source, block).ret(&[produced]);
7671
7672 // `asm ("movq %%fs:0, %0" : "=r" (tid))`, which is how a program finds the block its own
7673 // thread owns. The same instruction `crate::lower` already writes for a thread-local
7674 // variable, reached this time because a program wrote it out by hand.
7675 assert_eq!(
7676 lower(&mut names, &source),
7677 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_rm_64 [fs:0]\n \
7678 x64.ret_val_64 %0($rax)\n}\n"
7679 );
7680 }
7681
7682 /// A template this cannot read is kept as its text, which is what gcc does with every template.
7683 /// Whether the text is an instruction is the assembler's question, asked when the unit is
7684 /// assembled from its listing.
7685 #[test]
7686 fn a_template_naming_an_instruction_this_machine_has_not_got_is_kept_as_text() {
7687 let (mut names, mut source, block, _) = blank(&[]);
7688 assembly(&mut source, block, &mut names, "hcf", "", &[], &[]);
7689 Builder::new(&mut source, block).ret(&[]);
7690
7691 let printed = lower(&mut names, &source);
7692 assert!(printed.contains("x64.template"), "{printed}");
7693 assert!(printed.contains("@hcf"), "{printed}");
7694 }
7695
7696 /// A template kept as text with an operand in a register reads the operand, and its text holds
7697 /// a hole naming that operand of the instruction, which the writer fills with the register the
7698 /// allocator chose. The input is the instruction's only use, behind every register a call may
7699 /// write.
7700 #[test]
7701 fn a_template_kept_as_text_reads_an_operand_in_a_register_through_a_hole() {
7702 let i32 = Type::int(32);
7703 let (mut names, mut source, block, args) = blank(&[i32]);
7704 assembly(&mut source, block, &mut names, "hcf %0", "r", &[args[0]], &[]);
7705 Builder::new(&mut source, block).ret(&[]);
7706
7707 let printed = lower(&mut names, &source);
7708 let line = printed.lines().find(|line| line.contains("x64.template")).unwrap_or_default();
7709 // Twenty five registers are written ahead of it, so the operand read is the twenty sixth,
7710 // spelled at the width of an `int`.
7711 assert!(line.contains("x64.template %0, @hcf \u{1}r25k\u{2}"), "{printed}");
7712 assert!(line.contains("early $rax"), "{printed}");
7713 }
7714
7715 /// A register the template named is placed as itself, fixed to the register the program wrote
7716 /// down. A register a constraint letter names is a different thing and is placed too, which the
7717 /// test above is about: there the statement said which of its own operands is in the register,
7718 /// and a name in the middle of a template says the register and nothing about any operand.
7719 #[test]
7720 fn a_template_naming_a_register_gets_that_register() {
7721 let i64 = Type::int(64);
7722 let (mut names, mut source, block, _) = blank(&[]);
7723 let out = assembly(&mut source, block, &mut names, "movq %%rax, %0", "=r", &[], &[i64]);
7724 let produced = source[out].results().next().expect("one result");
7725 Builder::new(&mut source, block).ret(&[produced]);
7726
7727 // `asm ("movq %%rax, %0" : "=r" (x))`, which is a program reading whatever is in `%rax`.
7728 // The source is the register itself and the destination is one the allocator picks.
7729 assert_eq!(
7730 lower(&mut names, &source),
7731 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_rr_64 $rax($rax)\n \
7732 x64.ret_val_64 %0($rax)\n}\n"
7733 );
7734 }
7735
7736 /// The half of the same thing every register saving template needs. micropython writes the
7737 /// callee-saved registers into a buffer one `movq %%r12, 48(%%rdi)` at a time, and both halves
7738 /// of that line are a register the template named: the one being stored and the one the address
7739 /// is counted from.
7740 #[test]
7741 fn a_template_counting_an_address_from_a_register_it_named_gets_that_register() {
7742 let (mut names, mut source, block, _) = blank(&[]);
7743 assembly(&mut source, block, &mut names, "movq %%r12, 48(%%rdi)", "", &[], &[]);
7744 Builder::new(&mut source, block).ret(&[]);
7745
7746 assert_eq!(
7747 lower(&mut names, &source),
7748 "mfunc @f {\nblock0:\n x64.mov_mr_64 $r12($r12), [$rdi + 48]\n}\n"
7749 );
7750 }
7751
7752 /// A local kept in a named register, which is the same register named as itself and reached
7753 /// from the other side. micropython's collector writes six of these and reads them with
7754 /// ordinary C rather than with a template.
7755 #[test]
7756 fn a_local_kept_in_a_named_register_is_one_move_out_of_it() {
7757 let (mut names, mut source, block, _) = blank(&[]);
7758 let held = names.intern("rbx");
7759 let value = Builder::new(&mut source, block).value(
7760 InstData { extra: Extra::Symbol(held), ..InstData::new(Opcode::RegisterValue) },
7761 Type::int(64),
7762 );
7763 Builder::new(&mut source, block).ret(&[value]);
7764
7765 assert_eq!(
7766 lower(&mut names, &source),
7767 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_rr_64 $rbx($rbx)\n \
7768 x64.ret_val_64 %0($rax)\n}\n"
7769 );
7770 }
7771
7772 /// The sigil gcc allows in front of the name is syntax and comes off, and a name that is not
7773 /// a register of this machine is refused in words that say which name it was.
7774 #[test]
7775 fn a_register_name_is_read_with_or_without_its_sigil_and_refused_when_there_is_no_such_one() {
7776 for written in ["%r12", "r12"] {
7777 let (mut names, mut source, block, _) = blank(&[]);
7778 let held = names.intern(written);
7779 let value = Builder::new(&mut source, block).value(
7780 InstData { extra: Extra::Symbol(held), ..InstData::new(Opcode::RegisterValue) },
7781 Type::int(64),
7782 );
7783 Builder::new(&mut source, block).ret(&[value]);
7784 assert!(lower(&mut names, &source).contains("$r12($r12)"), "{written} is not read");
7785 }
7786
7787 let (mut names, mut source, block, _) = blank(&[]);
7788 let held = names.intern("nowhere");
7789 let value = Builder::new(&mut source, block).value(
7790 InstData { extra: Extra::Symbol(held), ..InstData::new(Opcode::RegisterValue) },
7791 Type::int(64),
7792 );
7793 Builder::new(&mut source, block).ret(&[value]);
7794
7795 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7796 .expect_err("there is no such register");
7797 assert_eq!(
7798 failed.to_string(),
7799 "this object is kept in `nowhere`, which is not a register this machine has"
7800 );
7801 }
7802
7803 #[test]
7804 fn a_constraint_list_that_does_not_describe_the_operands_is_refused() {
7805 let i32 = Type::int(32);
7806 let (mut names, mut source, block, args) = blank(&[i32]);
7807 assembly(&mut source, block, &mut names, "", "=r", &args, &[]);
7808 Builder::new(&mut source, block).ret(&[]);
7809
7810 // An output with no result to be, which is what the front end never writes and what a
7811 // hand written module can. Refused rather than placed by a guess.
7812 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7813 .expect_err("the list and the instruction disagree");
7814 assert_eq!(failed.to_string(), "this `asm` has an operand this cannot place");
7815 }
7816
7817 /// A cast between a pointer and an integer, at whatever width the result is asked for.
7818 fn cast(source: &mut Func, block: Block, opcode: Opcode, from: Value, to: Type) -> Value {
7819 let mut build = Builder::new(source, block);
7820 let args = build.func().push_values(&[from]);
7821 build.value(InstData { args, ..InstData::new(opcode) }, to)
7822 }
7823
7824 #[test]
7825 fn a_cast_between_a_pointer_and_an_integer_as_wide_is_no_instruction_at_all() {
7826 let (mut names, mut source, block, args) = blank(&[Type::PTR]);
7827 let number = cast(&mut source, block, Opcode::PtrToInt, args[0], Type::int(64));
7828 Builder::new(&mut source, block).ret(&[number]);
7829
7830 // `long f(void *p) { return (long)p; }`. An address on this machine is an integer as wide
7831 // as the machine addresses, so the cast changes what the type system calls the value and
7832 // changes nothing about the value, and the register holding it is the one that held it.
7833 assert_eq!(
7834 lower(&mut names, &source),
7835 "mfunc @f {\nblock0:\n %0:gpr($rdi) = x64.arg_val_64\n \
7836 x64.ret_val_64 %0($rax)\n}\n"
7837 );
7838 }
7839
7840 #[test]
7841 fn a_null_pointer_is_a_constant_that_reaches_a_register_before_anything_reads_it() {
7842 let (mut names, mut source, block, _) = blank(&[]);
7843 let mut build = Builder::new(&mut source, block);
7844 let zero = build.iconst(Type::int(64), 0);
7845 let null = cast(&mut source, block, Opcode::IntToPtr, zero, Type::PTR);
7846 Builder::new(&mut source, block).ret(&[null]);
7847
7848 // `void *f(void) { return 0; }`. The cast is nothing, and reading its operand is what
7849 // writes the zero down: a constant is materialized where it is wanted rather than where
7850 // the IR defined it, and without the read there would be no instruction at all.
7851 assert_eq!(
7852 lower(&mut names, &source),
7853 "mfunc @f {\nblock0:\n %0:gpr = x64.mov_ri_64 0\n x64.ret_val_64 %0($rax)\n}\n"
7854 );
7855 }
7856
7857 #[test]
7858 fn the_five_linkages_the_ir_has_narrow_to_the_three_an_object_file_can_say() {
7859 let readings = [
7860 (Linkage::External, mir::Binding::Global),
7861 (Linkage::Common, mir::Binding::Global),
7862 (Linkage::Internal, mir::Binding::Local),
7863 (Linkage::Weak, mir::Binding::Weak),
7864 (Linkage::LinkOnce, mir::Binding::Weak),
7865 ];
7866 for (linkage, wanted) in readings {
7867 let (mut names, mut source, block, _) = blank(&[]);
7868 source.linkage = linkage;
7869 Builder::new(&mut source, block).ret(&[]);
7870 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7871 .expect("a return");
7872 // The narrowing is done here rather than where the object is written, because a
7873 // machine function is all the assembler and the writer are ever handed.
7874 assert_eq!(out.func.binding, wanted, "{linkage:?}");
7875 }
7876 }
7877
7878 /// The visibility makes the same trip and is not narrowed on the way, because ELF says all
7879 /// three of them.
7880 ///
7881 /// Here for the reason the linkage above is here. A machine function is the whole of what the
7882 /// assembler and the object writer are handed, so a fact about the symbol that does not get
7883 /// onto one is a fact that is gone by the time anything could write it down, and the way that
7884 /// shows up is a shared library exporting the wrong set of names with nothing said anywhere.
7885 #[test]
7886 fn the_visibility_survives_the_trip_from_the_ir_to_a_machine_function() {
7887 let readings = [
7888 (Visibility::Default, mir::Visibility::Default),
7889 (Visibility::Hidden, mir::Visibility::Hidden),
7890 (Visibility::Protected, mir::Visibility::Protected),
7891 ];
7892 for (visibility, wanted) in readings {
7893 let (mut names, mut source, block, _) = blank(&[]);
7894 source.visibility = visibility;
7895 Builder::new(&mut source, block).ret(&[]);
7896 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7897 .expect("a return");
7898 assert_eq!(out.func.visibility, wanted, "{visibility:?}");
7899 }
7900 }
7901
7902 #[test]
7903 fn a_cast_between_a_pointer_and_a_narrower_integer_is_reported() {
7904 let (mut names, mut source, block, args) = blank(&[Type::PTR]);
7905 let number = cast(&mut source, block, Opcode::PtrToInt, args[0], Type::int(32));
7906 Builder::new(&mut source, block).ret(&[number]);
7907
7908 // The front end never writes one: it casts at the address width and truncates or extends
7909 // around it, so both of those are the rules they always were. IR from somewhere else that
7910 // does write one is refused rather than compiled to a move that keeps the high half.
7911 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7912 .expect_err("no rule narrows an address");
7913 assert_eq!(failed.to_string(), "no rule lowers a `ptrtoint` producing a `i32`");
7914 }
7915
7916 /// The type this machine has no register for.
7917 fn long_double() -> Type {
7918 Type::float(rucc_ir::Float::F80)
7919 }
7920
7921 #[test]
7922 fn a_double_widened_and_narrowed_again_goes_out_through_the_frame_and_back() {
7923 let f64 = Type::float(rucc_ir::Float::F64);
7924 let (mut names, mut source, block, args) = blank(&[f64]);
7925 let wide = cast(&mut source, block, Opcode::FPExt, args[0], long_double());
7926 let back = cast(&mut source, block, Opcode::FPTrunc, wide, f64);
7927 Builder::new(&mut source, block).ret(&[back]);
7928
7929 // `double f(double d) { long double x = d; return x; }`. The x87 reads memory and nothing
7930 // else, so the value is written to the crossing slot, loaded at the format that widens it
7931 // and put in the slot the eighty bit value lives in. Coming back is the same three the
7932 // other way. Both slots are addressed by a `lea` with nothing in it yet, which is what
7933 // every address in a frame looks like here until `finish` has the numbers.
7934 assert_eq!(
7935 lower(&mut names, &source),
7936 "mfunc @f {\nblock0:\n \
7937 %0:xmm($xmm0) = x64.arg_val_f64\n \
7938 %1:gpr = x64.lea_64 [$rsp]\n \
7939 %2:gpr = x64.lea_64 [$rsp]\n \
7940 x64.movsd_mr %0, [%1]\n \
7941 x64.fld_l [%1]\n \
7942 x64.fstp_t [%2]\n \
7943 %3:gpr = x64.lea_64 [$rsp]\n \
7944 %4:gpr = x64.lea_64 [$rsp]\n \
7945 x64.fld_t [%3]\n \
7946 x64.fstp_l [%4]\n \
7947 %5:xmm = x64.movsd_rm [%4]\n \
7948 x64.ret_val_f64 %5($xmm0)\n}\n"
7949 );
7950 }
7951
7952 #[test]
7953 fn a_long_double_has_sixteen_bytes_of_its_own_and_keeps_them() {
7954 let f64 = Type::float(rucc_ir::Float::F64);
7955 let (mut names, mut source, block, args) = blank(&[f64]);
7956 let wide = cast(&mut source, block, Opcode::FPExt, args[0], long_double());
7957 let once = cast(&mut source, block, Opcode::FPTrunc, wide, f64);
7958 let twice = cast(&mut source, block, Opcode::FPTrunc, wide, f64);
7959 let mut build = Builder::new(&mut source, block);
7960 let sum = build.binary(Opcode::FAdd, once, twice, Flags::default());
7961 build.ret(&[sum]);
7962
7963 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
7964 .expect("every instruction is written");
7965
7966 // Two slots and not four: sixteen bytes for the one eighty bit value, which is what the
7967 // psABI says one takes and is aligned to, and eight for the crossing, which every group
7968 // in the function shares because nothing is ever left in it. The value's slot is its own
7969 // for the whole function, so reading it twice reads the same sixteen bytes.
7970 assert_eq!(
7971 out.stack.locals,
7972 vec![Local { size: 8, align: 8 }, Local { size: 16, align: 16 }]
7973 );
7974 }
7975
7976 #[test]
7977 fn an_integer_becomes_a_long_double_by_being_loaded_as_one() {
7978 let (mut names, mut source, block, args) = blank(&[Type::int(64)]);
7979 let wide = cast(&mut source, block, Opcode::SIToFP, args[0], long_double());
7980 let back =
7981 cast(&mut source, block, Opcode::FPTrunc, wide, Type::float(rucc_ir::Float::F64));
7982 Builder::new(&mut source, block).ret(&[back]);
7983
7984 // `double f(long n) { long double x = n; return x; }`. `fild` is the same push at another
7985 // format, so the conversion is the load and there is no instruction that converts.
7986 let text = lower(&mut names, &source);
7987 assert!(text.contains("x64.mov_mr_64 %0, [%1]"), "{text}");
7988 assert!(text.contains("x64.fild_ll [%1]"), "{text}");
7989 }
7990
7991 #[test]
7992 fn a_long_double_becoming_an_integer_cuts_towards_zero_with_the_control_word() {
7993 let (mut names, mut source, block, args) = blank(&[Type::float(rucc_ir::Float::F64)]);
7994 let wide = cast(&mut source, block, Opcode::FPExt, args[0], long_double());
7995 let whole = cast(&mut source, block, Opcode::FPToSI, wide, Type::int(32));
7996 Builder::new(&mut source, block).ret(&[whole]);
7997
7998 // The one conversion here with no single instruction behind it. C cuts towards zero and
7999 // the unit rounds the way its control word says, so the word is saved, ORed with the two
8000 // bits that mean truncate, loaded, used and put back. Nine instructions for what `fisttp`
8001 // does in one, and `spec/10-backend.md` section 10.8 says why that one is not used.
8002 let text = lower(&mut names, &source);
8003 let group: Vec<&str> = text
8004 .lines()
8005 .map(str::trim)
8006 .filter(|line| line.starts_with("x64.f") || line.contains("_16"))
8007 .collect();
8008 assert_eq!(
8009 group,
8010 [
8011 "x64.fld_l [%1]",
8012 "x64.fstp_t [%2]",
8013 "x64.fnstcw [%5]",
8014 "%6:gpr = x64.mov_rm_16 [%5]",
8015 "%7:gpr(reuse 1) = x64.or_ri_16 %6, 3072",
8016 "x64.mov_mr_16 %7, [%5 + 2]",
8017 "x64.fldcw [%5 + 2]",
8018 "x64.fld_t [%3]",
8019 "x64.fistp_l [%4]",
8020 "x64.fldcw [%5]",
8021 ],
8022 "{text}"
8023 );
8024 }
8025
8026 #[test]
8027 fn a_long_double_is_read_and_written_as_the_bits_it_already_is() {
8028 let (mut names, mut source, block, args) = blank(&[Type::PTR, Type::PTR]);
8029 let mut build = Builder::new(&mut source, block);
8030 let value = build.load(long_double(), args[0], plain(), Flags::default());
8031 build.store(value, args[1], plain(), Flags::default());
8032 build.ret(&[]);
8033
8034 // `void f(long double *a, long double *b) { *b = *a; }`. A copy is a push and a pop at the
8035 // format the value is already in, which neither converts nor looks: a signalling NaN stays
8036 // one and nothing is raised, which is the whole of what makes it a copy.
8037 let text = lower(&mut names, &source);
8038 let group: Vec<&str> =
8039 text.lines().map(str::trim).filter(|line| line.starts_with("x64.f")).collect();
8040 assert_eq!(
8041 group,
8042 ["x64.fld_t [%0]", "x64.fstp_t [%2]", "x64.fld_t [%3]", "x64.fstp_t [%1]"],
8043 "{text}"
8044 );
8045 }
8046
8047 /// Two `long double` values, from two `double` parameters, and the instructions that made
8048 /// them, which every test below this one throws away.
8049 fn two_long_doubles(source: &mut Func, block: Block, args: &[Value]) -> (Value, Value) {
8050 let left = cast(source, block, Opcode::FPExt, args[0], long_double());
8051 let right = cast(source, block, Opcode::FPExt, args[1], long_double());
8052 (left, right)
8053 }
8054
8055 /// The x87 instructions of a function, in order, with everything else dropped.
8056 fn stack_only(text: &str) -> Vec<&str> {
8057 text.lines().map(str::trim).filter(|line| line.contains("x64.f")).collect()
8058 }
8059
8060 /// The two frame slots the last two addresses of a function were taken of, which in a
8061 /// comparison are the two operands in the order they go on the stack.
8062 fn pushed(out: &Lowered) -> Vec<usize> {
8063 let taken: Vec<usize> = out.stack.addresses.iter().map(|&(_, local)| local).collect();
8064 taken[taken.len() - 2..].to_vec()
8065 }
8066
8067 #[test]
8068 fn adding_two_long_doubles_pushes_both_and_leaves_the_answer_in_a_slot() {
8069 let f64 = Type::float(rucc_ir::Float::F64);
8070 let (mut names, mut source, block, args) = blank(&[f64, f64]);
8071 let (left, right) = two_long_doubles(&mut source, block, &args);
8072 let sum =
8073 Builder::new(&mut source, block).binary(Opcode::FAdd, left, right, Flags::default());
8074 let back = cast(&mut source, block, Opcode::FPTrunc, sum, f64);
8075 Builder::new(&mut source, block).ret(&[back]);
8076
8077 // `double f(double a, double b) { return (long double) a + (long double) b; }`. The last
8078 // four lines are the add: both operands pushed, the instruction that names neither of
8079 // them because they are the top two of a stack, and the answer taken off into its slot.
8080 let text = lower(&mut names, &source);
8081 assert_eq!(
8082 stack_only(&text),
8083 [
8084 "x64.fld_l [%2]",
8085 "x64.fstp_t [%3]",
8086 "x64.fld_l [%4]",
8087 "x64.fstp_t [%5]",
8088 "x64.fld_t [%6]",
8089 "x64.fld_t [%7]",
8090 "x64.fadd_p",
8091 "x64.fstp_t [%8]",
8092 "x64.fld_t [%9]",
8093 "x64.fstp_l [%10]",
8094 ],
8095 "{text}"
8096 );
8097 }
8098
8099 #[test]
8100 fn a_subtraction_pushes_the_left_operand_first_and_asks_for_the_att_spelling() {
8101 let f64 = Type::float(rucc_ir::Float::F64);
8102 let (mut names, mut source, block, args) = blank(&[f64, f64]);
8103 let (left, right) = two_long_doubles(&mut source, block, &args);
8104 let less =
8105 Builder::new(&mut source, block).binary(Opcode::FSub, left, right, Flags::default());
8106 let back = cast(&mut source, block, Opcode::FPTrunc, less, f64);
8107 Builder::new(&mut source, block).ret(&[back]);
8108
8109 // The left one goes on first, so it ends up under the right one, and the answer wanted is
8110 // the one below minus the top. In AT&T that is `fsubrp`, since `fsubp` there is `DE E0+i`
8111 // and computes the other one. The `r` says which spelling this is and not which order the
8112 // pushes were in. `crates/rucc/tests/x87.rs` is what says the answer is right, because a
8113 // name is what got this wrong the first time.
8114 let text = lower(&mut names, &source);
8115 assert_eq!(
8116 &stack_only(&text)[4..8],
8117 ["x64.fld_t [%6]", "x64.fld_t [%7]", "x64.fsubr_p", "x64.fstp_t [%8]"],
8118 "{text}"
8119 );
8120 }
8121
8122 #[test]
8123 fn negating_a_long_double_turns_the_sign_over_and_reads_nothing() {
8124 let f64 = Type::float(rucc_ir::Float::F64);
8125 let (mut names, mut source, block, args) = blank(&[f64]);
8126 let wide = cast(&mut source, block, Opcode::FPExt, args[0], long_double());
8127 let flipped = Builder::new(&mut source, block).unary(Opcode::FNeg, wide, long_double());
8128 let back = cast(&mut source, block, Opcode::FPTrunc, flipped, f64);
8129 Builder::new(&mut source, block).ret(&[back]);
8130
8131 // `fchs` and not a subtraction from zero, which would give a different answer at a negative
8132 // zero and would signal at a NaN. It does not read the value as a number at all.
8133 let text = lower(&mut names, &source);
8134 assert_eq!(
8135 &stack_only(&text)[2..5],
8136 ["x64.fld_t [%3]", "x64.fchs", "x64.fstp_t [%4]"],
8137 "{text}"
8138 );
8139 }
8140
8141 #[test]
8142 fn comparing_two_long_doubles_puts_the_left_one_on_top() {
8143 let f64 = Type::float(rucc_ir::Float::F64);
8144 let (mut names, mut source, block, args) = blank(&[f64, f64]);
8145 let (left, right) = two_long_doubles(&mut source, block, &args);
8146 let mut build = Builder::new(&mut source, block);
8147 build.fcmp(FloatPred::Ogt, left, right, Flags::default());
8148 build.ret(&[]);
8149
8150 // `a > b`. `fucomip` asks about the top of the stack against what is under it, so the
8151 // operand the predicate is about has to go on last, which is the other way round from the
8152 // arithmetic above. The pop that clears the loser and the byte that reads the flags are
8153 // both inside the one opcode.
8154 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
8155 .expect("every instruction is written");
8156 let slots = pushed(&out);
8157 assert_eq!(slots, [2, 1], "the right operand goes on first and the left one on top");
8158 let text = mir::print_func(&out.func, &names, ®S);
8159 assert_eq!(
8160 &stack_only(&text)[4..],
8161 ["x64.fld_t [%6]", "x64.fld_t [%7]", "%8:gpr = x64.fucomip_set_a"],
8162 "{text}"
8163 );
8164 }
8165
8166 #[test]
8167 fn a_comparison_that_the_machine_has_backwards_swaps_the_two_pushes() {
8168 let f64 = Type::float(rucc_ir::Float::F64);
8169 let (mut names, mut source, block, args) = blank(&[f64, f64]);
8170 let (left, right) = two_long_doubles(&mut source, block, &args);
8171 let mut build = Builder::new(&mut source, block);
8172 build.fcmp(FloatPred::Olt, left, right, Flags::default());
8173 build.ret(&[]);
8174
8175 // `a < b` is `b > a` and this machine has the one condition, so the same opcode runs with
8176 // the operands the other way round. The same trade the vector rules make, and it has to
8177 // be the same one: a `long double` comparison that picked a different condition from the
8178 // `double` comparison of the same two numbers would be wrong at exactly the unordered
8179 // cases the two conditions differ on.
8180 //
8181 // Which slot each push names is the whole of the difference from the test above, and the
8182 // text does not show it, since an address in a frame is a `lea` with nothing in it until
8183 // `finish` has the numbers. So the slots are what is read here.
8184 let out = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
8185 .expect("every instruction is written");
8186 let slots = pushed(&out);
8187 assert_eq!(slots, [1, 2], "the left operand goes on first and the right one on top");
8188 let text = mir::print_func(&out.func, &names, ®S);
8189 assert_eq!(
8190 &stack_only(&text)[4..],
8191 ["x64.fld_t [%6]", "x64.fld_t [%7]", "%8:gpr = x64.fucomip_set_a"],
8192 "{text}"
8193 );
8194 }
8195
8196 #[test]
8197 fn an_ordered_equal_needs_a_second_byte_to_put_the_two_conditions_together() {
8198 let f64 = Type::float(rucc_ir::Float::F64);
8199 let (mut names, mut source, block, args) = blank(&[f64, f64]);
8200 let (left, right) = two_long_doubles(&mut source, block, &args);
8201 let mut build = Builder::new(&mut source, block);
8202 build.fcmp(FloatPred::Oeq, left, right, Flags::default());
8203 build.ret(&[]);
8204
8205 // Equal and ordered are two conditions and the flags carry both, so the opcode writes a
8206 // second register as well as the one the value is in and ANDs them together. Said here by
8207 // handing it a spare, since an instruction that wrote a register nothing knew about would
8208 // be an instruction the allocator could put a live value in the way of.
8209 let text = lower(&mut names, &source);
8210 assert!(text.contains("%8:gpr, %9:gpr = x64.fucomip_set_e_and_np"), "{text}");
8211 }
8212
8213 #[test]
8214 fn a_comparison_that_is_never_asked_is_reported() {
8215 let f64 = Type::float(rucc_ir::Float::F64);
8216 let (mut names, mut source, block, args) = blank(&[f64, f64]);
8217 let (left, right) = two_long_doubles(&mut source, block, &args);
8218 let mut build = Builder::new(&mut source, block);
8219 build.fcmp(FloatPred::False, left, right, Flags::default());
8220 build.ret(&[]);
8221
8222 // Always false is a constant and not a comparison, so there is no condition to pick and
8223 // nothing here folds it into one: an instruction that quietly agreed with it would hide
8224 // that the optimizer left a comparison in that it should have taken out.
8225 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
8226 .expect_err("no condition is always false");
8227 assert_eq!(failed.to_string(), "no rule lowers a `fcmp` producing a `i1`");
8228 }
8229
8230 #[test]
8231 fn a_long_double_constant_is_the_bits_of_it_put_where_the_value_lives() {
8232 let (mut names, mut source, block, args) = blank(&[Type::PTR]);
8233 let mut build = Builder::new(&mut source, block);
8234 // `1.5L`, which is the leading bit and one more of significand, and an exponent of zero.
8235 let one_and_a_half = build.fconst(long_double(), 0x3fff_c000_0000_0000_0000);
8236 build.store(one_and_a_half, args[0], plain(), Flags::default());
8237 build.ret(&[]);
8238
8239 // No x87 instruction at all. A slot holding one of these is the value, so a constant is
8240 // its ten bytes written where the value lives, and whatever reads it does the `fld`.
8241 let text = lower(&mut names, &source);
8242 assert!(text.contains("x64.mov_ri_64 -4611686018427387904"), "{text}");
8243 assert!(text.contains("x64.mov_ri_16 16383"), "{text}");
8244 assert!(text.contains("x64.mov_mr_16 %3, [%1 + 8]"), "{text}");
8245 // The six bytes above the ten are the padding that makes the type sixteen wide, and they
8246 // are unspecified rather than zero, so nothing writes them.
8247 assert_eq!(text.matches("x64.mov_mr").count(), 2, "{text}");
8248 }
8249
8250 #[test]
8251 fn a_negative_long_double_constant_keeps_the_bit_above_its_exponent() {
8252 let (mut names, mut source, block, args) = blank(&[Type::PTR]);
8253 let mut build = Builder::new(&mut source, block);
8254 let minus = build.fconst(long_double(), 0xbfff_c000_0000_0000_0000);
8255 build.store(minus, args[0], plain(), Flags::default());
8256 build.ret(&[]);
8257
8258 // `-1.5L`. The sign is the top bit of the two byte half, so the immediate that half is put
8259 // in a register with is above the signed range of sixteen bits and has to stay there: read
8260 // as a number it would be negative, and it is not a number, it is two bytes.
8261 let text = lower(&mut names, &source);
8262 assert!(text.contains("x64.mov_ri_16 49151"), "{text}");
8263 }
8264
8265 #[test]
8266 fn a_long_double_crosses_an_edge_as_an_address_and_is_copied_where_it_lands() {
8267 let (mut names, mut source, block, args) = blank(&[Type::float(rucc_ir::Float::F64)]);
8268 let wide = cast(&mut source, block, Opcode::FPExt, args[0], long_double());
8269 let next = source.create_block();
8270 let param = source.append_param(next, long_double());
8271 Builder::new(&mut source, block).jump(next, &[wide]);
8272 Builder::new(&mut source, next).ret(&[param]);
8273
8274 // What the edge carries is the address of the slot the value is already in, which is an
8275 // ordinary register the allocator has an opinion about. The block on the other side copies
8276 // the sixteen bytes into a slot of its own before anything reads them, so a second edge
8277 // handing over a second address would still leave one place for a reader to look.
8278 let text = lower(&mut names, &source);
8279 let second: Vec<&str> = text
8280 .lines()
8281 .skip_while(|line| !line.starts_with("block1"))
8282 .skip(1)
8283 .take(3)
8284 .map(str::trim)
8285 .collect();
8286 assert_eq!(
8287 second,
8288 ["x64.fld_t [%4]", "%5:gpr = x64.lea_64 [$rsp]", "x64.fstp_t [%5]"],
8289 "{text}"
8290 );
8291 }
8292
8293 #[test]
8294 fn more_long_doubles_at_a_block_than_the_stack_is_deep_are_reported() {
8295 let f64 = Type::float(rucc_ir::Float::F64);
8296 let (mut names, mut source, block, args) = blank(&[f64]);
8297 let wide = cast(&mut source, block, Opcode::FPExt, args[0], long_double());
8298 let next = source.create_block();
8299 let params: Vec<Value> =
8300 (0..=X87_DEPTH).map(|_| source.append_param(next, long_double())).collect();
8301 let carried: Vec<Value> = params.iter().map(|_| wide).collect();
8302 Builder::new(&mut source, block).jump(next, &carried);
8303 Builder::new(&mut source, next).ret(&[params[0]]);
8304
8305 // The copies go through the x87 stack so that every one of them is read before any of them
8306 // is written, which is what makes a block that swaps two of these right. Nine of them do
8307 // not fit on the stack, and copying the ninth before or after the rest is the order that
8308 // could be wrong, so it is refused instead.
8309 let failed = func(&source, &mut names, &SELECTOR, &SYSV, &Elsewhere::default())
8310 .expect_err("nine do not fit on the stack");
8311 assert_eq!(
8312 failed.to_string(),
8313 "block1 takes 9 parameters of type `f80` and only 8 can cross an edge at once"
8314 );
8315 assert_eq!(failed.inst(), None);
8316 }
8317}