rssn-advanced
rssn-advanced is the symbolic computation engine of the rssn project. It provides:
- a hash-consed expression DAG for structurally-shared, deduplicated storage of symbolic expressions;
- a Cranelift-backed JIT compiler that turns a DAG subgraph into a native
f64function at runtime, with a 2-row ILP batch path for higher throughput; - heuristic and e-graph simplification — a rule-registry-driven greedy simplifier and a lightweight equality-saturation engine (no
eggdependency); - a unified custom-operator API that wires a user-defined function into the JIT, the simplifier, and the e-graph with a single descriptor;
- hand-written inline-asm presets for
f64×2/f64×4arithmetic onx86_64(SSE2 / AVX2 / AES-NI),AArch64(NEON / crypto), and riscv64 (RVV 1.0 / Zkn); - a flat
extern "C"API compatible withcbindgenfor embedding in C, C++, Python (ctypes/cffi), or any other language.
When to use rssn-advanced
| Use case | Good fit? |
|---|---|
| Evaluate the same symbolic expression over millions of rows | ✅ |
| Symbolically simplify / rewrite algebraic expressions | ✅ |
| Embed a fast expression evaluator in a C/C++ application | ✅ |
| Runtime-define custom mathematical operators | ✅ |
| Fixed-width SIMD kernels (f64×2, f64×4) without JIT overhead | ✅ |
| GPU-accelerated batch evaluation | ❌ (not yet) |
| BLAS / LAPACK matrix operations | ❌ (out of scope) |
Performance
Bulk evaluation of N = 1,000,000 rows, best of 5 runs.
Test hardware: Dell Latitude 5400 · Intel i7-8665U @ 1.90 GHz · 32 GiB RAM · Fedora Linux 44, kernel 6.19 (laptop-class CPU; server CPUs with larger L3 caches will show a smaller gap for simple expressions).
Baseline: hand-optimised NumPy (BLAS-linked, SIMD-enabled C backend).
Expression JIT bulk JIT batch NumPy bulk/batch speedup
────────────────────────────────────────────── ──────── ───────── ───── ────────────────
x + y + 10.0 (trivial baseline) 1.87 ns 1.13 ns 2.82 ns 1.5× / 2.5×
(x-y)^4 (degree-4 polynomial) 2.73 ns 1.28 ns 19.21 ns 7× / 15×
cubic surface (10 terms, 3 vars) 3.73 ns 1.77 ns 75.75 ns 20× / 43×
rational w/ CSE (repeated subexpression) 2.53 ns 1.27 ns 15.91 ns 6× / 13×
Why the gap grows with expression complexity:
NumPy allocates one float64[N] scratch array per arithmetic operation.
A 10-term expression at N = 10⁶ creates ~200 MB of temporaries that
overflow L3 cache. The JIT keeps every intermediate value in a CPU
register across the full expression, paying exactly one memory round-trip
per input column — 0 intermediate arrays regardless of expression depth.
Honest caveats:
- Numbers from a single laptop; your mileage will vary.
- The JIT batch path uses 2-row ILP unrolling, not AVX-width vector instructions.
For peak throughput on AVX-capable CPUs, use the [
asm_presets] / [simd] paths for fixed kernels. - Cranelift's register allocator produces good but not hand-tuned code.
gcc -O3or LLVM can generate tighter loops for very simple expressions.
Full benchmark report: bench_reports.md.
Quick start
Rust
Add to Cargo.toml:
[]
= "0.1"
Parse an expression and JIT-compile it:
# // cfg guard: skip compilation when cranelift-jit feature is absent
#
#
Register a custom operator that plugs into all pipeline stages:
# // cfg guard: skip compilation when cranelift-jit feature is absent
#
#
C / C++
/*
* basics.c — rssn-advanced C API walkthrough
*
* Demonstrates:
* 1. Building a DAG expression (x^2 + 2*x + 1)
* 2. Simplifying it with the heuristic engine
* 3. JIT-compiling and evaluating it
* 4. Registering a custom operator (relu) and evaluating relu(x+3)
*
* Build: make -C examples all
* Run: make -C examples run
*/
/* ── helpers ──────────────────────────────────────────────────────────────── */
/* Simple relu — must have C linkage so the JIT can emit a direct call. */
static double
/* ── main ─────────────────────────────────────────────────────────────────── */
int
Architecture overview
┌─────────────────────────────────────────────────────────┐
│ rssn-advanced │
│ │
│ parser ──→ dag ──→ ast ──→ jit ──→ native fn ptr │
│ │ │ │ │
│ │ └──→ heuristic simplifier │
│ │ └──→ e-graph saturation │
│ │ │
│ └──→ custom (one descriptor → all stages) │
│ │
│ asm_presets / simd (fixed-width f64×2 / f64×4) │
│ ffi (extern "C", cbindgen-compatible) │
│ parallel / storage / runtime (infrastructure) │
└─────────────────────────────────────────────────────────┘
| Module | Role |
|---|---|
dag |
Hash-consed node store — structural sharing, deduplication |
ast |
Local tree projection (relative i32 pointers) for algorithm traversal |
parser |
nom-based infix parser: variables, constants, +−×÷^%, named functions |
jit |
Cranelift JIT: scalar + 2-row ILP batch compilation |
heuristic |
Greedy/beam simplifier with pluggable rule registries |
egraph |
Union-find equality saturation with cost-based extraction |
custom |
Unified custom-operator descriptor + registry |
simd |
Slice-level wrappers over asm_presets |
asm_presets |
f64×2 / f64×4 inline-asm for x86_64 / AArch64 / riscv64 |
ffi |
Flat extern "C" API + async bridge (fiber-backed via dtact) |
parallel |
Fiber-based parallel simplification |
storage |
Disk-backed spill + hot-node frequency cache |
Feature flags
| Flag | Default | Effect |
|---|---|---|
cranelift-jit |
on | Enables the jit module and all JIT / batch-compile paths |
Disable with --no-default-features for embedded or WASM targets.
The parser, DAG, simplifier, e-graph, and SIMD presets remain available without JIT.
Known limitations
- Parser coverage: arithmetic operators (
+,-,*,/,^,%), unary negation, and named functions. Transcendentals (sin,exp, …) must be registered as custom operators. - JIT batch = 2-row ILP only: the batch path does not emit wide SIMD (AVX2 / AVX-512) instructions. Use
asm_presets/simdfor fixed-width high-throughput kernels. - Single-threaded JIT context: concurrent compilation requests serialise on a global
Mutex. - No GPU support.
- e-graph extractor is greedy: the bottom-up cost minimiser is fast but not globally optimal (optimal extraction is NP-hard).
- Windows support is experimental: some inline-asm presets fall through to the scalar path on Windows; correctness is maintained.
Contributing
We welcome bug reports, performance improvements, new features, and documentation fixes. Please read CONTRIBUTING.md for development setup, code-style requirements, and the PR workflow.
Maintainers & Contributors
- Author: Pana Yang (ORCID: 0009-0007-2600-0948 · Xinyu.Yang@apich.org)
- Consultants:
- X. Zhang — Algorithm & Informatics (@RheaCherry · 3248998213@qq.com)
- Z. Wang — Mathematics
- Y. Li — Physics (xian1360685019@qq.com)
- Project Reviewer: Z. Li
License
Licensed under the Apache 2.0 License.
Related
- SECURITY.md — responsible disclosure policy
- CODE_OF_CONDUCT.md — community standards
- bench_reports.md — full benchmark output
- GitHub Wiki — extended documentation