# MOS 6502 family
Covers the NMOS 6502, the Ricoh RP2A03/RP2A07 (NES — 6502 core with the decimal
mode disabled and an integrated APU), the CMOS 65C02, and the 65816.
Consumed by: `cpu/mos6502`.
## Primary
| [W65C02S datasheet](https://www.westerndesigncenter.com/wdc/documentation/w65c02s.pdf) (WDC) | Current-production CMOS part: pinout, timing, full opcode matrix, cycle counts | The CMOS successor — differs from NMOS in several documented ways. Authoritative for what it covers |
| [bitsavers.org](https://bitsavers.org/) | Original MOS/Rockwell/Synertek datasheets and the *MCS6500 Family Programming Manual* | The actual NMOS documentation. Scanned originals |
## Instruction reference
| [masswerk 6502 instruction set](https://www.masswerk.at/6502/6502_instruction_set.html) | Per-opcode semantics, addressing modes, flags, cycles — including the illegal opcodes |
| [NESdev "Obelisk" 6502 reference](https://www.nesdev.org/obelisk-6502-guide/reference.html) | Clean per-instruction reference, well suited to generating a decode table from |
| [6502.org opcode list](https://www.6502.org/tutorials/6502opcodes.html) | Compact cross-check |
| [pagetable.com C64 reference](https://www.pagetable.com/c64ref/6502/) | Consolidated tables, incl. undocumented behaviour and cross-variant differences |
## Illegal / undocumented opcodes
Real software depends on them, so they are in scope from the start. NESdev's
[CPU unofficial opcodes](https://www.nesdev.org/wiki/CPU_unofficial_opcodes) is
the practical reference; treat the unstable ones (`ANE`/`LAX` immediate, and the
`SHA`/`SHX`/`SHY`/`TAS` family) as documented-unstable rather than as bugs, and
match what [SingleStepTests/65x02](https://github.com/SingleStepTests/65x02)
expects.
## Implementation notes
- **Cycle accuracy is per-bus-access, not per-instruction.** Every cycle is a
read or a write, including the dummy reads that page-crossing and read-modify-
write instructions perform. Those dummy accesses are visible to hardware and
are load-bearing on the NES. Drive them through the bus (`ROADMAP.md` §4.1);
do not model instructions as "N cycles then a result".
- Decimal mode exists on the 6502 but is **disabled in the NES's RP2A03**. Make
it a construction property, not a `#[cfg]`.
- Interrupt sampling happens at a specific point within the instruction, and the
`BRK`/`IRQ`/`NMI` hijack behaviour is observable. NESdev's
[CPU interrupts](https://www.nesdev.org/wiki/CPU_interrupts) documents it.
## Validation
[SingleStepTests/65x02](https://github.com/SingleStepTests/65x02) — MIT, 10 000
vectors per opcode with full bus-cycle traces. See
[`../testing/conformance-suites.md`](../testing/conformance-suites.md).