rp2040/uart0/
uartdr.rs

1#[doc = "Reader of register UARTDR"]
2pub type R = crate::R<u32, super::UARTDR>;
3#[doc = "Writer for register UARTDR"]
4pub type W = crate::W<u32, super::UARTDR>;
5#[doc = "Register UARTDR `reset()`'s with value 0"]
6impl crate::ResetValue for super::UARTDR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `OE`"]
14pub type OE_R = crate::R<bool, bool>;
15#[doc = "Reader of field `BE`"]
16pub type BE_R = crate::R<bool, bool>;
17#[doc = "Reader of field `PE`"]
18pub type PE_R = crate::R<bool, bool>;
19#[doc = "Reader of field `FE`"]
20pub type FE_R = crate::R<bool, bool>;
21#[doc = "Reader of field `DATA`"]
22pub type DATA_R = crate::R<u8, u8>;
23#[doc = "Write proxy for field `DATA`"]
24pub struct DATA_W<'a> {
25    w: &'a mut W,
26}
27impl<'a> DATA_W<'a> {
28    #[doc = r"Writes raw bits to the field"]
29    #[inline(always)]
30    pub unsafe fn bits(self, value: u8) -> &'a mut W {
31        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
32        self.w
33    }
34}
35impl R {
36    #[doc = "Bit 11 - Overrun error. This bit is set to 1 if data is received and the receive FIFO is already full. This is cleared to 0 once there is an empty space in the FIFO and a new character can be written to it."]
37    #[inline(always)]
38    pub fn oe(&self) -> OE_R {
39        OE_R::new(((self.bits >> 11) & 0x01) != 0)
40    }
41    #[doc = "Bit 10 - Break error. This bit is set to 1 if a break condition was detected, indicating that the received data input was held LOW for longer than a full-word transmission time (defined as start, data, parity and stop bits). In FIFO mode, this error is associated with the character at the top of the FIFO. When a break occurs, only one 0 character is loaded into the FIFO. The next character is only enabled after the receive data input goes to a 1 (marking state), and the next valid start bit is received."]
42    #[inline(always)]
43    pub fn be(&self) -> BE_R {
44        BE_R::new(((self.bits >> 10) & 0x01) != 0)
45    }
46    #[doc = "Bit 9 - Parity error. When set to 1, it indicates that the parity of the received data character does not match the parity that the EPS and SPS bits in the Line Control Register, UARTLCR_H. In FIFO mode, this error is associated with the character at the top of the FIFO."]
47    #[inline(always)]
48    pub fn pe(&self) -> PE_R {
49        PE_R::new(((self.bits >> 9) & 0x01) != 0)
50    }
51    #[doc = "Bit 8 - Framing error. When set to 1, it indicates that the received character did not have a valid stop bit (a valid stop bit is 1). In FIFO mode, this error is associated with the character at the top of the FIFO."]
52    #[inline(always)]
53    pub fn fe(&self) -> FE_R {
54        FE_R::new(((self.bits >> 8) & 0x01) != 0)
55    }
56    #[doc = "Bits 0:7 - Receive (read) data character. Transmit (write) data character."]
57    #[inline(always)]
58    pub fn data(&self) -> DATA_R {
59        DATA_R::new((self.bits & 0xff) as u8)
60    }
61}
62impl W {
63    #[doc = "Bits 0:7 - Receive (read) data character. Transmit (write) data character."]
64    #[inline(always)]
65    pub fn data(&mut self) -> DATA_W {
66        DATA_W { w: self }
67    }
68}
rp2040/uart0/uartdr.rs

rp2040/uart0/
uartdr.rs
