Import
[]
= { = "0.0.1-alpha1" }
About The Project
A rust crate to cache ROM in memory like CPU caching RAM.
Trait Cacheable is provided to let user define how to load and store data in Secondary Storage.
- Retrieve data (&T)
- cache miss:
CacheError::Miss. - cache hit: return
&Tfrom cache.
- Retrieve mutable data (&mut T)
- cache miss: CacheError::Miss
- cache hit: return
&mut Tfrom cache, and markCacheLinedirty.
- Load data
- empty cache: load data from Secondary Storage (
Cacheable::load()). - full cache: LRU algorithm to evict data.
- already loaded: refresh.
Any dirty CacheLine will be written back (Cacheable::store()) to Secondary Storage when evicted.
Built With
- Rust
- Miri (Testing)
Usage
Example
# use Cache;
// e.g 2-way set associative cache (8 sets)
let mut cache: = Defaultdefault;
cache.;
let s = cache..unwrap;
assert_eq!;
cache.;
cache.;
cache.;
cache.;
cache.;
let n = cache..unwrap;
*n = 0;
cache.;
cache.;
cache.;
cache.;
cache.;
let n = cache..unwrap;
assert_eq!;
For more examples, please refer to the Tests, Example or Documentation
Changelog
todo
Roadmap
- allow concurrent access
- auto load when cache miss
Contributing
Contributions are what make the open source community such an amazing place to learn, inspire, and create. Any contributions you make are greatly appreciated.
If you have a suggestion that would make this better, please fork the repo and create a pull request. You can also simply open an issue with the tag "enhancement". Don't forget to give the project a star! Thanks again!
- Fork the Project
- Create your Feature Branch (
git checkout -b feature/AmazingFeature) - Commit your Changes (
git commit -m 'Add some AmazingFeature') - Push to the Branch (
git push origin feature/AmazingFeature) - Open a Pull Request
License
Distributed under the MIT License. See LICENSE.txt for more information.
Contact
Louis - 836250617@qq.com
Project Link: https://github.com/kingwingfly/rom-cache