rockchip_pm/variants/mod.rs
1//! SoC-specific power domain variants and configuration
2//!
3//! This module contains power domain definitions for different Rockchip SoCs,
4//! including register offsets, bit masks, and domain metadata.
5
6use alloc::collections::btree_map::BTreeMap;
7
8use crate::RkBoard;
9
10#[macro_use]
11mod _macros;
12
13mod rk3588;
14
15/// Map of power domains to their configuration info
16pub type DomainMap = BTreeMap<PowerDomain, RockchipDomainInfo>;
17
18/// Power domain identifier
19///
20/// Represents a specific power domain in the SoC that can be
21/// independently powered on or off.
22#[repr(transparent)]
23#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord)]
24pub struct PowerDomain(pub usize);
25
26impl From<u32> for PowerDomain {
27 fn from(value: u32) -> Self {
28 PowerDomain(value as usize)
29 }
30}
31
32/// PMU configuration for a specific SoC
33///
34/// Contains register offsets and domain information for power management.
35#[allow(dead_code)]
36#[derive(Clone, Debug, Default)]
37pub struct RockchipPmuInfo {
38 /// Power control register offset
39 pub pwr_offset: u32,
40 /// Status register offset
41 pub status_offset: u32,
42 /// Request register offset
43 pub req_offset: u32,
44 /// Idle status register offset
45 pub idle_offset: u32,
46 /// Acknowledge register offset
47 pub ack_offset: u32,
48 /// Memory power control register offset
49 pub mem_pwr_offset: u32,
50 /// Chain status register offset
51 pub chain_status_offset: u32,
52 /// Memory status register offset
53 pub mem_status_offset: u32,
54 /// Repair status register offset
55 pub repair_status_offset: u32,
56 /// Clock ungate register offset
57 pub clk_ungate_offset: u32,
58 /// Memory shutdown register offset
59 pub mem_sd_offset: u32,
60 /// Core power count register offset
61 pub core_pwrcnt_offset: u32,
62 /// GPU power count register offset
63 pub gpu_pwrcnt_offset: u32,
64 /// Core power transition time
65 pub core_power_transition_time: u32,
66 /// GPU power transition time
67 pub gpu_power_transition_time: u32,
68
69 /// Map of all supported power domains
70 pub domains: DomainMap,
71}
72
73impl RockchipPmuInfo {
74 /// Create PMU info for the specified board type
75 ///
76 /// # Arguments
77 ///
78 /// * `board` - The Rockchip board type
79 ///
80 /// # Panics
81 ///
82 /// Panics if the board type is not implemented
83 pub fn new(board: RkBoard) -> Self {
84 match board {
85 RkBoard::Rk3588 => rk3588::pmu_info(),
86 RkBoard::Rk3568 => unimplemented!(),
87 }
88 }
89}
90
91/// Configuration information for a single power domain
92///
93/// Contains all the register masks and offsets needed to control
94/// a specific power domain.
95#[allow(dead_code)]
96#[derive(Debug, Clone, Default)]
97pub struct RockchipDomainInfo {
98 /// Domain name
99 pub name: &'static str,
100 /// Power control mask
101 pub pwr_mask: i32,
102 /// Status mask
103 pub status_mask: i32,
104 /// Request mask
105 pub req_mask: i32,
106 /// Idle status mask
107 pub idle_mask: i32,
108 /// Acknowledge mask
109 pub ack_mask: i32,
110 /// Active wakeup flag
111 pub active_wakeup: bool,
112 /// Power write-enable mask
113 pub pwr_w_mask: i32,
114 /// Request write-enable mask
115 pub req_w_mask: i32,
116 /// Memory status mask
117 pub mem_status_mask: i32,
118 /// Repair status mask
119 pub repair_status_mask: i32,
120 /// Clock ungate mask
121 pub clk_ungate_mask: i32,
122 /// Clock ungate write-enable mask
123 pub clk_ungate_w_mask: i32,
124 /// Memory block count
125 pub mem_num: i32,
126 /// Keep on at startup flag
127 pub keepon_startup: bool,
128 /// Always on flag
129 pub always_on: bool,
130 /// Power control register offset
131 pub pwr_offset: u32,
132 /// Memory power register offset
133 pub mem_offset: u32,
134 /// Request register offset
135 pub req_offset: u32,
136}