robo6502/nmos/ops/
cycle.rs

1// Copyright 2018 Ed McCardell
2//
3// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
4// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
5// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
6// option. This file may not be copied, modified, or distributed
7// except according to those terms.
8
9use crate::{NmiLength, Nmos, Sys};
10
11use crate::mi::{Addr, AddrExt, AddrMath};
12
13impl Nmos {
14    // BRK
15    fn cycle_op_00<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
16        if self.op_cycle == 1 {
17            if self.do_int {
18                self.read(sys, self.pc)?;
19            } else {
20                self.fetch_operand(sys)?;
21            }
22        }
23
24        if self.op_cycle == 2 {
25            if self.reset {
26                self.read_stack(sys)?;
27            } else {
28                self.write_stack(sys, self.pc.hi())?;
29            }
30            self.sp -= 1;
31        }
32
33        if self.op_cycle == 3 {
34            if self.reset {
35                self.read_stack(sys)?;
36            } else {
37                self.write_stack(sys, self.pc.lo())?;
38            }
39            self.sp -= 1;
40            self.base1 = self.signal_vector(sys);
41        }
42
43        if self.op_cycle == 4 {
44            if self.reset {
45                self.read_stack(sys)?;
46            } else if self.do_int {
47                self.write_stack(sys, self.flags.to_byte() & 0b1110_1111)?;
48            } else {
49                self.write_stack(sys, self.flags.to_byte())?;
50            }
51            self.sp -= 1;
52            if !self.nmi
53                && sys.peek_nmi()
54                && sys.nmi_length() < NmiLength::Plenty
55            {
56                sys.poll_nmi();
57            }
58        }
59
60        if self.op_cycle == 5 {
61            self.lo_byte = self.read(sys, self.base1)?;
62            if !self.nmi && sys.peek_nmi() && sys.nmi_length() < NmiLength::Two
63            {
64                sys.poll_nmi();
65            }
66        }
67
68        // op_cycle == 6
69        self.hi_byte = self.read(sys, self.base1 + 1)?;
70        self.pc = Addr::from_bytes(self.lo_byte, self.hi_byte);
71        self.flags.i = true;
72        self.clear_signals();
73        Some(())
74    }
75
76    // ORA ($nn,X)
77    fn cycle_op_01<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
78        if self.op_cycle < 5 {
79            self.base1 = self.cycle_addr_izx(sys)?;
80        }
81
82        // op_cycle == 5
83        let val = self.load(sys, self.base1)?;
84        self.ORA(val);
85        Some(())
86    }
87
88    // KIL
89    fn cycle_op_02<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
90        self.cycle_halt(sys)
91    }
92
93    // SLO ($nn,X)
94    fn cycle_op_03<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
95        if self.op_cycle < 5 {
96            self.base1 = self.cycle_addr_izx(sys)?;
97        }
98
99        // op_cycle >= 5
100        self.cycle_rmw(sys, self.base1, Nmos::ASL, 5)?;
101        self.ORA(self.lo_byte);
102        Some(())
103    }
104
105    // *NOP $nn
106    fn cycle_op_04<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
107        if self.op_cycle == 1 {
108            self.base1 = self.addr_zp(sys)?;
109        }
110
111        // op_cycle == 2
112        self.load(sys, self.base1)?;
113        Some(())
114    }
115
116    // ORA $nn
117    fn cycle_op_05<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
118        if self.op_cycle == 1 {
119            self.base1 = self.addr_zp(sys)?;
120        }
121
122        // op_cycle == 2
123        let val = self.load(sys, self.base1)?;
124        self.ORA(val);
125        Some(())
126    }
127
128    // ASL $nn
129    fn cycle_op_06<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
130        if self.op_cycle == 1 {
131            self.base1 = self.addr_zp(sys)?;
132        }
133
134        // op_cycle >= 2
135        self.cycle_rmw(sys, self.base1, Nmos::ASL, 2)
136    }
137
138    // SLO $nn
139    fn cycle_op_07<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
140        if self.op_cycle == 1 {
141            self.base1 = self.addr_zp(sys)?;
142        }
143
144        // op_cycle >= 2
145        self.cycle_rmw(sys, self.base1, Nmos::ASL, 2)?;
146        self.ORA(self.lo_byte);
147        Some(())
148    }
149
150    // PHP
151    fn cycle_op_08<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
152        if self.op_cycle == 1 {
153            self.read(sys, self.pc)?;
154        }
155
156        // op_cycle == 2
157        self.store(sys, Addr::stack(self.sp), self.flags.to_byte())?;
158        self.sp -= 1;
159        Some(())
160    }
161
162    // cycle_op_09 = op_09
163    // cycle_op_0a = op_0a
164    // cycle_op_0b = op_0b
165
166    // NOP* $nnnn
167    fn cycle_op_0c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
168        if self.op_cycle < 3 {
169            self.base1 = self.cycle_addr_abs(sys)?;
170        }
171
172        // op_cycle == 3
173        self.load(sys, self.base1)?;
174        Some(())
175    }
176
177    // ORA $nnnn
178    fn cycle_op_0d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
179        if self.op_cycle < 3 {
180            self.base1 = self.cycle_addr_abs(sys)?;
181        }
182
183        // op_cycle == 3
184        let val = self.load(sys, self.base1)?;
185        self.ORA(val);
186        Some(())
187    }
188
189    // ASL $nnnn
190    fn cycle_op_0e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
191        if self.op_cycle < 3 {
192            self.base1 = self.cycle_addr_abs(sys)?;
193        }
194
195        // op_cycle >= 3
196        self.cycle_rmw(sys, self.base1, Nmos::ASL, 3)
197    }
198
199    // SLO $nnnn
200    fn cycle_op_0f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
201        if self.op_cycle < 3 {
202            self.base1 = self.cycle_addr_abs(sys)?;
203        }
204
205        // op_cycle >= 3
206        self.cycle_rmw(sys, self.base1, Nmos::ASL, 3)?;
207        self.ORA(self.lo_byte);
208        Some(())
209    }
210
211    // BPL
212    fn cycle_op_10<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
213        self.cycle_branch(sys, !self.flags.n())
214    }
215
216    // ORA ($nn),Y
217    fn cycle_op_11<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
218        if self.op_cycle < 5 {
219            self.base1 = self.cycle_addr_izy(sys, false)?;
220        }
221
222        // op_cycle == 5
223        let val = self.load(sys, self.base1)?;
224        self.ORA(val);
225        Some(())
226    }
227
228    // KIL
229    fn cycle_op_12<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
230        self.cycle_halt(sys)
231    }
232
233    // SLO ($nn),Y
234    fn cycle_op_13<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
235        if self.op_cycle < 5 {
236            self.base1 = self.cycle_addr_izy(sys, true)?;
237        }
238
239        // op_cycle >= 5
240        self.cycle_rmw(sys, self.base1, Nmos::ASL, 5)?;
241        self.ORA(self.lo_byte);
242        Some(())
243    }
244
245    // NOP* $nn,X
246    fn cycle_op_14<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
247        if self.op_cycle < 3 {
248            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
249        }
250
251        // op_cycle == 3
252        self.load(sys, self.base1)?;
253        Some(())
254    }
255
256    // ORA $nn,X
257    fn cycle_op_15<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
258        if self.op_cycle < 3 {
259            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
260        }
261
262        // op_cycle == 3
263        let val = self.load(sys, self.base1)?;
264        self.ORA(val);
265        Some(())
266    }
267
268    // ASL $nn,X
269    fn cycle_op_16<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
270        if self.op_cycle < 3 {
271            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
272        }
273
274        // op_cycle >= 3
275        self.cycle_rmw(sys, self.base1, Nmos::ASL, 3)
276    }
277
278    // SLO $nn,X
279    fn cycle_op_17<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
280        if self.op_cycle < 3 {
281            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
282        }
283
284        // op_cycle >= 3
285        self.cycle_rmw(sys, self.base1, Nmos::ASL, 3)?;
286        self.ORA(self.lo_byte);
287        Some(())
288    }
289
290    // cycle_op_18 = op_18
291
292    // ORA $nnnn,Y
293    fn cycle_op_19<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
294        if self.op_cycle < 4 {
295            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
296        }
297
298        // op_cycle == 4
299        let val = self.load(sys, self.base1)?;
300        self.ORA(val);
301        Some(())
302    }
303
304    // cycle_op_1a = op_1a
305
306    // SLO $nnnn,Y
307    fn cycle_op_1b<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
308        if self.op_cycle < 4 {
309            self.base1 = self.cycle_addr_abi(sys, self.y, true)?;
310        }
311
312        // op_cycle >= 4
313        self.cycle_rmw(sys, self.base1, Nmos::ASL, 4)?;
314        self.ORA(self.lo_byte);
315        Some(())
316    }
317
318    // NOP* $nnnn,X
319    fn cycle_op_1c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
320        if self.op_cycle < 4 {
321            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
322        }
323
324        // op_cycle == 4
325        self.load(sys, self.base1)?;
326        Some(())
327    }
328
329    // ORA $nnnn,X
330    fn cycle_op_1d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
331        if self.op_cycle < 4 {
332            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
333        }
334
335        // op_cycle == 4
336        let val = self.load(sys, self.base1)?;
337        self.ORA(val);
338        Some(())
339    }
340
341    // ASL $nnnn,X
342    fn cycle_op_1e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
343        if self.op_cycle < 4 {
344            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
345        }
346
347        // op_cycle >= 4
348        self.cycle_rmw(sys, self.base1, Nmos::ASL, 4)
349    }
350
351    // SLO $nnnn,X
352    fn cycle_op_1f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
353        if self.op_cycle < 4 {
354            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
355        }
356
357        // op_cycle >= 4
358        self.cycle_rmw(sys, self.base1, Nmos::ASL, 4)?;
359        self.ORA(self.lo_byte);
360        Some(())
361    }
362
363    // JSR $nnnn
364    fn cycle_op_20<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
365        if self.op_cycle == 1 {
366            self.lo_byte = self.fetch_operand(sys)?;
367        }
368
369        if self.op_cycle == 2 {
370            self.read_stack(sys)?;
371        }
372
373        if self.op_cycle == 3 {
374            self.write_stack(sys, self.pc.hi())?;
375            self.sp -= 1;
376        }
377
378        if self.op_cycle == 4 {
379            self.write_stack(sys, self.pc.lo())?;
380            self.sp -= 1;
381            self.poll_signals(sys);
382        }
383
384        // op_cycle == 5
385        self.hi_byte = self.fetch_operand(sys)?;
386        self.pc = Addr::from_bytes(self.lo_byte, self.hi_byte);
387        Some(())
388    }
389
390    // AND ($nn,X)
391    fn cycle_op_21<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
392        if self.op_cycle < 5 {
393            self.base1 = self.cycle_addr_izx(sys)?;
394        }
395
396        // op_cycle == 5
397        let val = self.load(sys, self.base1)?;
398        self.AND(val);
399        Some(())
400    }
401
402    // KIL
403    fn cycle_op_22<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
404        self.cycle_halt(sys)
405    }
406
407    // RLA ($nn,X)
408    fn cycle_op_23<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
409        if self.op_cycle < 5 {
410            self.base1 = self.cycle_addr_izx(sys)?;
411        }
412
413        // op_cycle >= 5
414        self.cycle_rmw(sys, self.base1, Nmos::ROL, 5)?;
415        self.AND(self.lo_byte);
416        Some(())
417    }
418
419    // BIT $nn
420    fn cycle_op_24<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
421        if self.op_cycle == 1 {
422            self.base1 = self.addr_zp(sys)?;
423        }
424
425        // op_cycle == 2
426        let val = self.load(sys, self.base1)?;
427        self.BIT(val);
428        Some(())
429    }
430
431    // AND $nn
432    fn cycle_op_25<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
433        if self.op_cycle == 1 {
434            self.base1 = self.addr_zp(sys)?;
435        }
436
437        // op_cycle == 2
438        let val = self.load(sys, self.base1)?;
439        self.AND(val);
440        Some(())
441    }
442
443    // ROL $nn
444    fn cycle_op_26<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
445        if self.op_cycle == 1 {
446            self.base1 = self.addr_zp(sys)?;
447        }
448
449        // op_cycle >= 2
450        self.cycle_rmw(sys, self.base1, Nmos::ROL, 2)
451    }
452
453    // RLA $nn
454    fn cycle_op_27<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
455        if self.op_cycle == 1 {
456            self.base1 = self.addr_zp(sys)?;
457        }
458
459        // op_cycle >= 2
460        self.cycle_rmw(sys, self.base1, Nmos::ROL, 2)?;
461        self.AND(self.lo_byte);
462        Some(())
463    }
464
465    // PLP
466    fn cycle_op_28<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
467        if self.op_cycle == 1 {
468            self.read(sys, self.pc)?;
469        }
470
471        if self.op_cycle == 2 {
472            self.read_stack(sys)?;
473            self.sp += 1;
474        }
475
476        // op_cycle == 3
477        let p = self.load(sys, Addr::stack(self.sp))?;
478        self.flags.from_byte(p);
479        Some(())
480    }
481
482    // cycle_op_29 = op_29
483    // cycle_op_2a = op_2a
484    // cycle_op_2b = op_2b
485
486    // BIT $nnnn
487    fn cycle_op_2c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
488        if self.op_cycle < 3 {
489            self.base1 = self.cycle_addr_abs(sys)?;
490        }
491
492        // op_cycle == 3
493        let val = self.load(sys, self.base1)?;
494        self.BIT(val);
495        Some(())
496    }
497
498    // AND $nnnn
499    fn cycle_op_2d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
500        if self.op_cycle < 3 {
501            self.base1 = self.cycle_addr_abs(sys)?;
502        }
503
504        // op_cycle == 3
505        let val = self.load(sys, self.base1)?;
506        self.AND(val);
507        Some(())
508    }
509
510    // ROL $nnnn
511    fn cycle_op_2e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
512        if self.op_cycle < 3 {
513            self.base1 = self.cycle_addr_abs(sys)?;
514        }
515
516        // op_cycle >= 3
517        self.cycle_rmw(sys, self.base1, Nmos::ROL, 3)
518    }
519
520    // RLA $nnnn
521    fn cycle_op_2f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
522        if self.op_cycle < 3 {
523            self.base1 = self.cycle_addr_abs(sys)?;
524        }
525
526        // op_cycle >= 3
527        self.cycle_rmw(sys, self.base1, Nmos::ROL, 3)?;
528        self.AND(self.lo_byte);
529        Some(())
530    }
531
532    // BMI
533    fn cycle_op_30<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
534        self.cycle_branch(sys, self.flags.n())
535    }
536
537    // AND ($nn),Y
538    fn cycle_op_31<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
539        if self.op_cycle < 5 {
540            self.base1 = self.cycle_addr_izy(sys, false)?;
541        }
542
543        // op_cycle == 5
544        let val = self.load(sys, self.base1)?;
545        self.AND(val);
546        Some(())
547    }
548
549    // KIL
550    fn cycle_op_32<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
551        self.cycle_halt(sys)
552    }
553
554    // RLA ($nn),Y
555    fn cycle_op_33<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
556        if self.op_cycle < 5 {
557            self.base1 = self.cycle_addr_izy(sys, true)?;
558        }
559
560        // op_cycle >= 5
561        self.cycle_rmw(sys, self.base1, Nmos::ROL, 5)?;
562        self.AND(self.lo_byte);
563        Some(())
564    }
565
566    // NOP* $nn,X
567    fn cycle_op_34<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
568        if self.op_cycle < 3 {
569            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
570        }
571
572        // op_cycle == 3
573        self.load(sys, self.base1)?;
574        Some(())
575    }
576
577    // AND $nn,X
578    fn cycle_op_35<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
579        if self.op_cycle < 3 {
580            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
581        }
582
583        // op_cycle == 3
584        let val = self.load(sys, self.base1)?;
585        self.AND(val);
586        Some(())
587    }
588
589    // ROL $nn,X
590    fn cycle_op_36<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
591        if self.op_cycle < 3 {
592            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
593        }
594
595        // op_cycle >= 3
596        self.cycle_rmw(sys, self.base1, Nmos::ROL, 3)
597    }
598
599    // RLA $nn,X
600    fn cycle_op_37<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
601        if self.op_cycle < 3 {
602            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
603        }
604
605        // op_cycle >= 3
606        self.cycle_rmw(sys, self.base1, Nmos::ROL, 3)?;
607        self.AND(self.lo_byte);
608        Some(())
609    }
610
611    // cycle_op_38 = op_38
612
613    // AND $nnnn,Y
614    fn cycle_op_39<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
615        if self.op_cycle < 4 {
616            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
617        }
618
619        // op_cycle == 4
620        let val = self.load(sys, self.base1)?;
621        self.AND(val);
622        Some(())
623    }
624
625    // cycle_op_3a = op_3a
626
627    // RLA $nnnn,Y
628    fn cycle_op_3b<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
629        if self.op_cycle < 4 {
630            self.base1 = self.cycle_addr_abi(sys, self.y, true)?;
631        }
632
633        // op_cycle >= 4
634        self.cycle_rmw(sys, self.base1, Nmos::ROL, 4)?;
635        self.AND(self.lo_byte);
636        Some(())
637    }
638
639    // NOP* $nnnn,X
640    fn cycle_op_3c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
641        if self.op_cycle < 4 {
642            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
643        }
644
645        // op_cycle == 4
646        self.load(sys, self.base1)?;
647        Some(())
648    }
649
650    // AND $nnnn,X
651    fn cycle_op_3d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
652        if self.op_cycle < 4 {
653            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
654        }
655
656        // op_cycle == 4
657        let val = self.load(sys, self.base1)?;
658        self.AND(val);
659        Some(())
660    }
661
662    // ROL $nnnn,X
663    fn cycle_op_3e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
664        if self.op_cycle < 4 {
665            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
666        }
667
668        // op_cycle >= 4
669        self.cycle_rmw(sys, self.base1, Nmos::ROL, 4)
670    }
671
672    // RLA $nnnn,X
673    fn cycle_op_3f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
674        if self.op_cycle < 4 {
675            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
676        }
677
678        // op_cycle >= 4
679        self.cycle_rmw(sys, self.base1, Nmos::ROL, 4)?;
680        self.AND(self.lo_byte);
681        Some(())
682    }
683
684    // RTI
685    fn cycle_op_40<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
686        if self.op_cycle == 1 {
687            self.read(sys, self.pc)?;
688        }
689
690        if self.op_cycle == 2 {
691            self.read_stack(sys)?;
692            self.sp += 1;
693        }
694
695        if self.op_cycle == 3 {
696            let p = self.read_stack(sys)?;
697            self.sp += 1;
698            self.flags.from_byte(p);
699        }
700
701        if self.op_cycle == 4 {
702            self.lo_byte = self.read_stack(sys)?;
703            self.sp += 1;
704            self.poll_signals(sys);
705        }
706
707        // op_cycle == 5
708        self.hi_byte = self.read_stack(sys)?;
709        self.pc = Addr::from_bytes(self.lo_byte, self.hi_byte);
710        Some(())
711    }
712
713    // EOR ($nn,X)
714    fn cycle_op_41<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
715        if self.op_cycle < 5 {
716            self.base1 = self.cycle_addr_izx(sys)?;
717        }
718
719        // op_cycle == 5
720        let val = self.load(sys, self.base1)?;
721        self.EOR(val);
722        Some(())
723    }
724
725    // KIL
726    fn cycle_op_42<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
727        self.cycle_halt(sys)
728    }
729
730    // SRE ($nn,X)
731    fn cycle_op_43<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
732        if self.op_cycle < 5 {
733            self.base1 = self.cycle_addr_izx(sys)?;
734        }
735
736        // op_cycle >= 5
737        self.cycle_rmw(sys, self.base1, Nmos::LSR, 5)?;
738        self.EOR(self.lo_byte);
739        Some(())
740    }
741
742    // NOP* $nn
743    fn cycle_op_44<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
744        if self.op_cycle == 1 {
745            self.base1 = self.addr_zp(sys)?;
746        }
747
748        // op_cycle == 2
749        self.load(sys, self.base1)?;
750        Some(())
751    }
752
753    // EOR $nn
754    fn cycle_op_45<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
755        if self.op_cycle == 1 {
756            self.base1 = self.addr_zp(sys)?;
757        }
758
759        // op_cycle == 2
760        let val = self.load(sys, self.base1)?;
761        self.EOR(val);
762        Some(())
763    }
764
765    // LSR $nn
766    fn cycle_op_46<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
767        if self.op_cycle == 1 {
768            self.base1 = self.addr_zp(sys)?;
769        }
770
771        // op_cycle >= 2
772        self.cycle_rmw(sys, self.base1, Nmos::LSR, 2)
773    }
774
775    // SRE $nn
776    fn cycle_op_47<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
777        if self.op_cycle == 1 {
778            self.base1 = self.addr_zp(sys)?;
779        }
780
781        // op_cycle >= 2
782        self.cycle_rmw(sys, self.base1, Nmos::LSR, 2)?;
783        self.EOR(self.lo_byte);
784        Some(())
785    }
786
787    // PHA
788    fn cycle_op_48<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
789        if self.op_cycle == 1 {
790            self.read(sys, self.pc)?;
791        }
792
793        // op_cycle == 2
794        self.store(sys, Addr::stack(self.sp), self.a)?;
795        self.sp -= 1;
796        Some(())
797    }
798
799    // cycle_op_49 = op_49
800    // cycle_op_4a = op_4a
801    // cycle_op_4b = op_4b
802
803    // JMP $nnnn
804    fn cycle_op_4c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
805        if self.op_cycle == 1 {
806            self.lo_byte = self.fetch_operand(sys)?;
807            self.poll_signals(sys);
808        }
809
810        // op_cycle == 2
811        self.hi_byte = self.fetch_operand(sys)?;
812        self.pc = Addr::from_bytes(self.lo_byte, self.hi_byte);
813        Some(())
814    }
815
816    // EOR $nnnn
817    fn cycle_op_4d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
818        if self.op_cycle < 3 {
819            self.base1 = self.cycle_addr_abs(sys)?;
820        }
821
822        // op_cycle == 3
823        let val = self.load(sys, self.base1)?;
824        self.EOR(val);
825        Some(())
826    }
827
828    // LSR $nnnn
829    fn cycle_op_4e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
830        if self.op_cycle < 3 {
831            self.base1 = self.cycle_addr_abs(sys)?;
832        }
833
834        // op_cycle >= 3
835        self.cycle_rmw(sys, self.base1, Nmos::LSR, 3)
836    }
837
838    // SRE $nnnn
839    fn cycle_op_4f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
840        if self.op_cycle < 3 {
841            self.base1 = self.cycle_addr_abs(sys)?;
842        }
843
844        // op_cycle >= 3
845        self.cycle_rmw(sys, self.base1, Nmos::LSR, 3)?;
846        self.EOR(self.lo_byte);
847        Some(())
848    }
849
850    // BVC
851    fn cycle_op_50<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
852        self.cycle_branch(sys, !self.flags.v())
853    }
854
855    // EOR ($nn),Y
856    fn cycle_op_51<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
857        if self.op_cycle < 5 {
858            self.base1 = self.cycle_addr_izy(sys, false)?;
859        }
860
861        // op_cycle == 5
862        let val = self.load(sys, self.base1)?;
863        self.EOR(val);
864        Some(())
865    }
866
867    // KIL
868    fn cycle_op_52<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
869        self.cycle_halt(sys)
870    }
871
872    // SRE ($nn,Y)
873    fn cycle_op_53<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
874        if self.op_cycle < 5 {
875            self.base1 = self.cycle_addr_izy(sys, true)?;
876        }
877
878        // op_cycle >= 5
879        self.cycle_rmw(sys, self.base1, Nmos::LSR, 5)?;
880        self.EOR(self.lo_byte);
881        Some(())
882    }
883
884    // NOP* $nn,X
885    fn cycle_op_54<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
886        if self.op_cycle < 3 {
887            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
888        }
889
890        // op_cycle == 3
891        self.load(sys, self.base1)?;
892        Some(())
893    }
894
895    // EOR $nn,X
896    fn cycle_op_55<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
897        if self.op_cycle < 3 {
898            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
899        }
900
901        // op_cycle == 3
902        let val = self.load(sys, self.base1)?;
903        self.EOR(val);
904        Some(())
905    }
906
907    // LSR $nn,X
908    fn cycle_op_56<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
909        if self.op_cycle < 3 {
910            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
911        }
912
913        // op_cycle >= 3
914        self.cycle_rmw(sys, self.base1, Nmos::LSR, 3)
915    }
916
917    // SRE $nn,X
918    fn cycle_op_57<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
919        if self.op_cycle < 3 {
920            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
921        }
922
923        // op_cycle >= 3
924        self.cycle_rmw(sys, self.base1, Nmos::LSR, 3)?;
925        self.EOR(self.lo_byte);
926        Some(())
927    }
928
929    // cycle_op_58 = op_58
930
931    // EOR $nnnn,Y
932    fn cycle_op_59<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
933        if self.op_cycle < 4 {
934            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
935        }
936
937        // op_cycle == 4
938        let val = self.load(sys, self.base1)?;
939        self.EOR(val);
940        Some(())
941    }
942
943    // cycle_op_5a = op_5a
944
945    // SRE $nnnn,Y
946    fn cycle_op_5b<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
947        if self.op_cycle < 4 {
948            self.base1 = self.cycle_addr_abi(sys, self.y, true)?;
949        }
950
951        // op_cycle >= 4
952        self.cycle_rmw(sys, self.base1, Nmos::LSR, 4)?;
953        self.EOR(self.lo_byte);
954        Some(())
955    }
956
957    // NOP* $nnnn,X
958    fn cycle_op_5c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
959        if self.op_cycle < 4 {
960            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
961        }
962
963        // op_cycle == 4
964        self.load(sys, self.base1)?;
965        Some(())
966    }
967
968    // EOR $nnnn,X
969    fn cycle_op_5d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
970        if self.op_cycle < 4 {
971            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
972        }
973
974        // op_cycle == 4
975        let val = self.load(sys, self.base1)?;
976        self.EOR(val);
977        Some(())
978    }
979
980    // LSR $nnnn,X
981    fn cycle_op_5e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
982        if self.op_cycle < 4 {
983            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
984        }
985
986        // op_cycle >= 4
987        self.cycle_rmw(sys, self.base1, Nmos::LSR, 4)
988    }
989
990    // SRE $nnnn,X
991    fn cycle_op_5f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
992        if self.op_cycle < 4 {
993            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
994        }
995
996        // op_cycle >= 4
997        self.cycle_rmw(sys, self.base1, Nmos::LSR, 4)?;
998        self.EOR(self.lo_byte);
999        Some(())
1000    }
1001
1002    // RTS
1003    fn cycle_op_60<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1004        if self.op_cycle == 1 {
1005            self.read(sys, self.pc)?;
1006        }
1007
1008        if self.op_cycle == 2 {
1009            self.read_stack(sys)?;
1010            self.sp += 1;
1011        }
1012
1013        if self.op_cycle == 3 {
1014            self.lo_byte = self.read_stack(sys)?;
1015            self.sp += 1;
1016        }
1017
1018        if self.op_cycle == 4 {
1019            self.hi_byte = self.read_stack(sys)?;
1020            self.pc = Addr::from_bytes(self.lo_byte, self.hi_byte);
1021            self.poll_signals(sys);
1022        }
1023
1024        // op_cycle == 5
1025        self.fetch_operand(sys)?;
1026        Some(())
1027    }
1028
1029    // ADC ($nn,X)
1030    fn cycle_op_61<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1031        if self.op_cycle < 5 {
1032            self.base1 = self.cycle_addr_izx(sys)?;
1033        }
1034
1035        // op_cycle == 5
1036        let val = self.load(sys, self.base1)?;
1037        self.ADC(val);
1038        Some(())
1039    }
1040
1041    // KIL
1042    fn cycle_op_62<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1043        self.cycle_halt(sys)
1044    }
1045
1046    // RRA ($nn,X)
1047    fn cycle_op_63<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1048        if self.op_cycle < 5 {
1049            self.base1 = self.cycle_addr_izx(sys)?;
1050        }
1051
1052        // op_cycle >= 5
1053        self.cycle_rmw(sys, self.base1, Nmos::ROR, 5)?;
1054        self.ADC(self.lo_byte);
1055        Some(())
1056    }
1057
1058    // NOP* $nn
1059    fn cycle_op_64<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1060        if self.op_cycle == 1 {
1061            self.base1 = self.addr_zp(sys)?;
1062        }
1063
1064        // op_cycle == 2
1065        self.load(sys, self.base1)?;
1066        Some(())
1067    }
1068
1069    // ADC $nn
1070    fn cycle_op_65<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1071        if self.op_cycle == 1 {
1072            self.base1 = self.addr_zp(sys)?;
1073        }
1074
1075        // op_cycle == 2
1076        let val = self.load(sys, self.base1)?;
1077        self.ADC(val);
1078        Some(())
1079    }
1080
1081    // ROR $nn
1082    fn cycle_op_66<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1083        if self.op_cycle == 1 {
1084            self.base1 = self.addr_zp(sys)?;
1085        }
1086
1087        // op_cycle >= 2
1088        self.cycle_rmw(sys, self.base1, Nmos::ROR, 2)
1089    }
1090
1091    // RRA $nn
1092    fn cycle_op_67<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1093        if self.op_cycle == 1 {
1094            self.base1 = self.addr_zp(sys)?;
1095        }
1096
1097        // op_cycle >= 2
1098        self.cycle_rmw(sys, self.base1, Nmos::ROR, 2)?;
1099        self.ADC(self.lo_byte);
1100        Some(())
1101    }
1102
1103    // PLA
1104    fn cycle_op_68<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1105        if self.op_cycle == 1 {
1106            self.read(sys, self.pc)?;
1107        }
1108
1109        if self.op_cycle == 2 {
1110            self.read_stack(sys)?;
1111            self.sp += 1;
1112        }
1113
1114        // op_cycle == 3
1115        self.a = self.load(sys, Addr::stack(self.sp))?;
1116        self.flags.nz(self.a);
1117        Some(())
1118    }
1119
1120    // cycle_op_69 = op_69
1121    // cycle_op_6a = op_6a
1122    // cycle_op_6b = op_6b
1123
1124    // JMP ($nnnn)
1125    fn cycle_op_6c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1126        if self.op_cycle < 3 {
1127            self.base1 = self.cycle_addr_abs(sys)?;
1128        }
1129
1130        if self.op_cycle == 3 {
1131            self.lo_byte = self.read(sys, self.base1)?;
1132        }
1133
1134        // op_cycle == 4
1135        self.hi_byte = self.load(sys, self.base1.no_carry(1))?;
1136        self.pc = Addr::from_bytes(self.lo_byte, self.hi_byte);
1137        Some(())
1138    }
1139
1140    // ADC $nnnn
1141    fn cycle_op_6d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1142        if self.op_cycle < 3 {
1143            self.base1 = self.cycle_addr_abs(sys)?;
1144        }
1145
1146        // op_cycle == 3
1147        let val = self.load(sys, self.base1)?;
1148        self.ADC(val);
1149        Some(())
1150    }
1151
1152    // ROR $nnnn
1153    fn cycle_op_6e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1154        if self.op_cycle < 3 {
1155            self.base1 = self.cycle_addr_abs(sys)?;
1156        }
1157
1158        // op_cycle >= 3
1159        self.cycle_rmw(sys, self.base1, Nmos::ROR, 3)
1160    }
1161
1162    fn cycle_op_6f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1163        if self.op_cycle < 3 {
1164            self.base1 = self.cycle_addr_abs(sys)?;
1165        }
1166
1167        // op_cycle >= 3
1168        self.cycle_rmw(sys, self.base1, Nmos::ROR, 3)?;
1169        self.ADC(self.lo_byte);
1170        Some(())
1171    }
1172
1173    // BVS
1174    fn cycle_op_70<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1175        self.cycle_branch(sys, self.flags.v())
1176    }
1177
1178    // ADC ($nn),Y
1179    fn cycle_op_71<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1180        if self.op_cycle < 5 {
1181            self.base1 = self.cycle_addr_izy(sys, false)?;
1182        }
1183
1184        // op_cycle == 5
1185        let val = self.load(sys, self.base1)?;
1186        self.ADC(val);
1187        Some(())
1188    }
1189
1190    // KIL
1191    fn cycle_op_72<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1192        self.cycle_halt(sys)
1193    }
1194
1195    // RRA ($nn),Y
1196    fn cycle_op_73<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1197        if self.op_cycle < 5 {
1198            self.base1 = self.cycle_addr_izy(sys, true)?;
1199        }
1200
1201        // op_cycle >= 5
1202        self.cycle_rmw(sys, self.base1, Nmos::ROR, 5)?;
1203        self.ADC(self.lo_byte);
1204        Some(())
1205    }
1206
1207    // NOP* $nn,X
1208    fn cycle_op_74<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1209        if self.op_cycle < 3 {
1210            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1211        }
1212
1213        // op_cycle == 3
1214        self.load(sys, self.base1)?;
1215        Some(())
1216    }
1217
1218    // ADC $nn,X
1219    fn cycle_op_75<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1220        if self.op_cycle < 3 {
1221            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1222        }
1223
1224        // op_cycle == 3
1225        let val = self.load(sys, self.base1)?;
1226        self.ADC(val);
1227        Some(())
1228    }
1229
1230    // ROR $nn,X
1231    fn cycle_op_76<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1232        if self.op_cycle < 3 {
1233            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1234        }
1235
1236        // op_cycle >= 3
1237        self.cycle_rmw(sys, self.base1, Nmos::ROR, 3)
1238    }
1239
1240    // RRA $nn,X
1241    fn cycle_op_77<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1242        if self.op_cycle < 3 {
1243            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1244        }
1245
1246        // op_cycle >= 3
1247        self.cycle_rmw(sys, self.base1, Nmos::ROR, 3)?;
1248        self.ADC(self.lo_byte);
1249        Some(())
1250    }
1251
1252    // cycle_op_78 = op_78
1253
1254    // ADC $nnnn,Y
1255    fn cycle_op_79<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1256        if self.op_cycle < 4 {
1257            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
1258        }
1259
1260        // op_cycle == 4
1261        let val = self.load(sys, self.base1)?;
1262        self.ADC(val);
1263        Some(())
1264    }
1265
1266    // cycle_op_7a = op_7a
1267
1268    // RRA $nnnn,Y
1269    fn cycle_op_7b<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1270        if self.op_cycle < 4 {
1271            self.base1 = self.cycle_addr_abi(sys, self.y, true)?;
1272        }
1273
1274        // op_cycle >= 4
1275        self.cycle_rmw(sys, self.base1, Nmos::ROR, 4)?;
1276        self.ADC(self.lo_byte);
1277        Some(())
1278    }
1279
1280    // NOP* $nnnn,X
1281    fn cycle_op_7c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1282        if self.op_cycle < 4 {
1283            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
1284        }
1285
1286        // op_cycle == 4
1287        self.load(sys, self.base1)?;
1288        Some(())
1289    }
1290
1291    // ADC $nnnn,X
1292    fn cycle_op_7d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1293        if self.op_cycle < 4 {
1294            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
1295        }
1296
1297        // op_cycle == 4
1298        let val = self.load(sys, self.base1)?;
1299        self.ADC(val);
1300        Some(())
1301    }
1302
1303    // ROR $nnnn,X
1304    fn cycle_op_7e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1305        if self.op_cycle < 4 {
1306            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
1307        }
1308
1309        // op_cycle >= 4
1310        self.cycle_rmw(sys, self.base1, Nmos::ROR, 4)
1311    }
1312
1313    // RRA $nnnn,X
1314    fn cycle_op_7f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1315        if self.op_cycle < 4 {
1316            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
1317        }
1318
1319        // op_cycle >= 4
1320        self.cycle_rmw(sys, self.base1, Nmos::ROR, 4)?;
1321        self.ADC(self.lo_byte);
1322        Some(())
1323    }
1324
1325    // cycle_op_80 = op_80
1326
1327    // STA ($nn,X)
1328    fn cycle_op_81<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1329        if self.op_cycle < 5 {
1330            self.base1 = self.cycle_addr_izx(sys)?;
1331        }
1332
1333        // op_cycle == 5
1334        self.store(sys, self.base1, self.a)
1335    }
1336
1337    // cycle_op_82 = op_82
1338
1339    // SAX ($nn,X)
1340    fn cycle_op_83<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1341        if self.op_cycle < 5 {
1342            self.base1 = self.cycle_addr_izx(sys)?;
1343        }
1344
1345        // op_cycle == 5
1346        self.store(sys, self.base1, self.a & self.x)
1347    }
1348
1349    // STY $nn
1350    fn cycle_op_84<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1351        if self.op_cycle == 1 {
1352            self.base1 = self.addr_zp(sys)?;
1353        }
1354
1355        // op_cycle == 2
1356        self.store(sys, self.base1, self.y)
1357    }
1358
1359    // STA $nn
1360    fn cycle_op_85<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1361        if self.op_cycle == 1 {
1362            self.base1 = self.addr_zp(sys)?;
1363        }
1364
1365        // op_cycle == 2
1366        self.store(sys, self.base1, self.a)
1367    }
1368
1369    // STX $nn
1370    fn cycle_op_86<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1371        if self.op_cycle == 1 {
1372            self.base1 = self.addr_zp(sys)?;
1373        }
1374
1375        // op_cycle == 2
1376        self.store(sys, self.base1, self.x)
1377    }
1378
1379    // SAX $nn
1380    fn cycle_op_87<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1381        if self.op_cycle == 1 {
1382            self.base1 = self.addr_zp(sys)?;
1383        }
1384
1385        // op_cycle == 2
1386        self.store(sys, self.base1, self.a & self.x)
1387    }
1388
1389    // cycle_op_88 = op_88
1390    // cycle_op_89 = op_89
1391    // cycle_op_8a = op_8a
1392    // cycle_op_8b = op_8b
1393
1394    // STY $nnnn
1395    fn cycle_op_8c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1396        if self.op_cycle < 3 {
1397            self.base1 = self.cycle_addr_abs(sys)?;
1398        }
1399
1400        // op_cycle == 3
1401        self.store(sys, self.base1, self.y)
1402    }
1403
1404    // STA $nnnn
1405    fn cycle_op_8d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1406        if self.op_cycle < 3 {
1407            self.base1 = self.cycle_addr_abs(sys)?;
1408        }
1409
1410        // op_cycle == 3
1411        self.store(sys, self.base1, self.a)
1412    }
1413
1414    // STX $nnnn
1415    fn cycle_op_8e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1416        if self.op_cycle < 3 {
1417            self.base1 = self.cycle_addr_abs(sys)?;
1418        }
1419
1420        // op_cycle == 3
1421        self.store(sys, self.base1, self.x)
1422    }
1423
1424    // SAX $nnnn
1425    fn cycle_op_8f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1426        if self.op_cycle < 3 {
1427            self.base1 = self.cycle_addr_abs(sys)?;
1428        }
1429
1430        // op_cycle == 3
1431        self.store(sys, self.base1, self.a & self.x)
1432    }
1433
1434    // BCC
1435    fn cycle_op_90<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1436        self.cycle_branch(sys, !self.flags.c())
1437    }
1438
1439    // STA ($nn),Y
1440    fn cycle_op_91<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1441        if self.op_cycle < 5 {
1442            self.base1 = self.cycle_addr_izy(sys, true)?;
1443        }
1444
1445        // op_cycle == 5
1446        self.store(sys, self.base1, self.a)
1447    }
1448
1449    // KIL
1450    fn cycle_op_92<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1451        self.cycle_halt(sys)
1452    }
1453
1454    // AHX ($nn),Y
1455    fn cycle_op_93<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1456        if self.op_cycle == 1 {
1457            self.base1 = self.addr_zp(sys)?;
1458        }
1459
1460        if self.op_cycle < 4 {
1461            self.base1 = self.cycle_fetch_vector_zp(sys, self.base1, 2)?;
1462        }
1463
1464        if self.op_cycle == 4 {
1465            // TODO: match and check if sys.rdy to remove &{H+1}
1466            self.read(sys, self.base1.no_carry(self.y))?;
1467            self.lo_byte = self.a & self.x & (self.base1.hi() + 1);
1468            if self.base1.check_carry(self.y) {
1469                self.base1 =
1470                    Addr::from_bytes((self.base1 + self.y).lo(), self.lo_byte);
1471            } else {
1472                self.base1 += self.y
1473            }
1474        }
1475
1476        // op_cycle == 5
1477        self.store(sys, self.base1, self.lo_byte)
1478    }
1479
1480    // STY $nn,X
1481    fn cycle_op_94<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1482        if self.op_cycle < 3 {
1483            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1484        }
1485
1486        // op_cycle == 3
1487        self.store(sys, self.base1, self.y)
1488    }
1489
1490    // STA $nn,X
1491    fn cycle_op_95<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1492        if self.op_cycle < 3 {
1493            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1494        }
1495
1496        // op_cycle == 3
1497        self.store(sys, self.base1, self.a)
1498    }
1499
1500    // STX $nn,Y
1501    fn cycle_op_96<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1502        if self.op_cycle < 3 {
1503            self.base1 = self.cycle_addr_zpi(sys, self.y)?;
1504        }
1505
1506        // op_cycle == 3
1507        self.store(sys, self.base1, self.x)
1508    }
1509
1510    // SAX $nn,Y
1511    fn cycle_op_97<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1512        if self.op_cycle < 3 {
1513            self.base1 = self.cycle_addr_zpi(sys, self.y)?;
1514        }
1515
1516        // op_cycle == 3
1517        self.store(sys, self.base1, self.a & self.x)
1518    }
1519
1520    // cycle_op_98 = op_98
1521
1522    // STA $nnnn,Y
1523    fn cycle_op_99<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1524        if self.op_cycle < 4 {
1525            self.base1 = self.cycle_addr_abi(sys, self.y, true)?;
1526        }
1527
1528        // op_cycle == 4
1529        self.store(sys, self.base1, self.a)
1530    }
1531
1532    // cycle_op_9a = op_9a
1533
1534    // TAS $nnnn,Y
1535    fn cycle_op_9b<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1536        if self.op_cycle < 3 {
1537            self.base1 = self.cycle_addr_abs(sys)?;
1538        }
1539
1540        if self.op_cycle == 3 {
1541            // TODO: match and check if sys.rdy to remove &{H+1}
1542            self.read(sys, self.base1.no_carry(self.y))?;
1543            self.sp = self.a & self.x;
1544            self.lo_byte = self.a & self.x & (self.base1.hi() + 1);
1545            if self.base1.check_carry(self.y) {
1546                self.base1 =
1547                    Addr::from_bytes((self.base1 + self.y).lo(), self.lo_byte);
1548            } else {
1549                self.base1 += self.y
1550            }
1551        }
1552
1553        // op_cycle == 4
1554        self.store(sys, self.base1, self.lo_byte)
1555    }
1556
1557    // SHY $nnnn,X
1558    fn cycle_op_9c<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1559        if self.op_cycle < 3 {
1560            self.base1 = self.cycle_addr_abs(sys)?;
1561        }
1562
1563        if self.op_cycle == 3 {
1564            // TODO: match and check if sys.rdy to remove &{H+1}
1565            self.read(sys, self.base1.no_carry(self.x))?;
1566            self.lo_byte = self.y & (self.base1.hi() + 1);
1567            if self.base1.check_carry(self.x) {
1568                self.base1 =
1569                    Addr::from_bytes((self.base1 + self.x).lo(), self.lo_byte);
1570            } else {
1571                self.base1 += self.x
1572            }
1573        }
1574
1575        // op_cycle == 4
1576        self.store(sys, self.base1, self.lo_byte)
1577    }
1578
1579    // STA $nnnn,X
1580    fn cycle_op_9d<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1581        if self.op_cycle < 4 {
1582            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
1583        }
1584
1585        // op_cycle == 4
1586        self.store(sys, self.base1, self.a)
1587    }
1588
1589    // SHX $nnnn,Y
1590    fn cycle_op_9e<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1591        if self.op_cycle < 3 {
1592            self.base1 = self.cycle_addr_abs(sys)?;
1593        }
1594
1595        if self.op_cycle == 3 {
1596            // TODO: match and check if sys.rdy to remove &{H+1}
1597            self.read(sys, self.base1.no_carry(self.y))?;
1598            self.lo_byte = self.x & (self.base1.hi() + 1);
1599            if self.base1.check_carry(self.y) {
1600                self.base1 =
1601                    Addr::from_bytes((self.base1 + self.y).lo(), self.lo_byte);
1602            } else {
1603                self.base1 += self.y
1604            }
1605        }
1606
1607        // op_cycle == 4
1608        self.store(sys, self.base1, self.lo_byte)
1609    }
1610
1611    // AHX $nnnn,Y
1612    fn cycle_op_9f<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1613        if self.op_cycle < 3 {
1614            self.base1 = self.cycle_addr_abs(sys)?;
1615        }
1616
1617        if self.op_cycle == 3 {
1618            // TODO: match and check if sys.rdy to remove &{H+1}
1619            self.read(sys, self.base1.no_carry(self.y))?;
1620            self.lo_byte = self.a & self.x & (self.base1.hi() + 1);
1621            if self.base1.check_carry(self.y) {
1622                self.base1 =
1623                    Addr::from_bytes((self.base1 + self.y).lo(), self.lo_byte);
1624            } else {
1625                self.base1 += self.y
1626            }
1627        }
1628
1629        // op_cycle == 4
1630        self.store(sys, self.base1, self.lo_byte)
1631    }
1632
1633    // cycle_op_a0 = op_a0
1634
1635    // LDA ($nn,X)
1636    fn cycle_op_a1<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1637        if self.op_cycle < 5 {
1638            self.base1 = self.cycle_addr_izx(sys)?;
1639        }
1640
1641        // op_cycle == 5
1642        self.a = self.load(sys, self.base1)?;
1643        self.flags.nz(self.a);
1644        Some(())
1645    }
1646
1647    // cycle_op_a2 = op_a2
1648
1649    // LAX ($nn,X)
1650    fn cycle_op_a3<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1651        if self.op_cycle < 5 {
1652            self.base1 = self.cycle_addr_izx(sys)?;
1653        }
1654
1655        // op_cycle == 5
1656        self.x = self.load(sys, self.base1)?;
1657        self.a = self.x;
1658        self.flags.nz(self.x);
1659        Some(())
1660    }
1661
1662    // LDY $nn
1663    fn cycle_op_a4<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1664        if self.op_cycle == 1 {
1665            self.base1 = self.addr_zp(sys)?;
1666        }
1667
1668        // op_cycle == 2
1669        self.y = self.load(sys, self.base1)?;
1670        self.flags.nz(self.y);
1671        Some(())
1672    }
1673
1674    // LDA $nn
1675    fn cycle_op_a5<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1676        if self.op_cycle == 1 {
1677            self.base1 = self.addr_zp(sys)?;
1678        }
1679
1680        // op_cycle == 2
1681        self.a = self.load(sys, self.base1)?;
1682        self.flags.nz(self.a);
1683        Some(())
1684    }
1685
1686    // LDX $nn
1687    fn cycle_op_a6<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1688        if self.op_cycle == 1 {
1689            self.base1 = self.addr_zp(sys)?;
1690        }
1691
1692        // op_cycle == 2
1693        self.x = self.load(sys, self.base1)?;
1694        self.flags.nz(self.x);
1695        Some(())
1696    }
1697
1698    // LAX $nn
1699    fn cycle_op_a7<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1700        if self.op_cycle == 1 {
1701            self.base1 = self.addr_zp(sys)?;
1702        }
1703
1704        // op_cycle == 2
1705        self.x = self.load(sys, self.base1)?;
1706        self.a = self.x;
1707        self.flags.nz(self.x);
1708        Some(())
1709    }
1710
1711    // cycle_op_a8 = op_a8
1712    // cycle_op_a9 = op_a9
1713    // cycle_op_aa = op_aa
1714    // cycle_op_ab = op_ab
1715
1716    // LDY $nnnn
1717    fn cycle_op_ac<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1718        if self.op_cycle < 3 {
1719            self.base1 = self.cycle_addr_abs(sys)?;
1720        }
1721
1722        // op_cycle == 3
1723        self.y = self.load(sys, self.base1)?;
1724        self.flags.nz(self.y);
1725        Some(())
1726    }
1727
1728    // LDA $nnnn
1729    fn cycle_op_ad<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1730        if self.op_cycle < 3 {
1731            self.base1 = self.cycle_addr_abs(sys)?;
1732        }
1733
1734        // op_cycle == 3
1735        self.a = self.load(sys, self.base1)?;
1736        self.flags.nz(self.a);
1737        Some(())
1738    }
1739
1740    // LDX $nnnn
1741    fn cycle_op_ae<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1742        if self.op_cycle < 3 {
1743            self.base1 = self.cycle_addr_abs(sys)?;
1744        }
1745
1746        // op_cycle == 3
1747        self.x = self.load(sys, self.base1)?;
1748        self.flags.nz(self.x);
1749        Some(())
1750    }
1751
1752    // LAX $nnnn
1753    fn cycle_op_af<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1754        if self.op_cycle < 3 {
1755            self.base1 = self.cycle_addr_abs(sys)?;
1756        }
1757
1758        // op_cycle == 3
1759        self.x = self.load(sys, self.base1)?;
1760        self.a = self.x;
1761        self.flags.nz(self.x);
1762        Some(())
1763    }
1764
1765    // BCS
1766    fn cycle_op_b0<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1767        self.cycle_branch(sys, self.flags.c())
1768    }
1769
1770    // LDA ($nn),Y
1771    fn cycle_op_b1<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1772        if self.op_cycle < 5 {
1773            self.base1 = self.cycle_addr_izy(sys, false)?;
1774        }
1775
1776        // op_cycle == 5
1777        self.a = self.load(sys, self.base1)?;
1778        self.flags.nz(self.a);
1779        Some(())
1780    }
1781
1782    // KIL
1783    fn cycle_op_b2<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1784        self.cycle_halt(sys)
1785    }
1786
1787    // LAX ($nn,Y)
1788    fn cycle_op_b3<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1789        if self.op_cycle < 5 {
1790            self.base1 = self.cycle_addr_izy(sys, false)?;
1791        }
1792
1793        // op_cycle == 5
1794        self.x = self.load(sys, self.base1)?;
1795        self.a = self.x;
1796        self.flags.nz(self.x);
1797        Some(())
1798    }
1799
1800    // LDY $nn,X
1801    fn cycle_op_b4<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1802        if self.op_cycle < 3 {
1803            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1804        }
1805
1806        // op_cycle == 3
1807        self.y = self.load(sys, self.base1)?;
1808        self.flags.nz(self.y);
1809        Some(())
1810    }
1811
1812    // LDA $nn,X
1813    fn cycle_op_b5<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1814        if self.op_cycle < 3 {
1815            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
1816        }
1817
1818        // op_cycle == 3
1819        self.a = self.load(sys, self.base1)?;
1820        self.flags.nz(self.a);
1821        Some(())
1822    }
1823
1824    // LDX $nn,Y
1825    fn cycle_op_b6<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1826        if self.op_cycle < 3 {
1827            self.base1 = self.cycle_addr_zpi(sys, self.y)?;
1828        }
1829
1830        // op_cycle == 3
1831        self.x = self.load(sys, self.base1)?;
1832        self.flags.nz(self.x);
1833        Some(())
1834    }
1835
1836    // LAX $nn,Y
1837    fn cycle_op_b7<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1838        if self.op_cycle < 3 {
1839            self.base1 = self.cycle_addr_zpi(sys, self.y)?;
1840        }
1841
1842        // op_cycle == 3
1843        self.x = self.load(sys, self.base1)?;
1844        self.a = self.x;
1845        self.flags.nz(self.x);
1846        Some(())
1847    }
1848
1849    // cycle_op_b8 = op_b8
1850
1851    // LDA $nnnn,Y
1852    fn cycle_op_b9<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1853        if self.op_cycle < 4 {
1854            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
1855        }
1856
1857        // op_cycle == 4
1858        self.a = self.load(sys, self.base1)?;
1859        self.flags.nz(self.a);
1860        Some(())
1861    }
1862
1863    // cycle_op_ba = op_ba
1864
1865    // LAS $nnnn,Y
1866    fn cycle_op_bb<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1867        if self.op_cycle < 4 {
1868            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
1869        }
1870
1871        // op_cycle == 4
1872        let val = self.load(sys, self.base1)?;
1873        self.sp &= val;
1874        self.a = self.sp;
1875        self.x = self.sp;
1876        Some(())
1877    }
1878
1879    // LDY $nnnn,X
1880    fn cycle_op_bc<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1881        if self.op_cycle < 4 {
1882            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
1883        }
1884
1885        // op_cycle == 4
1886        self.y = self.load(sys, self.base1)?;
1887        self.flags.nz(self.y);
1888        Some(())
1889    }
1890
1891    // LDA $nnnn,X
1892    fn cycle_op_bd<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1893        if self.op_cycle < 4 {
1894            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
1895        }
1896
1897        // op_cycle == 4
1898        self.a = self.load(sys, self.base1)?;
1899        self.flags.nz(self.a);
1900        Some(())
1901    }
1902
1903    // LDX $nnnn,Y
1904    fn cycle_op_be<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1905        if self.op_cycle < 4 {
1906            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
1907        }
1908
1909        // op_cycle == 4
1910        self.x = self.load(sys, self.base1)?;
1911        self.flags.nz(self.x);
1912        Some(())
1913    }
1914
1915    // LAX $nnnn,Y
1916    fn cycle_op_bf<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1917        if self.op_cycle < 4 {
1918            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
1919        }
1920
1921        // op_cycle == 4
1922        self.x = self.load(sys, self.base1)?;
1923        self.a = self.x;
1924        self.flags.nz(self.x);
1925        Some(())
1926    }
1927
1928    // cycle_op_c0 = op_c0
1929
1930    // CMP ($nn,X)
1931    fn cycle_op_c1<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1932        if self.op_cycle < 5 {
1933            self.base1 = self.cycle_addr_izx(sys)?;
1934        }
1935
1936        // op_cycle == 5
1937        let val = self.load(sys, self.base1)?;
1938        self.CMP(self.a, val);
1939        Some(())
1940    }
1941
1942    // cycle_op_c2 = op_c2
1943
1944    // DCP ($nn,X)
1945    fn cycle_op_c3<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1946        if self.op_cycle < 5 {
1947            self.base1 = self.cycle_addr_izx(sys)?;
1948        }
1949
1950        // op_cycle >= 5
1951        self.cycle_rmw(sys, self.base1, Nmos::DEC, 5)?;
1952        self.CMP(self.a, self.lo_byte);
1953        Some(())
1954    }
1955
1956    // CPY $nn
1957    fn cycle_op_c4<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1958        if self.op_cycle == 1 {
1959            self.base1 = self.addr_zp(sys)?;
1960        }
1961
1962        // op_cycle == 2
1963        let val = self.load(sys, self.base1)?;
1964        self.CMP(self.y, val);
1965        Some(())
1966    }
1967
1968    // CMP $nn
1969    fn cycle_op_c5<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1970        if self.op_cycle == 1 {
1971            self.base1 = self.addr_zp(sys)?;
1972        }
1973
1974        // op_cycle == 2
1975        let val = self.load(sys, self.base1)?;
1976        self.CMP(self.a, val);
1977        Some(())
1978    }
1979
1980    // DEC $nn
1981    fn cycle_op_c6<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1982        if self.op_cycle == 1 {
1983            self.base1 = self.addr_zp(sys)?;
1984        }
1985
1986        // op_cycle >= 2
1987        self.cycle_rmw(sys, self.base1, Nmos::DEC, 2)
1988    }
1989
1990    // DCP $nn
1991    fn cycle_op_c7<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
1992        if self.op_cycle == 1 {
1993            self.base1 = self.addr_zp(sys)?;
1994        }
1995
1996        // op_cycle >= 2
1997        self.cycle_rmw(sys, self.base1, Nmos::DEC, 2)?;
1998        self.CMP(self.a, self.lo_byte);
1999        Some(())
2000    }
2001
2002    // cycle_op_c8 = op_c8
2003    // cycle_op_c9 = op_c9
2004    // cycle_op_ca = op_ca
2005    // cycle_op_cb = op_cb
2006
2007    // CPY $nnnn
2008    fn cycle_op_cc<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2009        if self.op_cycle < 3 {
2010            self.base1 = self.cycle_addr_abs(sys)?;
2011        }
2012
2013        // op_cycle == 3
2014        let val = self.load(sys, self.base1)?;
2015        self.CMP(self.y, val);
2016        Some(())
2017    }
2018
2019    // CMP $nnnn
2020    fn cycle_op_cd<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2021        if self.op_cycle < 3 {
2022            self.base1 = self.cycle_addr_abs(sys)?;
2023        }
2024
2025        // op_cycle == 3
2026        let val = self.load(sys, self.base1)?;
2027        self.CMP(self.a, val);
2028        Some(())
2029    }
2030
2031    // DEC $nnnn
2032    fn cycle_op_ce<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2033        if self.op_cycle < 3 {
2034            self.base1 = self.cycle_addr_abs(sys)?;
2035        }
2036
2037        // op_cycle >= 3
2038        self.cycle_rmw(sys, self.base1, Nmos::DEC, 3)
2039    }
2040
2041    // DCP $nnnn
2042    fn cycle_op_cf<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2043        if self.op_cycle < 3 {
2044            self.base1 = self.cycle_addr_abs(sys)?;
2045        }
2046
2047        // op_cycle >= 3
2048        self.cycle_rmw(sys, self.base1, Nmos::DEC, 3)?;
2049        self.CMP(self.a, self.lo_byte);
2050        Some(())
2051    }
2052
2053    // BNE
2054    fn cycle_op_d0<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2055        self.cycle_branch(sys, !self.flags.z())
2056    }
2057
2058    // CMP($nn),Y
2059    fn cycle_op_d1<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2060        if self.op_cycle < 5 {
2061            self.base1 = self.cycle_addr_izy(sys, false)?;
2062        }
2063
2064        // op_cycle == 5
2065        let val = self.load(sys, self.base1)?;
2066        self.CMP(self.a, val);
2067        Some(())
2068    }
2069
2070    // KIL
2071    fn cycle_op_d2<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2072        self.cycle_halt(sys)
2073    }
2074
2075    // DCP ($nn),Y
2076    fn cycle_op_d3<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2077        if self.op_cycle < 5 {
2078            self.base1 = self.cycle_addr_izy(sys, true)?;
2079        }
2080
2081        // op_cycle >= 5
2082        self.cycle_rmw(sys, self.base1, Nmos::DEC, 5)?;
2083        self.CMP(self.a, self.lo_byte);
2084        Some(())
2085    }
2086
2087    // NOP* $nn,X
2088    fn cycle_op_d4<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2089        if self.op_cycle < 3 {
2090            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2091        }
2092
2093        // op_cycle == 3
2094        self.load(sys, self.base1)?;
2095        Some(())
2096    }
2097
2098    // CMP $nn,X
2099    fn cycle_op_d5<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2100        if self.op_cycle < 3 {
2101            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2102        }
2103
2104        // op_cycle == 3
2105        let val = self.load(sys, self.base1)?;
2106        self.CMP(self.a, val);
2107        Some(())
2108    }
2109
2110    // DEC $nn,X
2111    fn cycle_op_d6<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2112        if self.op_cycle < 3 {
2113            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2114        }
2115
2116        // op_cycle >= 3
2117        self.cycle_rmw(sys, self.base1, Nmos::DEC, 3)
2118    }
2119
2120    // DCP $nn,X
2121    fn cycle_op_d7<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2122        if self.op_cycle < 3 {
2123            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2124        }
2125
2126        // op_cycle >= 3
2127        self.cycle_rmw(sys, self.base1, Nmos::DEC, 3)?;
2128        self.CMP(self.a, self.lo_byte);
2129        Some(())
2130    }
2131
2132    // cycle_op_d8 = op_d8
2133
2134    // CMP $nnnn,Y
2135    fn cycle_op_d9<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2136        if self.op_cycle < 4 {
2137            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
2138        }
2139
2140        // op_cycle == 4
2141        let val = self.load(sys, self.base1)?;
2142        self.CMP(self.a, val);
2143        Some(())
2144    }
2145
2146    // cycle_op_da = op_da
2147
2148    // DCP $nnnn,Y
2149    fn cycle_op_db<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2150        if self.op_cycle < 4 {
2151            self.base1 = self.cycle_addr_abi(sys, self.y, true)?;
2152        }
2153
2154        // op_cycle >= 4
2155        self.cycle_rmw(sys, self.base1, Nmos::DEC, 4)?;
2156        self.CMP(self.a, self.lo_byte);
2157        Some(())
2158    }
2159
2160    // NOP* $nnnn,X
2161    fn cycle_op_dc<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2162        if self.op_cycle < 4 {
2163            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
2164        }
2165
2166        // op_cycle == 4
2167        self.load(sys, self.base1)?;
2168        Some(())
2169    }
2170
2171    // CMP $nnnn,X
2172    fn cycle_op_dd<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2173        if self.op_cycle < 4 {
2174            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
2175        }
2176
2177        // op_cycle == 4
2178        let val = self.load(sys, self.base1)?;
2179        self.CMP(self.a, val);
2180        Some(())
2181    }
2182
2183    // DEC $nnnn,X
2184    fn cycle_op_de<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2185        if self.op_cycle < 4 {
2186            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
2187        }
2188
2189        // op_cycle >= 4
2190        self.cycle_rmw(sys, self.base1, Nmos::DEC, 4)
2191    }
2192
2193    // DCP $nnnn,X
2194    fn cycle_op_df<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2195        if self.op_cycle < 4 {
2196            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
2197        }
2198
2199        // op_cycle >= 4
2200        self.cycle_rmw(sys, self.base1, Nmos::DEC, 4)?;
2201        self.CMP(self.a, self.lo_byte);
2202        Some(())
2203    }
2204
2205    // cycle_op_e0 = op_e0
2206
2207    // SBC ($nn,X)
2208    fn cycle_op_e1<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2209        if self.op_cycle < 5 {
2210            self.base1 = self.cycle_addr_izx(sys)?;
2211        }
2212
2213        // op_cycle == 5
2214        let val = self.load(sys, self.base1)?;
2215        self.SBC(val);
2216        Some(())
2217    }
2218
2219    // cycle_op_e2 = op_e2
2220
2221    // ISC ($nn,X)
2222    fn cycle_op_e3<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2223        if self.op_cycle < 5 {
2224            self.base1 = self.cycle_addr_izx(sys)?;
2225        }
2226
2227        // op_cycle >= 5
2228        self.cycle_rmw(sys, self.base1, Nmos::INC, 5)?;
2229        self.SBC(self.lo_byte);
2230        Some(())
2231    }
2232
2233    // CPX $nn
2234    fn cycle_op_e4<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2235        if self.op_cycle == 1 {
2236            self.base1 = self.addr_zp(sys)?;
2237        }
2238
2239        // op_cycle == 2
2240        let val = self.load(sys, self.base1)?;
2241        self.CMP(self.x, val);
2242        Some(())
2243    }
2244
2245    // SBC $nn
2246    fn cycle_op_e5<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2247        if self.op_cycle == 1 {
2248            self.base1 = self.addr_zp(sys)?;
2249        }
2250
2251        // op_cycle == 2
2252        let val = self.load(sys, self.base1)?;
2253        self.SBC(val);
2254        Some(())
2255    }
2256
2257    // INC $nn
2258    fn cycle_op_e6<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2259        if self.op_cycle == 1 {
2260            self.base1 = self.addr_zp(sys)?;
2261        }
2262
2263        // op_cycle >= 2
2264        self.cycle_rmw(sys, self.base1, Nmos::INC, 2)
2265    }
2266
2267    // ISC $nn
2268    fn cycle_op_e7<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2269        if self.op_cycle == 1 {
2270            self.base1 = self.addr_zp(sys)?;
2271        }
2272
2273        // op_cycle >= 2
2274        self.cycle_rmw(sys, self.base1, Nmos::INC, 2)?;
2275        self.SBC(self.lo_byte);
2276        Some(())
2277    }
2278
2279    // cycle_op_e8 = op_e8
2280    // cycle_op_e9 = op_e9
2281    // cycle_op_ea = op_ea
2282    // cycle_op_eb = op_eb
2283
2284    // CPX $nnnn
2285    fn cycle_op_ec<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2286        if self.op_cycle < 3 {
2287            self.base1 = self.cycle_addr_abs(sys)?;
2288        }
2289
2290        // op_cycle == 3
2291        let val = self.load(sys, self.base1)?;
2292        self.CMP(self.x, val);
2293        Some(())
2294    }
2295
2296    // SBC $nnnn
2297    fn cycle_op_ed<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2298        if self.op_cycle < 3 {
2299            self.base1 = self.cycle_addr_abs(sys)?;
2300        }
2301
2302        // op_cycle == 3
2303        let val = self.load(sys, self.base1)?;
2304        self.SBC(val);
2305        Some(())
2306    }
2307
2308    // INC $nnnn
2309    fn cycle_op_ee<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2310        if self.op_cycle < 3 {
2311            self.base1 = self.cycle_addr_abs(sys)?;
2312        }
2313
2314        // op_cycle >= 3
2315        self.cycle_rmw(sys, self.base1, Nmos::INC, 3)
2316    }
2317
2318    // ISC $nnnn
2319    fn cycle_op_ef<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2320        if self.op_cycle < 3 {
2321            self.base1 = self.cycle_addr_abs(sys)?;
2322        }
2323
2324        // op_cycle >= 3
2325        self.cycle_rmw(sys, self.base1, Nmos::INC, 3)?;
2326        self.SBC(self.lo_byte);
2327        Some(())
2328    }
2329
2330    // BEQ
2331    fn cycle_op_f0<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2332        self.cycle_branch(sys, self.flags.z())
2333    }
2334
2335    // SBC ($nn),Y
2336    fn cycle_op_f1<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2337        if self.op_cycle < 5 {
2338            self.base1 = self.cycle_addr_izy(sys, false)?;
2339        }
2340
2341        // op_cycle == 5
2342        let val = self.load(sys, self.base1)?;
2343        self.SBC(val);
2344        Some(())
2345    }
2346
2347    // KIL
2348    fn cycle_op_f2<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2349        self.cycle_halt(sys)
2350    }
2351
2352    // ISC ($nn),Y
2353    fn cycle_op_f3<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2354        if self.op_cycle < 5 {
2355            self.base1 = self.cycle_addr_izy(sys, true)?;
2356        }
2357
2358        // op_cycle >= 5
2359        self.cycle_rmw(sys, self.base1, Nmos::INC, 5)?;
2360        self.SBC(self.lo_byte);
2361        Some(())
2362    }
2363
2364    // NOP* $nn,X
2365    fn cycle_op_f4<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2366        if self.op_cycle < 3 {
2367            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2368        }
2369
2370        // op_cycle == 3
2371        self.load(sys, self.base1)?;
2372        Some(())
2373    }
2374
2375    // SBC $nn,X
2376    fn cycle_op_f5<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2377        if self.op_cycle < 3 {
2378            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2379        }
2380
2381        // op_cycle == 3
2382        let val = self.load(sys, self.base1)?;
2383        self.SBC(val);
2384        Some(())
2385    }
2386
2387    // INC $nn,X
2388    fn cycle_op_f6<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2389        if self.op_cycle < 3 {
2390            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2391        }
2392
2393        // op_cycle >= 3
2394        self.cycle_rmw(sys, self.base1, Nmos::INC, 3)
2395    }
2396
2397    // ISC $nn,X
2398    fn cycle_op_f7<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2399        if self.op_cycle < 3 {
2400            self.base1 = self.cycle_addr_zpi(sys, self.x)?;
2401        }
2402
2403        // op_cycle >= 3
2404        self.cycle_rmw(sys, self.base1, Nmos::INC, 3)?;
2405        self.SBC(self.lo_byte);
2406        Some(())
2407    }
2408
2409    // cycle_op_f8 = op_f8
2410
2411    // SBC $nnnn,Y
2412    fn cycle_op_f9<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2413        if self.op_cycle < 4 {
2414            self.base1 = self.cycle_addr_abi(sys, self.y, false)?;
2415        }
2416
2417        // op_cycle == 4
2418        let val = self.load(sys, self.base1)?;
2419        self.SBC(val);
2420        Some(())
2421    }
2422
2423    // cycle_op_fa = op_fa
2424
2425    // ISC $nnnn,Y
2426    fn cycle_op_fb<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2427        if self.op_cycle < 4 {
2428            self.base1 = self.cycle_addr_abi(sys, self.y, true)?;
2429        }
2430
2431        // op_cycle >= 4
2432        self.cycle_rmw(sys, self.base1, Nmos::INC, 4)?;
2433        self.SBC(self.lo_byte);
2434        Some(())
2435    }
2436
2437    // NOP* $nnnn,X
2438    fn cycle_op_fc<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2439        if self.op_cycle < 4 {
2440            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
2441        }
2442
2443        // op_cycle == 4
2444        self.load(sys, self.base1)?;
2445        Some(())
2446    }
2447
2448    // SBC $nnnn,X
2449    fn cycle_op_fd<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2450        if self.op_cycle < 4 {
2451            self.base1 = self.cycle_addr_abi(sys, self.x, false)?;
2452        }
2453
2454        // op_cycle == 4
2455        let val = self.load(sys, self.base1)?;
2456        self.SBC(val);
2457        Some(())
2458    }
2459
2460    // INC $nnnn,X
2461    fn cycle_op_fe<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2462        if self.op_cycle < 4 {
2463            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
2464        }
2465
2466        // op_cycle >= 4
2467        self.cycle_rmw(sys, self.base1, Nmos::INC, 4)
2468    }
2469
2470    // ISC $nnnn,X
2471    fn cycle_op_ff<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2472        if self.op_cycle < 4 {
2473            self.base1 = self.cycle_addr_abi(sys, self.x, true)?;
2474        }
2475
2476        // op_cycle >= 4
2477        self.cycle_rmw(sys, self.base1, Nmos::INC, 4)?;
2478        self.SBC(self.lo_byte);
2479        Some(())
2480    }
2481}
2482
2483impl Nmos {
2484    #[cfg_attr(
2485        feature = "cargo-clippy",
2486        allow(clippy::cyclomatic_complexity)
2487    )]
2488    pub(crate) fn cycle_exec<S: Sys>(&mut self, sys: &mut S) -> Option<()> {
2489        match self.op {
2490            0x00 => self.cycle_op_00(sys)?,
2491            0x01 => self.cycle_op_01(sys)?,
2492            0x02 => self.cycle_op_02(sys)?,
2493            0x03 => self.cycle_op_03(sys)?,
2494            0x04 => self.cycle_op_04(sys)?,
2495            0x05 => self.cycle_op_05(sys)?,
2496            0x06 => self.cycle_op_06(sys)?,
2497            0x07 => self.cycle_op_07(sys)?,
2498            0x08 => self.cycle_op_08(sys)?,
2499            0x09 => self.op_09(sys)?,
2500            0x0a => self.op_0a(sys)?,
2501            0x0b => self.op_0b(sys)?,
2502            0x0c => self.cycle_op_0c(sys)?,
2503            0x0d => self.cycle_op_0d(sys)?,
2504            0x0e => self.cycle_op_0e(sys)?,
2505            0x0f => self.cycle_op_0f(sys)?,
2506            0x10 => self.cycle_op_10(sys)?,
2507            0x11 => self.cycle_op_11(sys)?,
2508            0x12 => self.cycle_op_12(sys)?,
2509            0x13 => self.cycle_op_13(sys)?,
2510            0x14 => self.cycle_op_14(sys)?,
2511            0x15 => self.cycle_op_15(sys)?,
2512            0x16 => self.cycle_op_16(sys)?,
2513            0x17 => self.cycle_op_17(sys)?,
2514            0x18 => self.op_18(sys)?,
2515            0x19 => self.cycle_op_19(sys)?,
2516            0x1a => self.op_1a(sys)?,
2517            0x1b => self.cycle_op_1b(sys)?,
2518            0x1c => self.cycle_op_1c(sys)?,
2519            0x1d => self.cycle_op_1d(sys)?,
2520            0x1e => self.cycle_op_1e(sys)?,
2521            0x1f => self.cycle_op_1f(sys)?,
2522            0x20 => self.cycle_op_20(sys)?,
2523            0x21 => self.cycle_op_21(sys)?,
2524            0x22 => self.cycle_op_22(sys)?,
2525            0x23 => self.cycle_op_23(sys)?,
2526            0x24 => self.cycle_op_24(sys)?,
2527            0x25 => self.cycle_op_25(sys)?,
2528            0x26 => self.cycle_op_26(sys)?,
2529            0x27 => self.cycle_op_27(sys)?,
2530            0x28 => self.cycle_op_28(sys)?,
2531            0x29 => self.op_29(sys)?,
2532            0x2a => self.op_2a(sys)?,
2533            0x2b => self.op_2b(sys)?,
2534            0x2c => self.cycle_op_2c(sys)?,
2535            0x2d => self.cycle_op_2d(sys)?,
2536            0x2e => self.cycle_op_2e(sys)?,
2537            0x2f => self.cycle_op_2f(sys)?,
2538            0x30 => self.cycle_op_30(sys)?,
2539            0x31 => self.cycle_op_31(sys)?,
2540            0x32 => self.cycle_op_32(sys)?,
2541            0x33 => self.cycle_op_33(sys)?,
2542            0x34 => self.cycle_op_34(sys)?,
2543            0x35 => self.cycle_op_35(sys)?,
2544            0x36 => self.cycle_op_36(sys)?,
2545            0x37 => self.cycle_op_37(sys)?,
2546            0x38 => self.op_38(sys)?,
2547            0x39 => self.cycle_op_39(sys)?,
2548            0x3a => self.op_3a(sys)?,
2549            0x3b => self.cycle_op_3b(sys)?,
2550            0x3c => self.cycle_op_3c(sys)?,
2551            0x3d => self.cycle_op_3d(sys)?,
2552            0x3e => self.cycle_op_3e(sys)?,
2553            0x3f => self.cycle_op_3f(sys)?,
2554            0x40 => self.cycle_op_40(sys)?,
2555            0x41 => self.cycle_op_41(sys)?,
2556            0x42 => self.cycle_op_42(sys)?,
2557            0x43 => self.cycle_op_43(sys)?,
2558            0x44 => self.cycle_op_44(sys)?,
2559            0x45 => self.cycle_op_45(sys)?,
2560            0x46 => self.cycle_op_46(sys)?,
2561            0x47 => self.cycle_op_47(sys)?,
2562            0x48 => self.cycle_op_48(sys)?,
2563            0x49 => self.op_49(sys)?,
2564            0x4a => self.op_4a(sys)?,
2565            0x4b => self.op_4b(sys)?,
2566            0x4c => self.cycle_op_4c(sys)?,
2567            0x4d => self.cycle_op_4d(sys)?,
2568            0x4e => self.cycle_op_4e(sys)?,
2569            0x4f => self.cycle_op_4f(sys)?,
2570            0x50 => self.cycle_op_50(sys)?,
2571            0x51 => self.cycle_op_51(sys)?,
2572            0x52 => self.cycle_op_52(sys)?,
2573            0x53 => self.cycle_op_53(sys)?,
2574            0x54 => self.cycle_op_54(sys)?,
2575            0x55 => self.cycle_op_55(sys)?,
2576            0x56 => self.cycle_op_56(sys)?,
2577            0x57 => self.cycle_op_57(sys)?,
2578            0x58 => self.op_58(sys)?,
2579            0x59 => self.cycle_op_59(sys)?,
2580            0x5a => self.op_5a(sys)?,
2581            0x5b => self.cycle_op_5b(sys)?,
2582            0x5c => self.cycle_op_5c(sys)?,
2583            0x5d => self.cycle_op_5d(sys)?,
2584            0x5e => self.cycle_op_5e(sys)?,
2585            0x5f => self.cycle_op_5f(sys)?,
2586            0x60 => self.cycle_op_60(sys)?,
2587            0x61 => self.cycle_op_61(sys)?,
2588            0x62 => self.cycle_op_62(sys)?,
2589            0x63 => self.cycle_op_63(sys)?,
2590            0x64 => self.cycle_op_64(sys)?,
2591            0x65 => self.cycle_op_65(sys)?,
2592            0x66 => self.cycle_op_66(sys)?,
2593            0x67 => self.cycle_op_67(sys)?,
2594            0x68 => self.cycle_op_68(sys)?,
2595            0x69 => self.op_69(sys)?,
2596            0x6a => self.op_6a(sys)?,
2597            0x6b => self.op_6b(sys)?,
2598            0x6c => self.cycle_op_6c(sys)?,
2599            0x6d => self.cycle_op_6d(sys)?,
2600            0x6e => self.cycle_op_6e(sys)?,
2601            0x6f => self.cycle_op_6f(sys)?,
2602            0x70 => self.cycle_op_70(sys)?,
2603            0x71 => self.cycle_op_71(sys)?,
2604            0x72 => self.cycle_op_72(sys)?,
2605            0x73 => self.cycle_op_73(sys)?,
2606            0x74 => self.cycle_op_74(sys)?,
2607            0x75 => self.cycle_op_75(sys)?,
2608            0x76 => self.cycle_op_76(sys)?,
2609            0x77 => self.cycle_op_77(sys)?,
2610            0x78 => self.op_78(sys)?,
2611            0x79 => self.cycle_op_79(sys)?,
2612            0x7a => self.op_7a(sys)?,
2613            0x7b => self.cycle_op_7b(sys)?,
2614            0x7c => self.cycle_op_7c(sys)?,
2615            0x7d => self.cycle_op_7d(sys)?,
2616            0x7e => self.cycle_op_7e(sys)?,
2617            0x7f => self.cycle_op_7f(sys)?,
2618            0x80 => self.op_80(sys)?,
2619            0x81 => self.cycle_op_81(sys)?,
2620            0x82 => self.op_82(sys)?,
2621            0x83 => self.cycle_op_83(sys)?,
2622            0x84 => self.cycle_op_84(sys)?,
2623            0x85 => self.cycle_op_85(sys)?,
2624            0x86 => self.cycle_op_86(sys)?,
2625            0x87 => self.cycle_op_87(sys)?,
2626            0x88 => self.op_88(sys)?,
2627            0x89 => self.op_89(sys)?,
2628            0x8a => self.op_8a(sys)?,
2629            0x8b => self.op_8b(sys)?,
2630            0x8c => self.cycle_op_8c(sys)?,
2631            0x8d => self.cycle_op_8d(sys)?,
2632            0x8e => self.cycle_op_8e(sys)?,
2633            0x8f => self.cycle_op_8f(sys)?,
2634            0x90 => self.cycle_op_90(sys)?,
2635            0x91 => self.cycle_op_91(sys)?,
2636            0x92 => self.cycle_op_92(sys)?,
2637            0x93 => self.cycle_op_93(sys)?,
2638            0x94 => self.cycle_op_94(sys)?,
2639            0x95 => self.cycle_op_95(sys)?,
2640            0x96 => self.cycle_op_96(sys)?,
2641            0x97 => self.cycle_op_97(sys)?,
2642            0x98 => self.op_98(sys)?,
2643            0x99 => self.cycle_op_99(sys)?,
2644            0x9a => self.op_9a(sys)?,
2645            0x9b => self.cycle_op_9b(sys)?,
2646            0x9c => self.cycle_op_9c(sys)?,
2647            0x9d => self.cycle_op_9d(sys)?,
2648            0x9e => self.cycle_op_9e(sys)?,
2649            0x9f => self.cycle_op_9f(sys)?,
2650            0xa0 => self.op_a0(sys)?,
2651            0xa1 => self.cycle_op_a1(sys)?,
2652            0xa2 => self.op_a2(sys)?,
2653            0xa3 => self.cycle_op_a3(sys)?,
2654            0xa4 => self.cycle_op_a4(sys)?,
2655            0xa5 => self.cycle_op_a5(sys)?,
2656            0xa6 => self.cycle_op_a6(sys)?,
2657            0xa7 => self.cycle_op_a7(sys)?,
2658            0xa8 => self.op_a8(sys)?,
2659            0xa9 => self.op_a9(sys)?,
2660            0xaa => self.op_aa(sys)?,
2661            0xab => self.op_ab(sys)?,
2662            0xac => self.cycle_op_ac(sys)?,
2663            0xad => self.cycle_op_ad(sys)?,
2664            0xae => self.cycle_op_ae(sys)?,
2665            0xaf => self.cycle_op_af(sys)?,
2666            0xb0 => self.cycle_op_b0(sys)?,
2667            0xb1 => self.cycle_op_b1(sys)?,
2668            0xb2 => self.cycle_op_b2(sys)?,
2669            0xb3 => self.cycle_op_b3(sys)?,
2670            0xb4 => self.cycle_op_b4(sys)?,
2671            0xb5 => self.cycle_op_b5(sys)?,
2672            0xb6 => self.cycle_op_b6(sys)?,
2673            0xb7 => self.cycle_op_b7(sys)?,
2674            0xb8 => self.op_b8(sys)?,
2675            0xb9 => self.cycle_op_b9(sys)?,
2676            0xba => self.op_ba(sys)?,
2677            0xbb => self.cycle_op_bb(sys)?,
2678            0xbc => self.cycle_op_bc(sys)?,
2679            0xbd => self.cycle_op_bd(sys)?,
2680            0xbe => self.cycle_op_be(sys)?,
2681            0xbf => self.cycle_op_bf(sys)?,
2682            0xc0 => self.op_c0(sys)?,
2683            0xc1 => self.cycle_op_c1(sys)?,
2684            0xc2 => self.op_c2(sys)?,
2685            0xc3 => self.cycle_op_c3(sys)?,
2686            0xc4 => self.cycle_op_c4(sys)?,
2687            0xc5 => self.cycle_op_c5(sys)?,
2688            0xc6 => self.cycle_op_c6(sys)?,
2689            0xc7 => self.cycle_op_c7(sys)?,
2690            0xc8 => self.op_c8(sys)?,
2691            0xc9 => self.op_c9(sys)?,
2692            0xca => self.op_ca(sys)?,
2693            0xcb => self.op_cb(sys)?,
2694            0xcc => self.cycle_op_cc(sys)?,
2695            0xcd => self.cycle_op_cd(sys)?,
2696            0xce => self.cycle_op_ce(sys)?,
2697            0xcf => self.cycle_op_cf(sys)?,
2698            0xd0 => self.cycle_op_d0(sys)?,
2699            0xd1 => self.cycle_op_d1(sys)?,
2700            0xd2 => self.cycle_op_d2(sys)?,
2701            0xd3 => self.cycle_op_d3(sys)?,
2702            0xd4 => self.cycle_op_d4(sys)?,
2703            0xd5 => self.cycle_op_d5(sys)?,
2704            0xd6 => self.cycle_op_d6(sys)?,
2705            0xd7 => self.cycle_op_d7(sys)?,
2706            0xd8 => self.op_d8(sys)?,
2707            0xd9 => self.cycle_op_d9(sys)?,
2708            0xda => self.op_da(sys)?,
2709            0xdb => self.cycle_op_db(sys)?,
2710            0xdc => self.cycle_op_dc(sys)?,
2711            0xdd => self.cycle_op_dd(sys)?,
2712            0xde => self.cycle_op_de(sys)?,
2713            0xdf => self.cycle_op_df(sys)?,
2714            0xe0 => self.op_e0(sys)?,
2715            0xe1 => self.cycle_op_e1(sys)?,
2716            0xe2 => self.op_e2(sys)?,
2717            0xe3 => self.cycle_op_e3(sys)?,
2718            0xe4 => self.cycle_op_e4(sys)?,
2719            0xe5 => self.cycle_op_e5(sys)?,
2720            0xe6 => self.cycle_op_e6(sys)?,
2721            0xe7 => self.cycle_op_e7(sys)?,
2722            0xe8 => self.op_e8(sys)?,
2723            0xe9 => self.op_e9(sys)?,
2724            0xea => self.op_ea(sys)?,
2725            0xeb => self.op_eb(sys)?,
2726            0xec => self.cycle_op_ec(sys)?,
2727            0xed => self.cycle_op_ed(sys)?,
2728            0xee => self.cycle_op_ee(sys)?,
2729            0xef => self.cycle_op_ef(sys)?,
2730            0xf0 => self.cycle_op_f0(sys)?,
2731            0xf1 => self.cycle_op_f1(sys)?,
2732            0xf2 => self.cycle_op_f2(sys)?,
2733            0xf3 => self.cycle_op_f3(sys)?,
2734            0xf4 => self.cycle_op_f4(sys)?,
2735            0xf5 => self.cycle_op_f5(sys)?,
2736            0xf6 => self.cycle_op_f6(sys)?,
2737            0xf7 => self.cycle_op_f7(sys)?,
2738            0xf8 => self.op_f8(sys)?,
2739            0xf9 => self.cycle_op_f9(sys)?,
2740            0xfa => self.op_fa(sys)?,
2741            0xfb => self.cycle_op_fb(sys)?,
2742            0xfc => self.cycle_op_fc(sys)?,
2743            0xfd => self.cycle_op_fd(sys)?,
2744            0xfe => self.cycle_op_fe(sys)?,
2745            0xff => self.cycle_op_ff(sys)?,
2746            _ => unreachable!(),
2747        }
2748        Some(())
2749    }
2750}
robo6502/nmos/ops/cycle.rs

robo6502/nmos/ops/
cycle.rs
