Docs.rs
rlx-fpga-0.2.0
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rlx-fpga 0.2.0
FPGA backend for RLX — per-graph datapath synthesis. IR → Verilog → bitstream.
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bin
codegen
passes
estimate.rs
ir.rs
lib.rs
model.rs
pack.rs
quant.rs
reference.rs
tune.rs
verilog.rs
weights.rs