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rk3399_pac/
pref_cache.rs

1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    version: Version,
5    size: Size,
6    status: Status,
7    _reserved3: [u8; 0x04],
8    command: Command,
9    clear_page: ClearPage,
10    max_reads: MaxReads,
11    enable: Enable,
12    perfcnt_src0: PerfcntSrc0,
13    perfcnt_val0: PerfcntVal0,
14    perfcnt_src1: PerfcntSrc1,
15    perfcnt_val1: PerfcntVal1,
16}
17impl RegisterBlock {
18    #[doc = "0x00 - VERSION register"]
19    #[inline(always)]
20    pub const fn version(&self) -> &Version {
21        &self.version
22    }
23    #[doc = "0x04 - L2 cache SIZE"]
24    #[inline(always)]
25    pub const fn size(&self) -> &Size {
26        &self.size
27    }
28    #[doc = "0x08 - Status register"]
29    #[inline(always)]
30    pub const fn status(&self) -> &Status {
31        &self.status
32    }
33    #[doc = "0x10 - Command setting register"]
34    #[inline(always)]
35    pub const fn command(&self) -> &Command {
36        &self.command
37    }
38    #[doc = "0x14 - clear page register"]
39    #[inline(always)]
40    pub const fn clear_page(&self) -> &ClearPage {
41        &self.clear_page
42    }
43    #[doc = "0x18 - maximum read register"]
44    #[inline(always)]
45    pub const fn max_reads(&self) -> &MaxReads {
46        &self.max_reads
47    }
48    #[doc = "0x1c - enables cacheable accesses and cache read allocation"]
49    #[inline(always)]
50    pub const fn enable(&self) -> &Enable {
51        &self.enable
52    }
53    #[doc = "0x20 - performance counter 0 source register"]
54    #[inline(always)]
55    pub const fn perfcnt_src0(&self) -> &PerfcntSrc0 {
56        &self.perfcnt_src0
57    }
58    #[doc = "0x24 - performance counter 0 value register"]
59    #[inline(always)]
60    pub const fn perfcnt_val0(&self) -> &PerfcntVal0 {
61        &self.perfcnt_val0
62    }
63    #[doc = "0x28 - performance counter 0 source register"]
64    #[inline(always)]
65    pub const fn perfcnt_src1(&self) -> &PerfcntSrc1 {
66        &self.perfcnt_src1
67    }
68    #[doc = "0x2c - performance counter 1 value register"]
69    #[inline(always)]
70    pub const fn perfcnt_val1(&self) -> &PerfcntVal1 {
71        &self.perfcnt_val1
72    }
73}
74#[doc = "VERSION (r) register accessor: VERSION register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`]
75module"]
76#[doc(alias = "VERSION")]
77pub type Version = crate::Reg<version::VersionSpec>;
78#[doc = "VERSION register"]
79pub mod version;
80#[doc = "SIZE (r) register accessor: L2 cache SIZE\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`size::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@size`]
81module"]
82#[doc(alias = "SIZE")]
83pub type Size = crate::Reg<size::SizeSpec>;
84#[doc = "L2 cache SIZE"]
85pub mod size;
86#[doc = "STATUS (rw) register accessor: Status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
87module"]
88#[doc(alias = "STATUS")]
89pub type Status = crate::Reg<status::StatusSpec>;
90#[doc = "Status register"]
91pub mod status;
92#[doc = "COMMAND (rw) register accessor: Command setting register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`command::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`command::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@command`]
93module"]
94#[doc(alias = "COMMAND")]
95pub type Command = crate::Reg<command::CommandSpec>;
96#[doc = "Command setting register"]
97pub mod command;
98#[doc = "CLEAR_PAGE (w) register accessor: clear page register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clear_page::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clear_page`]
99module"]
100#[doc(alias = "CLEAR_PAGE")]
101pub type ClearPage = crate::Reg<clear_page::ClearPageSpec>;
102#[doc = "clear page register"]
103pub mod clear_page;
104#[doc = "MAX_READS (rw) register accessor: maximum read register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`max_reads::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`max_reads::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@max_reads`]
105module"]
106#[doc(alias = "MAX_READS")]
107pub type MaxReads = crate::Reg<max_reads::MaxReadsSpec>;
108#[doc = "maximum read register"]
109pub mod max_reads;
110#[doc = "ENABLE (rw) register accessor: enables cacheable accesses and cache read allocation\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`]
111module"]
112#[doc(alias = "ENABLE")]
113pub type Enable = crate::Reg<enable::EnableSpec>;
114#[doc = "enables cacheable accesses and cache read allocation"]
115pub mod enable;
116#[doc = "PERFCNT_SRC0 (rw) register accessor: performance counter 0 source register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perfcnt_src0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`perfcnt_src0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perfcnt_src0`]
117module"]
118#[doc(alias = "PERFCNT_SRC0")]
119pub type PerfcntSrc0 = crate::Reg<perfcnt_src0::PerfcntSrc0Spec>;
120#[doc = "performance counter 0 source register"]
121pub mod perfcnt_src0;
122#[doc = "PERFCNT_VAL0 (rw) register accessor: performance counter 0 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perfcnt_val0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`perfcnt_val0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perfcnt_val0`]
123module"]
124#[doc(alias = "PERFCNT_VAL0")]
125pub type PerfcntVal0 = crate::Reg<perfcnt_val0::PerfcntVal0Spec>;
126#[doc = "performance counter 0 value register"]
127pub mod perfcnt_val0;
128#[doc = "PERFCNT_SRC1 (rw) register accessor: performance counter 0 source register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perfcnt_src1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`perfcnt_src1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perfcnt_src1`]
129module"]
130#[doc(alias = "PERFCNT_SRC1")]
131pub type PerfcntSrc1 = crate::Reg<perfcnt_src1::PerfcntSrc1Spec>;
132#[doc = "performance counter 0 source register"]
133pub mod perfcnt_src1;
134#[doc = "PERFCNT_VAL1 (rw) register accessor: performance counter 1 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perfcnt_val1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`perfcnt_val1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perfcnt_val1`]
135module"]
136#[doc(alias = "PERFCNT_VAL1")]
137pub type PerfcntVal1 = crate::Reg<perfcnt_val1::PerfcntVal1Spec>;
138#[doc = "performance counter 1 value register"]
139pub mod perfcnt_val1;